CLOSED LOOP CONTROL OF AN INTERLEAVED BUCK

CONVERTER WITH HIGH STEP-DOWN CONVERSION RATIO

AND LOW SWITCH VOLTAGE STRESS

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 CONTENTS
 Introduction
 Conventional IBC
 Two phase extended IBC
 Modified IBC
 Circuit operation
 Simulation
 Hardware
 Results & Future Scope
 References

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 INTRODUCTION
 Interleaving technique

 Interleaved buck converter (IBC)

 Conventional IBC

 Two phase extended IBC

 Modified IBC

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 CONVENTIONAL IBC

 Switches suffer from input

voltage – high voltage
rated devices required.

 High cost, large voltage

drop.
Fig. 1. Conventional IBC

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TWO PHASE EXTENDED IBC
 Reduced losses.
 Voltage stress of input
switches remains rather
high.

Fig. 2. Two Phase Extended IBC

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 MODIFIED IBC

 S1a & S1b triggered.

S2a & S2b triggered-
180ᵒ phase shift.
 Voltage stresses reduced.

Fig. 3. Modified IBC

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 CIRCUIT OPERATION
 Assumptions
 Ideal components.
 C1 = C2 ; CA = CB.
 Operation in CCM.

 Four modes of operation

Fig. 4. Modified IBC
(Mode 2 & 4 are same).

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MODE-1

Fig. 5. Mode 1 operation

t0-t1 ; S1a,S1b,D1 ON ; L1 discharges.

IL2 provides 2 separate current paths through CA & CB.
C1-S1a-CA-L2-Co-R-D1 and CB-L2-Co-R-S1b-CB.
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MODES-2 & 4

Fig. 6. Mode 2 & 4 operation

MODE 2 : t1-t2 ; S1a,S1b, S2a,S2b OFF ; L1 & L2
discharges.
MODE 4 : t3-t4 ; S1a,S1b, S2a,S2b OFF ; L1 & L2
discharges.
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MODE-3

Fig. 7. Mode 3 operation

t2-t3 ; S2a,S2b,D2 ON ; L2 discharges.
IL1 provides 2 separate current paths through CA & CB.
C2-L1-Co-R-D2-CB-S2a-C2 and CA-S2b-L1-Co-R-D2-
CA.
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MATLAB SIMULINK MODEL OF
IBC

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 VALUES AND EQUATIONS
TAKEN FOR SIMULATION
D
VO  VS
4
VO
ILripple  (1 D )TS
L
IOD
VCBripple 
2 CBfs
IOD
VCOripple 
2 COfs

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 INPUT VOLTAGE

Fig. 9 .Input voltage

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PULSES FOR THE SWITCHES

Fig. 10. Pulses for switches

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VOLTAGE ACROSS SWITCHES

Fig. 11. Voltage across switches

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 VOLTAGE ACROSS DIODES

Fig. 12. Voltage across diodes

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 CURRENT THROUGH
INDUCTORS

Fig. 13. Current through inductors

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VOLTAGE ACROSS CAPACITORS

Fig. 14. Voltage across capacitors

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 OUTPUT CURRENT AND
OUTPUT VOLTAGE

Fig. 15. Output current and output voltage

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 HARDWARE DETAILS

Fig. 17. Block diagram

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 EXPERIMENTAL SETUP

Fig. 18. Experimental setup

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 INPUT VOLTAGE

Fig. 19. Input voltage

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 PULSES FOR THE
SWITCHES(S1a & S1b)

Fig. 20. Pulses for switches S1a & S1b

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 PULSES FOR THE
SWITCHES(S2a & S2b)

Fig. 21 .Pulses for switches S2a & S2b

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 VOLTAGE ACROSS SWITCH
S1a

Fig. 22 .Voltage across switch S1a

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 VOLTAGE ACROSS SWITCH
S1b

Fig. 23. Voltage across switch S1b

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 VOLTAGE ACROSS SWITCH
S2a

Fig. 24. Voltage across switch S2a

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 VOLTAGE ACROSS SWITCH
S2b

Fig. 25. Voltage across switch S2b

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 VOLTAGE ACROSS DIODE 1

Fig. 26. Voltage across diode 1

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 VOLTAGE ACROSS DIODE 2

Fig. 27. Voltage across diode 2

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 OUTPUT VOLTAGE

Fig. 28. Output voltage

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 FUTURE SCOPE
 PI controller replaced by PID controller.

 dsPIC replaced by FPGA, fuzzy logic.

 Increase the number of interleaving stages.

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 CONCLUSION
 Interleaving technique is efficient.

 Voltage stresses of switches and diodes decreased there by

reducing the losses.

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 REFERENCES
1. C. Garcia, P. Zumel, A. D. Castro, and J. A. Cobos, "Automotive DC-DC bidirectional converter
made with many interleaved buck stages", IEEE Trans. Power Electron., vol. 21, no. 21, pp. 578-
586, May 2006.

2. R. L. Lin, C. C. Hsu, and S. K. Chang chien, “Interleaved four-phase buck-based current source
with isolated energy-recovery scheme for electrical discharge machine", IEEE Trans. Power
Electron., vol. 24, no. 7, pp. 2249-2258, Jul. 2009.

3. Y. C. Chuang, "High-efficiency ZCS buck converter for rechargeable batteries", IEEE Trans. Ind.
Electron., vol. 57, no. 7, pp. 2463-2472, Jul. 2010.

4. C. S.Moo, Y. J. Chen, H. L. Cheng, and Y. C. Hsieh, "Twin-buck converter with zero-voltage-

transition", IEEE Trans. Ind. Electron., vol. 58, no. 6, pp. 2366-2371, Jun. 2011.

5. I.-O. Lee, S.-Y. Cho, and G.-W. Moon, "Interleaved buck converter having low switching losses and
improved step-down conversion ratio", IEEE Trans. Power Electron., vol. 27, no. 8, pp. 3664-3675,
Aug. 2012.

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 PUBLICATIONS
 Published paper in the journal IJIREECE.

[IJIREECE – International Journal of Innovative Research in

Electrical, Electronics, Instrumentation and Control Engineering]

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 dsPIC30F2010
• 28 pin high performance digital signal controller
• Modified RISC instruction set
• First 16 bit micro controller introduced by microchip
• 6 ADC channels, 6 PWM
• At a time generate 3 PWM pulses and their compliment pulses
• 3 input supply pins (13, 20, 28)
• Ground – 8, 19, 27 (ADC)
• Oscillator frequency 24 MHz
• PWM generation – pins 23 and 25
• Reset button is connected to master clear through a 10K resistor
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 dsPIC30F2010

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 LM317- Voltage regulator IC
 Adjustable voltage regulator
 Range :1.2 V -37 V
 Current :1.5 A
 Vout = 1.25(1+ R2/ R1)

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 TLP250 – Gate driver IC
 8 pin IC, fast gate switching

 Voltage range :10-37 v

 Current :1.5 A

 Input – LED Output – Photo transistor or photo diode

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 TLP250 – Gate driver IC

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