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IRFB4321PbF
Applications HEXFET® Power MOSFET
l Motion Control Applications
l High Efficiency Synchronous Rectification in SMPS VDSS 150V
l Uninterruptible Power Supply
l Hard Switched and High Frequency Circuits
RDS(on) typ. 12m:
max. 15m:
Benefits
l Low RDSON Reduces Losses ID 85A
l Low Gate Charge Improves the Switching
Performance D D
l Improved Diode Recovery Improves Switching &
EMI Performance
l 30V Gate Voltage Rating Improves Robustness
l Fully Characterized Avalanche SOA S
G D
G
S
TO-220AB
G D S
Gate Drain Source
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IRFB4321PbF
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 85 c A MOSFET symbol D
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 50A, VGS = 0V
trr Reverse Recovery Time ––– 89 130 ns ID = 50A
Qrr Reverse Recovery Charge ––– 300 450 nC VR = 128V,
IRRM Reverse Recovery Current ––– 6.5 ––– A di/dt = 100A/μs f
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction Pulse width ≤ 400μs; duty cycle ≤ 2%.
temperature. Package limitation current is 75A
Rθ is measured at TJ approximately 90°C
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.095mH
RG = 25Ω, IAS = 50A, VGS =10V. Part not recommended for use
above this value.
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IRFB4321PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
7.0V 7.0V
100 6.5V 6.5V
6.0V 6.0V
5.5V
100 5.5V
BOTTOM 5.0V BOTTOM 5.0V
10
5.0V
10
1
100
2.5
(Normalized)
TJ = 175°C
10 2.0
TJ = 25°C 1.5
1
7000 20
VGS = 0V, f = 1 MHZ ID= 50A
Ciss = Cgs + Cgd, Cds SHORTED
6000 VDS = 120V
VGS, Gate-to-Source Voltage (V)
Crss = Cgd
16 VDS= 75V
Coss = Cds + Cgd
5000 VDS= 30V
C, Capacitance (pF)
Ciss
12
4000
3000 8
Coss
2000
4
1000
Crss
0
0
1 10 100 0 20 40 60 80 100 120
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFB4321PbF
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100μsec
100 100
TJ = 175°C 1msec
10 10 10msec
TJ = 25°C
1 1
Tc = 25°C
Tj = 175°C DC
VGS = 0V
Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1 10 100 1000
VSD , Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)
70 180
ID , Drain Current (A)
60
170
50
40
160
30
20
150
10
0
140
25 50 75 100 125 150 175
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TC , Case Temperature (°C)
TJ , Junction Temperature (°C)
Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
5.0 500
EAS, Single Pulse Avalanche Energy (mJ)
ID
TOP 13A
4.0 400 20A
BOTTOM 50A
Energy (μJ)
3.0 300
2.0 200
1.0 100
0.0 0
0 20 40 60 80 100 120 140 160 25 50 75 100 125 150 175
Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
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IRFB4321PbF
1
0.1 0.20
0.10 R1
R1
R2
R2
R3
R3 Ri (°C/W) τι (sec)
τJ τC
τJ τ 0.085239 0.000052
0.05 τ1
τ1
τ2 τ3
τ2 τ3
0.18817 0.00098
0.02 Ci= τi/Ri
0.01 Ci= τi/Ri 0.176912 0.008365
0.01
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
10 0.05
0.10
0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
ID = 1.0mA
5.0 ID = 250μA
30
4.0
IRRM - (A)
20
3.0
IF = 33A
10
2.0 VR = 128V
TJ = 125°C
TJ = 25°C
1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000
Fig 16. Threshold Voltage Vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt
40 3200
2800
30 2400
2000
QRR - (nC)
IRRM - (A)
20 1600
1200
IF = 50A IF = 33A
10 800
VR = 128V VR = 128V
TJ = 125°C TJ = 125°C
400
TJ = 25°C TJ = 25°C
0 0
100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000
Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt
3200
2800
2400
2000
QRR - (nC)
1600
1200
IF = 50A
800
VR = 128V
400 TJ = 125°C
TJ = 25°C
0
100 200 300 400 500 600 700 800 900 1000
dif / dt - (A / μs)
VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
Recovery Body Diode Forward
-
+ Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Ripple ≤ 5% ISD
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
tp
L DRIVER
VDS
RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS
Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms
LD
VDS VDS
90%
+
VDD -
D.U.T 10%
VGS VGS
Pulse Width < 1μs
Duty Factor < 0.1% td(on) tr td(off) tf
Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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IRFB4321PbF
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