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IRF1010N
HEXFET® Power MOSFET
l Advanced Process Technology D
l Ultra Low On-Resistance VDSS = 55V
l Dynamic dv/dt Rating
l 175°C Operating Temperature RDS(on) = 11mΩ
l Fast Switching G
l Fully Avalanche Rated ID = 85A
S
Description
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.85
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
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IRF1010N
Electrical Characteristics @ T J = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.058 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 11 mΩ VGS = 10V, ID = 43A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 32 ––– ––– S VDS = 25V, ID = 43A
––– ––– 25 VDS = 55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 44V, V GS = 0V, T J = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 120 ID = 43A
Qgs Gate-to-Source Charge ––– ––– 19 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 41 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 13 ––– VDD = 28V
tr Rise Time ––– 76 ––– ID = 43A
ns
td(off) Turn-Off Delay Time ––– 39 ––– RG = 3.6Ω
tf Fall Time ––– 48 ––– VGS = 10V, See Fig. 10
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S
Notes:
Repetitive rating; pulse width limited by ISD ≤ 43A, di/dt ≤ 210A/µs, V DD ≤ V(BR)DSS,
max. junction temperature. ( See fig. 11 ) T J ≤ 175°C
Starting T J = 25°C, L = 270µH Pulse width ≤ 400µs; duty cycle ≤ 2%.
RG = 25Ω, IAS = 43A, VGS=10V (See Figure 12)
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to T J = 175°C .
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
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IRF1010N
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V
7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V
100 100
4.5V
4.5V
10 10
100 2.5
ID = 85A
R DS(on) , Drain-to-Source On Resistance
TJ = 25 ° C
I D , Drain-to-Source Current (A)
2.0
TJ = 175 ° C
(Normalized)
1.5
10
1.0
0.5
V DS = 25V
20µs PULSE WIDTH VGS = 10V
1 0.0
4 6 8 10 12 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature( °C)
20
6000 ID = 43A
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED VDS = 44V
4000 Ciss
12
3000
Coss
8
2000
1000 Crss 4
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)
100
TJ = 175 ° C
100
100µsec
10
10 1msec
1 TJ = 25 ° C
Tc = 25°C
Tj = 175°C 10msec
V GS = 0 V Single Pulse
0.1 1
0.0 0.6 1.2 1.8 2.4
1 10 100 1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
100
RD
LIMITED BY PACKAGE VDS
VGS
80 D.U.T.
RG
I D , Drain Current (A)
+
-VDD
60
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40
0
25 50 75 100 125 150 175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms
D = 0.50
Thermal Response (Z thJC )
0.20
0.10
0.1
0.05 P DM
SINGLE PULSE
0.02 (THERMAL RESPONSE) t1
0.01
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
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IRF1010N
500
ID
RG D .U .T + 300
V
- DD
IA S A
2V0GS
V
tp 0 .0 1 Ω
200
50KΩ
12V .2µF
QG .3µF
VGS +
V
D.U.T. - DS
QGS QGD
VGS
VG 3mA
IG ID
Charge Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
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IRF1010N
Peak Diode Recovery dv/dt Test Circuit
+
- +
-
RG • dv/dt controlled by R G +
• ISD controlled by Duty Factor "D" VDD
-
• D.U.T. - Device Under Test
VGS
[VGS=10V ] ***
Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5% [ ISD ]
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