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ENCODER
N= (K+N-1)l
If K >> N , n=Kl
1
And the code rate =
𝑙
State Transition Diagram Representation
Trellis Diagram
( Trellis Diagram )
Code Tree
𝑉1 = 𝑑𝑘 ⊕ 𝑑𝑘−1 ⊕ 𝑑𝑘−2
𝑉2 = 𝑑𝑘
𝑉3 = 𝑑𝑘 ⊕ 𝑑𝑘−1
𝒅→100000
𝒆→111011000000
𝑹→011011000000
Stages of Decoding
Stage- IV Stage- V
Storage of Decoding
Stage - VI
Algorithm/Explanation
b: 01
c: 10
d: 11
1/10 1/10 1/10 1/10
Received 01 01 01 01 01 01 01
bits
[2] [1] [2] [2] [2]
0/00 0/00 0/00 0/00 0/00 0/00
a: 00
c: 10
[1] [3] [2] [3] [3]
d: 11
1/10 1/10 1/10 1/10
[3] [3] [3] [3] [3]
0
(00) ∅000
0
(00)
(11) ∅001
0 1
(00) 0
(10) 010
1
0 (11)
(01) 011
1
0
(11) 100
1 0
(10)
(00) 101
1 1
(11) 0
(01) 110
Path 1
(01)
(10) 111
1
Received 01 10 11 10 00 00
bits
[2] [1] [2] [2]
0/00 0/00 0/00 0/00 0/00
a: 00 = min(2+0, 2+2)
c: 10
[1] [3] [2] [3] = min(2+1, 3+1)
d: 11 = min(2+1, 3+1)
[3] 1/10 [3] 1/10 [3] 1/10 [3]
Received 01 10 11 10 00 00
bits
[2] [1]
0/00 0/00 0/00
a: 00 = min(2+2, 1+0)
[2] [2]
b: 01
= min(2+0, 1+2)
c: 10
[1] [3] = min(2+1, 3+1)
d: 11 = min(2+1, 3+1)
[3] 1/10 [3]
Received 01 10 11 10 00 00
bits
[2]
0/00 0/00
a: 00 Survivor path matrix
1/11 1/11
[2]
b: 01
Survivor path matrix
c: 10
Survivor path matrix
[1]
[3]
d: 11 Survivor path matrix
𝑑𝑘−2 𝑑𝑘−1 𝑑𝑘 Input Data
States
State States
Labels
b: 0 1
c: 1 0
d: 1 1
0
(00) ∅000
0
(00)
(11) ∅001
0 1
(00) 0
(10) 010
1
0 (11)
(01) 011
1
0
(11) 100
1 0
(10)
(00) 101
1 1
(11) 0
(01) 110
Path 1
(01)
(10) 111
1
Received 11
01 10 10 00 00
bits
[2] [1]
0/00 0/00 0/00 0/00
a: 00 = min(1+1, 3+1)
b: 01 [2] [2]
= min(1+1, 3+1)
c: 10
[1] [3] = min(2+0, 3+2)
d: 11 = min(2+3, 3+0)
[3] 1/10 [3] 1/10
1/10
11 d
0/01
1/01
1/00
b c
01 10
0/10
1/11 0/11
a 00
0/00
( State Transition Diagram )
“N” Shift Registers
Dummy
Digits
𝑣1 𝑣2
Output Stream
00110100101011
Coded
or
data
11010100101100