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Radio Antenna Turntable

System
(RATS)
Turntable Illustration

Motor Driven Tire

Bearing
Turntable Illustration
Project Block Diagram

Ethernet-to-Serial
Interface

DAC (SPI)
Master Controller
and Buffer

Motor Controller

20x4 Character
Turntable Motor
LCD (Parallel)
Optical Encoder
(Parallel)
Project Block Diagram

Ethernet-to-Serial
Interface

DAC (SPI)
Master Controller
and Buffer

Motor Controller

20x4 Character
Turntable Motor
LCD (Parallel)
Optical Encoder
(Parallel)
Encoder Drama

• Original encoder was defective


– Incremental
– Pulse output

• New encoder on order


– Absolute
– Parallel output
(memory mapped)
Network Interface

• Converts Ethernet to RS-232


• Onboard 8051 Microcontroller
• Built-in TCP/IP stack
• Telnet protocol
– Username/password authentication
Master Controller

Features:
•HC11E0 MCU
•32K SRAM
•32K Flash
•2x RS-232
•8 MHz clock
Master Controller
VCC

U1
R7 1
4.7K VSS
2 52
MODB/VSTDBY VRH 51
3 VRL
MODA/LIR 4
STRA/AS LE
50
E 5 PE7/AN7 49
E PE3/AN3 48
R/*W 6 PE6/AN6 47 DAC_LD_REG
STRB/R/W PE2/AN2 46
EXTAL 7 PE5/AN5 45 ENC_INT
EXTAL PE1/AN1 44
8 PE4/AN4 43
XTAL PE0/AN0

9 AD0
PC0/ADDR0/DATA0 10 AD1
*RST 17 PC1/ADDR1/DATA1 11 AD2
RESET PC2/ADDR2/DATA2 12 AD3
PC3/ADDR3/DATA3 13 AD4
18 PC4/ADDR4/DATA4 14 AD5
XIRQ/VPPE PC5/ADDR5/DATA5 15 AD6
PC6/ADDR6/DATA6 16 AD7
19 PC7/ADDR7/DATA7 AD [0-7]
IRQ 42 A8
PB0/ADDR8 41 A9
20 PB1/ADDR9 40 A10
PD0/RxD PB2/ADDR10 39 A11
21 PB3/ADDR11 38 A12
PD1/TxD PB4/ADDR12 37 A13
PB5/ADDR13 36 A14
PB6/ADDR14 35 A15
PB7/ADDR15 ADDR [8-14]
22
DAC_SDI 23 PD2/MISO
24 PD3/MOSI 34
DAC_CLK 25 PD4/SCK PA0/IC3 33
PD5/SS PA1/IC2 32
VCC PA2/IC1 31
26 PA3/OC5/IC4/OC1 30
VDD PA4/OC4/OC1 29
PA5/OC3/OC1 28
PA6/OC2/OC1 27
PA7/PAI/OC1

HC11E0
Master Controller

32K SRAM (MCM60L256) 32K Flash (AT29C256)


U8 U5
A0 10 11 AD0 A0 10 11 AD0
A1 9 A0 I/O0 12 AD1 A1 9 A0 I/O0 12 AD1
A2 8 A1 I/O1 13 AD2 A2 8 A1 I/O1 13 AD2
A3 7 A2 I/O2 15 AD3 A3 7 A2 I/O2 15 AD3
A4 6 A3 I/O3 16 AD4 A4 6 A3 I/O3 16 AD4
A5 5 A4 I/O4 17 AD5 A5 5 A4 I/O4 17 AD5
A6 4 A5 I/O5 18 AD6 A6 4 A5 I/O5 18 AD6
A7 3 A6 I/O6 19 AD7 A7 3 A6 I/O6 19 AD7
ADDR [0-7] A8 25 A7 I/O7 AD [0-7] ADDR [0-7] A8 25 A7 I/O7 AD [0-7]
A9 24 A8 A9 24 A8
A10 21 A9 A10 21 A9
A11 23 A10 A11 23 A10
A12 2 A11 A12 2 A11
A13 26 A12 A13 26 A12
A14 1 A13 A14 27 A13
ADDR [8-14] A14 ADDR [8-14] A14
22 22
*OE 27 OE *OE 1 OE
*WE 20 WE 20 WE
*CE (SRAM) CS *CE (FLASH) CE
MCM60L256
AT29C256
Master Controller

Supervisor/Reset Circuit LCD Enable Logic


VCC
VCC VCC
U3A
1 U6A U6A
VREF R6 1 U6A 1
R1 2 7 10K 31 3
*RST_IN SENSE *CE (LCD) 2 32 LCD_E
10K
SW1

3 5 2
CT *RST *RST E 7400 7400
4 6 7400
GND RST

TL7705 R5
C2 C1 10K
0.1uF 47uF

Chip Select Logic Peripheral Chip Select Logic


VCC
VCC

R2 R3 R4
4.7K 4.7K 4.7K U11
U4 5 15
G2BY 0 14 *CE (LCD)
2 7
1G 1Y 0 *CE (PERIPH) A10 1 Y1 13
1 6
1C 1Y 1 A11 2 A Y2 12
5
1Y 2 *CE (FLASH) A12 3 B Y3 11
A13 13 4
A 1Y 3 C Y4 10 *ENC_OEL
A14 3 9
B 2Y 0 6 Y5 9 *ENC_OEH
10
2Y 1 *CE (SRAM) *CE (PERIPH) 4 G1 Y 6 7
14 11
2G 2Y 2 G2AY 7
A15 15 12
2C 2Y 3 74LS138
74LS156
Master Controller

DAC Encoder
15V
U10
2 6
V+ VOUT VCC -15V 15V
4
GND VCC
C3
8
NSE_RED U9 U5
1u 11 6 AD0
REF102 1 VCC D0 AD1
VCC 12 5
7 R/*W VCC D1 AD2
VOUT_A 4
4 D2 AD3
VREF_L 3
U10 6 D3 AD4
VOUT_B 2
2 6 5 D4 AD5
V+ VOUT VREF_H ENC_INT 10 1
3 INT D5 AD6
VOUT_C *ENC_OEH 22 21
4 8 OEH D6 AD7
GND VSS *ENC_OEL 9 20
C4 2 OEL D7
VOUT_D 19 AD0 AD [0-7]
8 9 D8 AD1
NSE_RED GND 18
1u D9 17 AD2
REF102 12 D10 AD3
CS 16
13 D11 15 AD4
*RST 15 CASE D12 AD5
RST 24 14
25 GND D13 23 AD6
16 GND PAR
RSTSEL AD [0-7]
GURLEY A25S (ENCODER)
DAC_LD_REG 14
LDREG
13
LD_DACS
11
DAC_CLK CLK
10
DAC_SDI SDI
DAC7715
Master Controller

LCD Write Timing Diagram


Master Controller

Encoder Timing Diagram


Memory Map
Internal RAM (0.5 KB) 0x0000-0x01FF
External RAM [unused] (3.5 KB) 0x0200-0x0FFF
Register Block (64 B) 0x1000-0x103F

External RAM (27.9 KB) 0x1040-0x7FFF

Peripherals (8 KB) 0x8000-0x9FFF

Flash (24 KB) 0xA000-0xFFFF


Software Components

• Bootloader/Monitor
– Loads code through RS-232 into SRAM
– Displays SRAM, register contents
• RS-232 Driver
– Initialization, port selection, read/write text
• LCD Driver
– Simple interface to read/write from LCD
• Encoder Driver
– Reads and formats encoder position data
– Calculates turntable velocity
Software Components

• DAC Driver
– Simple interface to write data to the SPI DAC
• Ethernet Driver
– Telnet initialization, input/output
• User Interface
– Text menus/input handling
• Control System
– Acceleration/braking calculations
– Uses encoder data as input
– Writes to DAC as output
Current Status

• Hardware status:
– Basic functionality complete
– Encoder, DAC in progress
• Software status:
– LCD driver complete
– RS-232 driver in progress
Current Status

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