Introduction to SPICE

Engr. Ram Yuri C. Año, ECE, MSECE

Part-time Lecturer, COECSA, LPU Cavite
What is SPICE? 2

• Simulation Program with Integrated Circuit Emphasis.

• Originally developed in the early 1970 by Larry Nagel

at University of California, Berkeley.
What is SPICE? 3

• An engineering design tool primarily intended to do

analog circuit simulations.
• Circuit simulations:
• Steady state analysis (DC)
• Frequency analysis (AC)
• Transient (Time) analysis
Versions of Spice 4

• Spice 1
• Used the Gummel-Poon model for BJT and Shichman-Hodges Model for JFET
• Written in FORTRAN
• Spice 2
• Include new formulation for voltage-defined elements like inductors and VCVS and
VCIS
• Spice 2 version G.6 became the reference standard for most spice-compatible
programs
• Written in FORTRAN
• Spice 3
• Written in C language
Spice from Different Vendors 5

SPICE-Compatible Vendor
HSPICE Metasoftware
PSPICE Microsim Corporation
IS-Spice IntuSoft
Micro-Cap IV, V Spectrum Software
CountecSpice Countec Microelectronics
TurboSpice Deutsch Research
Tspice Tanner Research

Spectre Cadence
How Does Spice Work 6

• Analysis is done by using nodal equations

• The analysis is based on linear equations
• For non-linear circuits/components, the equations are linearized
using iterations process.
• The typical iteration process used is Newton-Raphson method.
How to Use Spice 7

1. Prepare the netlist by:

1. Create the schematic diagram of the circuit.
2. Give each component in the circuit a name.
3. Identify and number all the nodes in the circuit.
4. Assign each component its value or size.

*Some Spice programs have GUI where the schematic is

drawn, and it automatically generates the netlist.
How to Use Spice 8

2. Indicate the type of analysis to be done.

3. Run the simulation.
Spice Netlist File 9

• Also called the spice deck or the source code.

• A text-based file. Some of the text editors that
may be used to create this file
• MS-DOS editor (EDIT)
• Notepad
• Visual Editor (VI)
Spice Netlist File 10

• Extension file names:

• Filename.cir = winspice
• Filename.sp = Tspice
Spice Netlist File 11

• Contains the following:

• Title
• Circuit Description (data statement)
• Components
• Nodes
• Component models
• Sources
• Analysis description (control statement)
• Output description
• End of File statement
Example of Spice Netlist 12

Circuit1 Node voltage analysis Title

Is 0 1 DC 6A
Sources
Vs 4 0 DC 3V
R1 1 0 1
Components
R2 3 0 2
R3 3 4 3
Rout 1 3 1
.op
Analysis
.dc Vs 3V 5V 1V
.print DC V(1) V(3) V(1,3) Output
.END
What to Remember About the Netlist 13

• The first line, the title line, may contain any type of text.
• The last line must be the .END statement.
• Each line in the spice deck is called a spice card.
• The order of the remaining lines is not important and does
not affect simulation.
• If a statement is more than one line, the statement can
continue in the next line by putting a plus (+) sign in the first
column of the next line.
What to Remember About the Netlist 14

• A comment line may be inserted anywhere, with an

asterisk (*) before the comment.
• The number of blanks or spaces between items is not
significant.
• Spice statements can be uppercase or lowercase
although the original SPICE2 uses uppercase.
• Spice by default knows the electrical units; electrical
units may or may not be written.
Components in Spice 15

• Each component is designated a letter symbol.

• The name of the circuit element can be 8 characters
long.
• Example:
• Rreferenc
• The name can contain either letters or numbers or a
combination of both.
• Cbias1, Cbias2, L3
Letter Designation for Each Component 16

B GaAsFET K Transformer
C Capacitor L Inductor
D Diode M MOSFET
E Voltage-controlled voltage source Q BJT
F Current-controlled current source R Resistor
S Voltage-controlled switch
H Voltage-controlled current source
T Transmission line
I Independent current source
V Independent voltage source
J JFET
W Current-controlled switch
Spice Scale Convention 17

• Kilo – k, K
• Mega – Meg, MEG, meg
• Giga – g, G
• Tera – T, t
• Micro – u, U
• Milli – m, M
• Nano – n, N
Spice Scale Suffixes 18

Name Valid Spice Format

Kilo 6.8k, 6.8K, 6k8, 6.8e3
Mega 6.8meg, 6.8e+06
Giga 6.8g, 6.8G, 6g8, 6.8e09
Tera 6.8T, 6T8, 6.8e12
Milli 6.8m, 6.8M, 6m7, 6.8e-3
Micro 6.8u, 6u8, 6.8e-6
Nano 6.8n, 6n8, 6.8e-9
Pico 6.8p, 6p8, 6.8e-12
Femto 6.8f, 6F8, 6.8e-15
Component Description 19

Passive Components (Resistor, Capacitor, Inductor)

Format:
<component name> <+node> <-node> <value>
Example:
Voltage divider
R1 1 2 1k
R2 2 0 2meg
.end
Component Description 20

• Semiconductor
• Two statements are required to describe a
semiconductor component
• Component description statement
• Model statement
 Component Description 21
• Diode
Format:
D<name> <NA> <NK> <model name>

Example: 7 Diode AND gate

Rload D1 5 6 mod1
D1
D2 4 6 mod1
5
Rload 7 6 100
D2
4 6 .model mod1 D
.end
Component Description 22

• BJT
Format: Differential Amplifier
Q<name> <C> <B> <E> <model name> model Q1 7 7 6 Model1
<model name> <type> [model parameters] Q2 2 7 6 Model1
Q3 4 7 6 Model1
Q4 2 1 3 Model2
6
Example: Q5 4 5 3 Model2
Q2
Q1 Q3 .model model1 pnp
.model model2 npn
7 .end
2 4
1 5
Q4 Q5

3
 Component Description 23
• MOSFET
Format:
M<name> <D> <G> <S> <B> modelname [L=<value>] + MOS Differential amp
[W=<value>] M1 2 2 6 6 pch
6 M2 5 2 6 6 pch
Example: M3 2 1 3 0 nch
M1
2
M2
M4 5 4 3 0 nch

M3 M4
5 .model pch pmos
1 4 .model nch nmos
3 .end
Source Description 24

Source types:
1. Dc 5. Polynomial
2. Sinusoidal 6. Piece-wise linear
3. Pulse 7. Single-frequency
4. Exponential modulation
Voltage and Current Source Description 25

• DC Source
Format:
<source name> <+node> <-node> <source type> <value>
Example: 1 2

R1 Voltage divider
1k 
Vi, 5V R2 Vi 1 0 5V
2M 
R1 1 2 1k
R2 2 0 2meg
0 .end
Voltage and Current Source Description 26

• AC Source Where:
Sinusoidal Source Format: Vo = offset voltage
Va = peak voltage
Sin (Vo Va Freq) Freq = frequency

Example:
1N4001
Dhw
Half wave rectifier
in out Vi in ground sin (0 311 60)
Dhw in out D1N4001
Vi Rout out ground 1k
Rout
220V
60Hz 1k .end
ground
Voltage and Current Source Description 27

• AC Source
Format: Transistor circuit
Vi 1 0 AC 1
<sourcename> <+node> <-node> AC <magnitude> <phase> Vcc 6 0 DC 10V
6 Rs 1 2 600
VCC
10V C1 2 3 10u
Example: RC 3.3k
C2
R1 6 3 27k
R1 27k 4 Vout R2 3 0 4.7k
1
Rs 2
C1
3
10u
Rc 6 4 3.3k
Q1 RL 20k RE 5 0 680
600 10u 5
C2 4 vout 10u
AC Vi
R2 4.7k
RE 680
RL vout 0 20k
Q1 4 3 5 npnmod
0 .end
Voltage and Current Source Description 28

• Piecewise Linear Input Format:

V
PWL (T1 V1 T2 V2 ……. TN VN) 6

Example: 3
2
PWL (0 3 10us 3V 15us 6V 40us 6V 45us
+ 2V 60us 2V) 0 T,US
T1 T2 T3 T4 T5 T6
0 10 15 40 45 60
 Voltage and Current Source Description 29

• Piecewise Linear Input Format

R1 L1
Vs
1 2
3 RLC circuit
1.5mH
10 60 Vs 1 0 PWL (0 0 10ns 10V 2ms 10V)
3A +
C1 R1 1 2 60
AC
Vs
4V
2.5uF
R2
20
L1 2 3 1.5m
0
- C1 3 0 2.5uF
t
10ns 2ms R2 3 0 20
0 .end
Pulse Source 30

Format:
Pulse (V1 V2 TD TR TF PW PER) V2
where: V1 – initial voltage
V2 – pulsed voltage
V1
TD – time delay
TR – rise time
PW
TF – fall time TD TR
PER
TF

PW – pulse width
PER - period
Seatwork: 1. Write the netlist for the following circuit: 31
Seatwork: 2. Write the netlist for the following circuit: 32

6
VCC
5V
Q2
Q1 Q3

7 2 4
1 5
IREF Q4 Q5
1mA
3
8
VEE
-5V
Seatwork: 1. Write the netlist for the following circuit: 33

RLC circuit
R1 1 2 60
L1 2 3 1.5m
C1 3 0 2.5uF
R2 3 0 20
.end
Seatwork: 2. Write the netlist for the following circuit: 34

6 Differential Amplifier
VCC VCC 6 0 5V
Q2
5V VEE 3 0 -5V
Q1 Q3 Iref 7 8 1mA
Q1 7 7 6 Model1
Q2 2 7 6 Model1
7 2 4 Q3 4 7 6 Model1
1 5 Q4 2 1 3 Model2
IREF Q4 Q5 Q5 4 5 3 Model2
1mA
3
8 .model model1 pnp
VEE .model model2 npn
-5V .end