MICROPROCESSORS AND

MICROCONTROLLERS

UNIT-V
MICROCONTROLLERS - 8051
Presented by

M.Dharani
Assistant Professor
Dept. of ECE
AITS,Tirupati
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Contents

8051 Microcontrollers
Block Diagram of 8051
Memory Organization
Addressing Modes
Architectural Features of 8096

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 The 8051 microcontroller
• a Harvard architecture (separate
instruction/data memories)
• single chip microcontroller (µC)
• developed by Intel in 1980 for use in
embedded systems.
• today largely superseded by a vast range of
faster and/or functionally enhanced 8051-
compatible devices manufactured by more
than 20 independent manufacturers
 Block Diagram
External interrupts
On-chip Timer/Counter

Interrupt ROM for

On-chip Timer 1 Counter
Control program
RAM Timer 0 Inputs
code

CPU

Bus Serial
4 I/O Ports
OSC Control Port

P0 P1 P2 P3 TxD RxD
Address/Data
 Comparison of the 8051 Family Members

Feature 8051 8052 8031

ROM (program space in bytes) 4K 8K 0K
RAM (bytes) 128 256 128
Timers 2 3 2
I/O pins 32 32 32
Serial port 1 1 1
Interrupt sources 6 8 6
 Pin Description of the 8051

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 )P0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2
P
) 0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 )P2.5(A13
(WR)P3.6 16 25 P
) 2.4(A12
(RD)P3.7 17 24 )P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8) 
 Pins of 8051 （ 1/4 ）

• Vcc （ pin 40 ）：
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
• GND （ pin 20 ）： ground
• XTAL1 and XTAL2 （ pins 19,18 ）：
– These 2 pins provide external clock.
– Way 1 ： using a quartz crystal oscillator
– Way 2 ： using a TTL oscillator
– Example 4-1 shows the relationship between XTAL
and the machine cycle.
 Pins of 8051 （ 2/4 ）

• RST （ pin 9 ）： reset

– It is an input pin and is active high （ normally low ） .
• The high pulse must be high at least 2 machine cycles.
– It is a power-on reset.
• Upon applying a high pulse to RST, the microcontroller will
reset and all values in registers will be lost.
• Reset values of some 8051 registers
– Way 1 ： Power-on reset circuit
– Way 2 ： Power-on reset with debounce
 Pins of 8051 （ 3/4 ）

• /EA （ pin 31 ）： external access

– There is no on-chip ROM in 8031 and 8032 .
– The /EA pin is connected to GND to indicate the code is stored
externally.
– /PSEN ＆ ALE are used for external ROM.
– For 8051, /EA pin is connected to Vcc.
– “/” means active low.
• /PSEN （ pin 29 ）： program store enable
– This is an output pin and is connected to the OE pin of the ROM.
– See Chapter 14.
 Pins of 8051 （ 4/4 ）

• ALE （ pin 30 ）： address latch enable

– It is an output pin and is active high.
– 8051 port 0 provides both address and data.
– The ALE pin is used for de-multiplexing the address and data by
connecting to the G pin of the 74LS373 latch.
• I/O port pins
– The four ports P0, P1, P2, and P3.
– Each port uses 8 pins.
– All I/O pins are bi-directional.
 Figure 4-2 (a). XTAL Connection to 8051

XTAL1
• Using a quartz crystal oscillator
• We can observe the frequency on the XTAL2 pin.


Figure 4-2 (b). XTAL Connection to an External Clock Source

N XTAL2
C
• Using a TTL oscillator
• XTAL2 is unconnected. EXTERNAL
OSCILLATOR
SIGNAL XTAL1

GND


 RESET Value of Some 8051 Registers:

Register Reset Value

PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000
RAM are all zero.

 Figure 4-3 (a). Power-On RESET Circuit
Vcc

10 uF 31
EA/VPP
30 pF X1
19
11.0592 MHz
8.2 K
X2
18
30 pF
9 RST


Figure 4-3 (b). Power-On RESET with Debounce

Vcc

31
EA/VPP
X1
10 uF 30 pF

X2
RST
9
8.2 K


 Pins of I/O Port

• The 8051 has four I/O ports

– Port 0 （ pins 32-39 ）： P0 （ P0.0 ～ P0.7 ）
– Port 1 （ pins 1-8 ） ： P1 （ P1.0 ～ P1.7 ）
– Port 2 （ pins 21-28 ）： P2 （ P2.0 ～ P2.7 ）
– Port 3 （ pins 10-17 ）： P3 （ P3.0 ～ P3.7 ）
– Each port has 8 pins.
• Named P0.X （ X=0,1,...,7 ） , P1.X, P2.X, P3.X
• Ex ： P0.0 is the bit 0 （ LSB ） of P0
• Ex ： P0.7 is the bit 7 （ MSB ） of P0
• These 8 bits form a byte.
• Each port can be used as input or output (bi-direction).

 Registers
A

R0
DPTR DPH DPL
R1

R2 PC PC
R3

R4 Some 8051 16-bit Register

R5

R6

R7

Some 8-bitt Registers of

the 8051
Memory Map (RAM)
 CPU timing
• Most 8051 instructions are executed in one cycle.
• MUL (multiply) and DIV (divide) are the only
• instructions that take more than two cycles to complete (four
cycles)
• Normally two code bytes are fetched from the program
memory during every machine cycle.
• The only exception to this is when a MOVX instruction is
executed. MOVX is a one-byte, 2-cycle instruction that
accesses external data memory.
• During a MOVX, the two fetches in the second cycle are
skipped while the external data memory is being addressed
and strobed.
8051 machine cycle
 Example :

Find the machine cycle for

(a) XTAL = 11.0592 MHz
(b) XTAL = 16 MHz.

Solution:

(a) 11.0592 MHz / 12 = 921.6 kHz;

machine cycle = 1 / 921.6 kHz = 1.085 s
(b) 16 MHz / 12 = 1.333 MHz;
machine cycle = 1 / 1.333 MHz = 0.75 s


Edsim51 emulator diagram
KitCON-515 schematic
 Timers
• 8051 has two 16-bit on-chip timers that can be
used for timing durations or for counting
external events
• The high byte for timer 1 (TH1) is at address
8DH while the low byte (TL1) is at 8BH
• The high byte for timer 0 (TH0) is at 8CH while
the low byte (TL0) is at 8AH.
• Timer Mode Register (TMOD) is at address
88H
 Timer Mode Register
• Bit 7: Gate bit; when set, timer only runs while \INT high.
(T0)
• Bit 6: Counter/timer select bit; when set timer is an event
counter when cleared timer is an interval timer (T0)
• Bit 5: Mode bit 1 (T0)
• Bit 4: Mode bit 0 (T0)
• Bit 3: Gate bit; when set, timer only runs while \INT high.
(T1)
• Bit 2: Counter/timer select bit; when set timer is an event
counter when cleared timer is an interval timer (T1)
• Bit 1: Mode bit 1 (T1)
• Bit 0: Mode bit 0 (T1)
 Timer Modes
• M1-M0: 00 (Mode 0) – 13-bit mode (not
commonly used)
• M1-M0: 01 (Mode 1) - 16-bit timer mode
• M1-M0: 10 (Mode 2) - 8-bit auto-reload mode
• M1-M0: 11 (Mode 3) – Split timer mode
8051 Interrupt Vector Table
 The Stack and Stack Pointer
• The Stack Pointer, like all registers except DPTR and PC, may hold an 8-bit (1-byte)
value.
• The Stack Pointer is used to indicate where the next value to be removed from the
stack should be taken from.
• When you push a value onto the stack, the 8051 first increments the value of SP
and then stores the value at the resulting memory location.
• When you pop a value off the stack, the 8051 returns the value from the memory
location indicated by SP, and then decrements the value of SP.
• This order of operation is important. When the 8051 is initialized SP will be
initialized to 07h. If you immediately push a value onto the stack, the value will be
stored in Internal RAM address 08h. This makes sense taking into account what
was mentioned two paragraphs above: First the 8051 will increment the value of
SP (from 07h to 08h) and then will store the pushed value at that memory address
(08h).
• SP is modified directly by the 8051 by six instructions: PUSH, POP, ACALL, LCALL,
RET, and RETI. It is also used intrinsically whenever an interrupt is triggered
 80C51 Block Diagram

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 80C51 Memory

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 8051 Memory
• The data width is 8 bits
• Registers are 8 bits
• Addresses are 8 bits
– i.e. addresses for only 256 bytes!
– PC is 16 bits (up to 64K program memory)
– DPTR is 16 bits (for external data - up to 64K)
• C types
– char - 8 bits <-- use this if at all possible!
– short - 16 bits
– int - 16 bits
– long - 32 bits
– float - 32 bits
• C standard signed/unsigned

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 Accessing External Memory

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 Program Memory
• Program and Data memory are separate
• Can be internal and/or external
– 20K internal flash for the Atmel controller
• Read-only
– Instructions
– Constant data

char code table[5] =

{‘1’,‘2’,‘3’,‘4’,‘5’} ;

– Compiler uses instructions for moving “immediate” data

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 External Data Memory
• External Data - xdata
– Resides off-chip
– Accessed using the DPTR and MOVX instruction
– We will not use xdata
– We will use the SMALL memory model
• all data is on-chip
• limited to only ~128 bytes of data!

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 Internal Data Memory
• Internal data memory contains all the
processor state
– Lower 128 bytes: registers, general data
– Upper 128 bytes:
• indirectly addressed: 128 bytes, used for the stack
(small!)
• directly addressed: 128 bytes for “special” functions

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 Lower 128 bytes
• Register banks, bit addressable data, general
data
– you can address any register!
– let the C compiler deal with details (for now)

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 Data Memory Specifiers
• “data” - first 128 bytes, directly addressed
– the default
• “idata” - all 256 bytes, indirectly addressed (slower)
• “bdata” - bit-addressable memory
– 16 bytes from addresses 0x20 to 0x2F
– 128 bit variables max
bit flag1, flag2;
flag1 = (a == b);
– can access as bytes or bits

char bdata flags;

sbit flag0 = flags ^ 0; /* use sbit to “overlay” */
sbit flag7 = flags ^ 7; /* ^ specifies bit */
flags = 0; /* Clear all flags */
flag7 = 1; /* Set one flag */

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 Upper 128 bytes: SFR area

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 Accessing SFRs
• The interesting SFRs are bit-addressable
– addresses 0x80, 0x88, 0x90, . . . , 0xF8
• SFRs can be addressed by bit, char or int

sbit EA = 0xAF; /* one of the interrupt enables

sfr Port0 = 0x80; /* Port 0 */
sfr16 Timer2 = 0xCC; /* Timer 2 */
sbit LED0 = Port1 ^ 2; /* Define a port bit */

EA = 1; /* Enable interrupts */
Port0 = 0xff; /* Set all bits in Port 0 to 1
if (Timer2 > 100) . . .
LED0 = 1; /* Turn on one bit in Port 2 */

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 Ports
• Port 0 - external memory access
– low address byte/data
• Port 2 - external memory access
– high address byte
• Port 1 - general purpose I/O
– pins 0, 1 for timer/counter 2
• Port 3 - Special features
– 0 - RxD: serial input
– 1 - TxD: serial output
– 2 - INT0: external interrupt
– 3 - INT1: external interrupt
– 4 - T0: timer/counter 0 external input
– 5 - T1: timer/counter 1 external input
– 6 - WR: external data memory write strobe
– 7 - RD: external data memory read strobe

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 Ports

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 Ports
• Port 0 - true bi-directional
• Port 1-3 - have internal pullups that will source
current
• Output pins:
– Just write 0/1 to the bit/byte
• Input pins:
– Output latch must have a 1 (reset state)
• Turns off the pulldown
• pullup must be pulled down by external driver
– Just read the bit/byte
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 Program Status Word
• Register set select
• Status bits

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 Instruction Timing
• One “machine cycle” = 6 states (S1 - S6)
• One state = 2 clock cycles
– One “machine cycle” = 12 clock cycles
• Instructions take 1 - 4 cycles
– e.g. 1 cycle instructions: ADD, MOV, SETB, NOP
– e.g. 2 cycle instructions: JMP, JZ
– 4 cycle instructions: MUL, DIV

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 Instruction Timing

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 Timers
• Base 8051 has 2 timers
– we have 3 in the Atmel 89C55
• Timer mode
– Increments every machine cycle (12 clock cycles)
• Counter mode
– Increments when T0/T1 go from 1 - 0 (external signal)
• Access timer value directly
• Timer can cause an interrupt
• Timer 1 can be used to provide programmable baud rate for serial
communications
• Timer/Counter operation
– Mode control register (TMOD)
– Control register (TCON)

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 Mode Control Register (TMOD)
• Modes 0-3
• GATE - allows external pin to enable timer
(e.g. external pulse)
– 0: INT pin not used
– 1: counter enabled by INT pin (port 3.2, 3.3)
• C/T - indicates timer or counter mode

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 Timer/Counter Control Register (TCON)

• TR - enable timer/counter
• TF - overflow flag: can cause interrupt
• IE/IT - external interrupts and type control
– not related to the timer/counter

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 Timer/Counter Mode 0
• Mode 1 same as Mode 0, but uses all 16 bits

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 Timer/Counter Mode 2
• 8-bit counter, auto-reload on overflow

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 Timer/Counter Mode 3
• Applies to Timer/Counter 0
• Gives an extra timer

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 Interrupts
• Allow parallel tasking
– Interrupt routine runs in “background”
• Allow fast, low-overhead interaction with environment
– Don’t have to poll
– Immediate reaction
• An automatic function call
– Easy to program
• 8051 Interrupts
– Serial port - wake up when data arrives/data has left
– Timer 0 overflow
– Timer 1 overflow
– External interrupt 0
– External interrupt 1

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 Interrupt Vector
• For each interrupt, which interrupt function to call
• In low program addresses
0x00 - Reset PC address
0: 0x03 - External interrupt 0
1: 0x0B - Timer 0
2: 0x13 - External interrupt 1
3: 0x1B - Timer 1
4: 0x23 - Serial line
interrupt

– Hardware generates an LCALL to address in interrupt vector

– Pushes PC (but nothing else) onto the stack
– RETI instruction to return from interrupt

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 Writing Interrupts in C
• The C compiler takes care of everything
– Pushing/popping the right registers (PSW, ACC, etc.)
– Generating the RTI instruction
– No arguments/no return values

unsigned int count;

unsigned char second;

void timer0 (void) interrupt 1 using 2 {

if (++count == 4000) {
second++;
count = 0;
}
}

– Timer mode 2
– Reload value = 6

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 Timer Interrupts
• Wakeup after N clock cycles, i.e. at a specified
time
• Wakeup every N clock cycles (auto reload)
– Allows simple task scheduling
– Clients queue function calls for time i
– Interrupt routine calls functions at the right time
• Wakeup after N events have occurred on an
input

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 Design Problem 1 - frequency counter

• Measure the frequency of an external signal

• Display as a number using the 7-segment
display
– e.g. number represents exponent of 2 or 10

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 Example Timer Setup
• What does this setup do?
TMOD = 0x62; // 01100010;
TCON = 0x50; // 01010000;
TH1 = 246;
TH0 = 6;

IE = 0x8A; // 10001010;

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 Using the timers
void counterInterrupt ( void ) interrupt 3 using 1 {
timeLow = TL0;
TL0 = 0;
timeHigh = count;
count = 0;
if (timeHigh == 0 && timeLow < 10) *ledaddress = 0x6f;
else if (timeHigh == 0 && timeLow < 100) *ledaddress = 0x6b;
else if (timeHigh < 4) *ledaddress = 0x02;
else if (timeHigh < 40) *ledaddress = 0x04;
else if (timeHigh < 400) *ledaddress = 0x08;
else if (timeHigh < 4000) *ledaddress = 0x10;
else if (timeHigh < 40000) *ledaddress = 0x20;
else *ledaddress = 0xf0; // default
}

void timerInterrupt ( void ) interrupt 1 using 1 {

count++;
}

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Design Problem 2 - Measure the pulse width

• Problem: send several bits of data with one

wire
– Serial data
• precise, but complicated protocol
– Pulse width
• precise enough for many sensors
• simple measurement

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Design Problem 3 - Accelerometer Interface

• Accelerometer
– Two signals, one for each dimension
– Acceleration coded as the duty cycle
• pulse-width/cycle-length
• cycle time = 1ms - 10ms (controlled by resistor)
– 1ms gives faster sampling
– 10ms gives more accurate data

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Controlling Interrupts: Enables and Priority

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 Interrupt Controls

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 Interrupt Priorities
• Two levels of priority
– Set an interrupt priority using the interrupt priority register
– A high-priority interrupt can interrupt an low-priority
interrupt routine
– In no other case is an interrupt allowed
– An interrupt routine can always disable interrupts explicitly
• But you don’t want to do this
• Priority chain within priority levels
– Choose a winner if two interrupts happen simultaneously
– Order shown on previous page

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 Re-entrant Functions
• A function can be called simultaneously be different processes
• Recursive functions must be re-entrant
• Functions called by interrupt code and non-interrupt code must be
re-entrant
• Keil C functions by default are not re-entrant
– Does not use the stack for everything
– Use the reentrant specifier to make a function re-entrant

int calc (char i, int b) reentrant {

int x;
x = table[i];
return (x * b);
}

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 External Interrupts
• Can interrupt using the INT0 or INT1 pins (port 3:
pin 2,3)
– Interrupt on level or falling edge of signal (TCON
specifies which)
– Pin is sampled once every 12 clock cycles
• for interrupt on edge, signal must be high 12 cycles, low 12
cycles
– Response time takes at least 3 instuctions cycles
• 1 to sample
• 2 for call to interrupt routine
• more if a long instruction is in progress (up to 6 more)

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