DC Biasing—BJTs

)
Introdution
 Penggunaan hubungan dasar Transistor
≌ 0.7 V
≌
Operating Point
For the BJT to be biased in its linear or active operating region
the following must be true:
1. The base–emitter junction must be forward-biased (p-region
voltage more positive), with a resulting forward-bias voltage
of about 0.6 V to 0.7 V.
2. The base–collector junction must be reverse-biased (n-
region more positive), with the reverse-bias voltage being
any value within the maximum limits of the device.
Operation in the cutoff, saturation, and linear regions of the BJT
characteristic are provided as follows:
1. Linear-region operation:
Base–emitter junction forward-biased
Base–collector junction reverse-biased
2. Cutoff-region operation:
Base–emitter junction reverse-biased
Base–collector junction reverse-biased
3. Saturation-region operation:
Base–emitter junction forward-biased
Base–collector junction forward-biased
FIXED-BIAS CONFIGURATION
Forward
  Bias of Base–Emitter
Collector–Emitter
   Loop

jika = 0 maka
jika = 0 maka
Transistor Saturation
The
  resulting saturation current for the fixed-bias configuration

0V
  Load-Line Analysis

The end points of the load line:

& =0

&
Circuit Value Affect the Q-Point
EMITTER-BIAS CONFIGURATION
 Dengan menambahkan pada emitter dapat membuat circuit bias menjadi stabil
  Base–Emitter Loop
  Collector–Emitter Loop

dari
Jadi
Improved
   Bias Stability
 Stabilitas mengacu pada kondisi rangkaian dimana kondisi arus dan tegangan konstan pada berbagai
suhu dan nilai transistor β
 Dengan menambah pada emitter untuk membuat transistor stabil
 Fixes bias circuit Emitter stabilized bias circuit

 pada fixed bias tidak dapat dirubah, tetapi bila dirubah dengan mengunakan beta hasil pada output
akan besar.
  
Saturation Level

& & =0
VOLTAGE-DIVIDER BIAS
CONFIGURATION
•  
Approximate Analysis
• :
]
• β:

• Dari hukum kirchoff tegangan

≌
•  Voltage Divider Bias Analysis
• Transistor saturation level

• Load line Analysis

Cutoff: &
• Saturation
& =0
•  Base Emitter loop and DC bias collector
 Collector–Emitter Loop
   Base Emiter Bias Analysis
 Transistor saturation level

 Load line Analysis

Cutoff: &
 Saturation
& =0
Transistor Switching Networks
Transistor diaplikasikan pada sumber DC untuk digunakan sebagai perangkat saklar elektronik.
•  Switching circuit calculations
• Saturation current

• To ensure saturation

• Emitter-collector resistance
at saturation and cutoff:
Switching Time
 Transistor switching times:
Troubleshooting Hints
 Approximate voltages
.7 V for silicon Transistor
25% - 75% of
Test for opens and shorts with an ohmmeter.
Test the solder joints.
Test the transistor with a transistor tester or a curve tracer.
Note that the load or the next stage affects the transistor operation.
PNP Transistors
The analysis for pnp transistor biasing circuits is the same as that for npn transistor circuits. The
only difference is that the currents are flowing in the opposite direction.