FLIP-FLOPS

INDEX
Introduction to Flip Flops
Classification of Flip Flops
S R Flip Flop
J K Flip Flop
 MASTER SLAVE JK Flip Flop
 T Flip Flop
 D Flip Flop
Applications
INTRODUCTION TO FLIP FLOPS
FLIP FLOP is a basic
memory storage device
in a digital system of
electronics.
It is bi-stable device.
It is used to store one
bit of information with 0
bit or 1 bit.
It has two outputs, one
output is complement
of other.
It is a sequential
circuits.
 MAINS
MAINS R-SR-S FLIP
FLIP FLOP J-KJ-K
FLOP FLIP
FLIP FLOP J-K FLIP FLOP
FLOP
J-K FLIP FLOP

CLOCK
CLOCKSIGNAL
SIGNAL

INPUT TERMINALS
INPUT TERMINALS

BATTERY (5V)
BATTERY (5V)

BREADBOAD
OUTPUT
OUTPUT INDICATORS
BREADBOA
INDICATORS
D
 S-R FLIP FLOP
The S-R flip flop is a basic
memory device.
Stores information in the
binary form.
‘S’ stands for SET state and ‘R’
stands for RESET state.
It can be built using logic
CLOCK S R Q Q’
gates NAND gate or NOR gate. 0 X X Q(Prv) Q’(Prv)
Edge triggered either positive clk
1 0 1 0 1
or negative. 1 1 0 1 0
1 0 0 Q(Prv) Q’(Prv)
1 1 1 NOT ALLOWED
CONNECTIONS FOR SR FLIP FLOP
 J - K FLIP FLOP
The invalid state of S-R Flip
flop when S=R=1 can be
eliminated by converting it
into a J-K Flip flop.
J-K flip flop is the most widely
used of all the flip flop
designs and is considered to
be a universal flip flop circuit.
The sequential operation of
the J-K Flip flop is exactly
same as for the previous S-R
Flip flop.
 TRUTH TABLE FOR JK FLIP FLOP:

PREVIOUS PRESENT
Clock J K Q Q’ S R Q Q’
1 1 0 1 0 0 0 1 0
0 1 1 0 1 0
1 0 1 1 0 0 1 0 1
0 1 0 0 0 1
1 0 0 1 0 0 0 1 0
0 1 0 0 0 1
1 1 1 1 0 0 1 0 1
0 1 1 0 1 0
CONNECTIONS FOR JK FLIP FLOP:
RACE AROUND CONDITION

When J=K=1 and CLK=1, the output will continue to

change from Q' to Q and from Q to Q'. This oscillating
output is called race around condition.

This race around condition can ne avoided by using

Master Slave JK Flip flop
 MASTER-SLAVE J-K FLIP FLOP
Master slave JK flip flop
eliminates the timing problem
by using 2 SR Flip flops
connected in series
configuration.

As the 2nd flip-flop follows the

1st one, it is referred as the slave
and 1st one as master.

The state of the master-slave

Flip flop change at the negative
edge of clock pulse so it is
known as negative edge trigger
flip flop.
 TRUTH TABLE FOR MASTER SLAVE JK
FLIP FLOP:

INPUT OUTPUT
Clock J K Qn+1 Q’n+1 Remarks

0 0 0 Qn Q’n No change
1 0 0 Qn Q’n No change
1 0 1 0 1 Reset
1 1 0 1 0 Set
1 1 1 Q’n Qn Toggles
 Introduction to D-FLIP FLOP
 It has only one input
referred to as DELAY input
or data input

 It works as memory
device to store 1-bit of
information.
INPUT OUTPUT
D Q
0 1
1 1
CONNECTIONS FOR D FLIP FLOP:
 Introduction to T - FLIP FLOP
In a J-K Flip flop, if J=K, the
resulting flip flop is referred
as a T-flip flop.

It has only one input.

If T=1 it is act as a toggle

switch.
TRUTH TABLE:
INPUT OUTPUT
T Q
0 Q(Prv)
1 Q’(Prv)
CONNECTIONS FOR T FLIP FLOP:
 PRECAUTIONS
 All connections should be tight.

POSTIVE and NEGATIVE end of led should be

checked properly before inserting in
breadboard. 

A resistance should be used in series with LED

so that LED don’t get damaged.

Turn off the circuit when you make any changes

in the circuit.
 APPLICATIONS OF FLIP FLOPS
 Counters- It is an electronics device which is used to count
the clock signals. Counters will have memory since they have to
remember the past states of digital circuit and hence they
consist of flip flops in their structure. Counters are used as
digital clocks.

Registers- flip flop can store a single bit of data i.e. 1 or 0

registers are used to store multiple bits of data. A number of flip
flops are connected in series to form a register. The stored
information can be transferred within the registers these are
called as shift registers.
FOR PIPO REGISTERS
THANK YOU FOR YOUR ATTENTION.

BY:
ANIKA CHABBA(31627)
MANGLADEEP (31634)
HARMANPREET (31644)