Professional Documents
Culture Documents
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contents
• Register Transfer Language
• Register Transfer
• Arithmetic Microoperations
• Logic Microoperations
• Shift Microoperations
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Register Transfer Language (RTL)
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cont.
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cont..
Registers are designated by capital letters, sometimes
followed by numbers (e.g., A, R13, IR)
Often the names indicate function:
• MAR-memory address register (holds an address for a
memory unit)
• PC-program counter
• IR-instruction register
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Registers and their contents can be viewed and
represented in various ways
Designation of a register:
a register
portion of a register
a bit of a register
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cont…
• Copying the contents of one register to another is a register
transfer. It indicated as R2 ← R1
• This statement denotes a transfer of the content of register R1
into register R2
• In this case the contents of register R2 are copied (loaded)
from register R1
• A simultaneous transfer of all bits from the source R1 to the
destination register R2, during one clock pulse
• Note that this is a non-destructive; i.e. the contents of R1 are
not altered by copying (loading) them to R2
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cont.
• Control functions
• Conditional transfer occurs only under a control condition
• Often actions need to only occur if a certain condition is true
o This is similar to an “if” statement in a programming
language
o In digital systems, this is often done via a control signal,
called a control function
• If the transfer is to occur only under a predetermined control
condition, designate it by If (P = 1) then (R2 ← R1) or,
• P:R2← R1,
• where P is a control function that can be either 0 or 1
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Cont.
Hardware implementation of a controlled transfer: P: R2 ← R1
R1
t t+1
Timing diagram
Clock
Synchronized
Load
with the clock
Transfer occurs here
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cont.
Basic Symbols for Register Transfers
Symbol Description Examples
Letters & Denotes a register MAR, R2
numerals
Parenthesis ( ) Denotes a part of a R2(0-7), R2(L)
register
Arrow ← Denotes transfer of R2 ← R1
information
Comma , Separates two R2 ← R1, R1 ← R2
microoperations
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Bus and Memory Transfers
• In a digital system with many registers, it is impractical to have data and control lines to directly allow
each register to be loaded with the contents of every possible other registers
• To completely connect n registers n(n-1) lines
• Rather than connecting wires between all registers, a common bus is used
• A bus structure consists of a set of common lines, one for each bit of a register
• Control signals determine which register is selected by the bus during each transfer
• Multiplexers can be used to construct a common bus
• Multiplexers select the source register whose binary information is then placed on the bus. The select
lines are connected to the selection inputs of the multiplexers and choose the bits of one register
• •
12
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Cont.
• The selection lines choose the four bits of one register and
transfer them in to the four line common bus.
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Cont..
• The transfer of information from a bus into one of many
destination registers is done:
– By connecting the bus lines to the inputs of all destination
registers and then:
– activating the load control of the particular destination
register selected
• We write: R2 ← C to symbolize that the content of register C
is loaded into the register R2 using the common system bus
• It is equivalent to: BUS ←C, (select C)
R2 ←BUS (Load R2)
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Memory Transfer
• Memory read : Transfer from memory
• Assume that the address of a memory unit is stored in a register called the
Address Register AR
• Lets represent a Data Register with DR, then:
• Read: DR ← M[AR]
• Write: M[AR] ← DR
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Microoperations
R3 ←R1+R2
• Subtraction Microoperation: 1’s complement
R3 ←R1-R2 or : R3 ←R1+R2+1
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cont....
• One’s Complement Microoperation:
R2 ←R2
• Two’s Complement Microoperation:
R2 ←R2+1
• Increment Microoperation:
R2 ←R2+1
• Decrement Microoperation:
R2 ←R2-1
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A binary adder is a digital circuit that generates the
arithmetic sum of two binary numbers of any length
• A binary added is constructed with full-adder circuits
connected in cascade
• An n-bit binary adder requires n full-adders
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The addition and subtraction operations can be combined
into one common circuit by including an XOR gate with
each full-adder
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The above circuit can implement all of the following
operations
Operation Microoperation A B M S
Add R3 R1 + R2 R1 R2 0 R3
Subtract R3 R1 – R2 R1 R2 1 R3
2’s Comp R2 R2 + 1 0 R2 1 R2
Increment R1 R1 + 1 1 R1 0 R1
Decrement R1 R1 – 1 R1 0 1 R1
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Cont..
• The mode input M controls the operation
• When M=0, the circuit is an adder and
• B 0=B and the input carry is 0, then A+B
• When M=1, the circuit becomes subtractor
B 1=B’ and the input carry is 1, then A plus 2’complement
of B
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Binary Incrementer
• The increment microoperation adds one to a number in a
register
• This can be implemented by using a binary counter – every
time the count enable is active, the count is incremented by one
• If the increment is to be performed independent of a particular
register, then use half-adders connected in cascade
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Logic Microoperations
Logic operations specify binary operations for strings of bits stored in
registers and treat each bit separately
These operations process the data in the registers bit-wise. i.e. bit
by bit.
• There are many possible logic operations.
• However, the following are the most common (and useful).
– Clear (set to 0) F 0
– AND FAB
– OR FAB
– XOR FAB
– NOT FA
– Set (set to 1) F1
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cont.
Example:
the XOR of R1 and R2 is symbolized by
P: R1 ← R1 ⊕ R2 •
R1 = 1010 and R2 = 1100
Content of R1 1010
Content of R2 1100
Content of R1 0110 after P = 1
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There are 16 different logic operations that can be performed with two
binary variables
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Applications of logic microoperations
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Selective set
In a selective set operation, the bit pattern in B is used to set certain
bits in A
Selective complement
In a selective complement operation, the bit pattern in B is used to
complement certain bits in A
Mask operation
In a mask operation, the bit pattern in B is used to clear certain bits in A
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Insert operation
An insert operation is used to introduce a specific bit pattern into A register,
leaving the other bit positions unchanged
This is done as
–A mask operation to clear the desired bit positions, followed by
–An OR operation to introduce the new bits into the desired positions
E.g.: Suppose you wanted to introduce 1010 into the low order four bits of
A: 1101 1000 1011 0001A (Original)
1101 1000 1011 1010A (Desired)
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Shift Microoperations
• Used for serial transfer of data
• Also used in conjunction with arithmetic, logic,
and other data-processing operations
• The contents of the register can be shifted to the
left or to the right
• As being shifted, the first flip-flop receives its
binary information from the serial input
• Three types of shift: Logical, Circular, and
Arithmetic
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Shift Microoperations
Symbolic
designation Description
R ← shl R Shift-left register R
R ← shr R Shift-right register R
R ← cil R Circular shift-left register R
R ← cir R Circular shift-right register R
R ← ashl R Arithmetic shift-left R
R ← ashr R Arithmetic shift-right R
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Shift operation
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Logical Shifts
• A logical Shift transfers 0 through the
serial input (Zero inserted)
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Circular Shifts (Rotate Operation)
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Arithmetic Shifts
• Shifts a signed binary number to the left or right
• An arithmetic shift-left multiplies a signed binary
number by 2: ashl (00100): 01000
• An arithmetic shift-right divides the number by 2
ashr (00100) : 00010
• An overflow may occur in arithmetic shift-left, and
occurs when the sign bit is changed (sign
reversal)
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Right arithmetic shift operation
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Cont.
Arithmetic shift right: Rn-1 remains unchanged;
Rn-2 receives Rn-1, Rn-3 receives Rn-2, so on.
For a negative number, 1 is shifted from the sign
bit to the right. A negative number is represented
by the 2’s complement. The sign bit remained
unchanged.
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Cont.
Arithmetic Shift Right :
Example 1
0100 (4)
0010 (2)
Example 2
1010 (-6)
1101 (-3)
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Cont.
Arithmetic Shift Left :
Example 1
0010 (2)
0100 (4)
Example 2
1110 (-2)
1100 (-4)
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Cont.
Arithmetic Shift Left :
Example 3
0100 (4)
1000 (overflow)
Example 4
1010 (-6)
0100 (overflow)
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Shift Microoperations
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