Let K be frequency independent (could be = ratio of 2 resistors)

What happens if KH( jω1) = −1at a certain input frequency ω1?

Closed-loop system gain = 

Even a very small input at ω1 results a finite output

Active devices (Subtractor) generate electronic “noise” containing all

frequencies

A small noise component at ω1 emerges as a large sinusoid due  gain

We say the system oscillates at ω1

With KH as a complex quantity, the above condition reduces to;

|KH(jω1)| = 1

KH(jω1) = −180

The above condition is called as “Barkhausen’s criteria”

Can give gain1
At the max can give 90 phase shift
Cannot Oscillate

Can give 180 as f

At this frequency gain  0
Cannot Oscillate
 three-stage ring oscillator

Each pole must provide 60 ,

−tan−1(RDCDω1) = −60

Oscillation frequency ω1 = √3/(RDCD)

Transfer function of each stage

 To find the magnitude of the transfer function,
Replace ‘s’ with jω1,
raise it to the 3rd power (as we have 3 identical stages)
equate the result to 1

low-frequency gain of each stage must exceed 2

to startup the oscillation
 Z2(Z1+Z3)
ZL=Z2//(Z1+Z3) ZL=
Z2+Z1+Z3
 (1)

(1)
Colpitts Oscillator Hartley Oscillator
 Colpitts Oscillator

break the feedback loop

Inject a small-signal current Itest into node Y

Let Current returned by the transistor be, Iret

The transfer function Iret/Itest must exhibit a phase of 360

and a magnitude of at least unity at the frequency of oscillation
This current is multiplied by [1/(C2s)] // [1/gm] to get VX.
Since Iret = gmVπ = −gmVX, we get,

Equating the transfer function to unity (which is equivalent to setting its

phase to 360◦ and its magnitude to 1) and cross-multiplying,
At the oscillation frequency, s = jω1, both the real and imaginary parts
of RHS must be zero

From the second equation, we get the oscillation frequency as,

Second term on RHS is negligible,

We get the startup condition as,\

RHS is minimum if C1 = C2,  gmRp must be at least = 4

Which is the output node?

Output can be sensed at node Y,

 Rin of the next stage (Ex: rπ) shunts Rp,
 Need greater gm to satisfy the startup condition

Output can be sensed at X,

Is preferable in discrete design because;

(1) Discrete inductors have a low loss (a high Rp)

 sensitive to resistive loading
(2) With only Rin loading the emitter (and Rp ), the startup condition
will be;
 Phase Shift Oscillator

Assuming C1 = C2 =C3 = C and R1 = R2 = R3 = R

V Vout 1
IR3  out VY  I R 3 X C 3  Vout   Vout
R3 R sC

VY Vout  1 
I R2     1
R2 R  sCR 

1 Vout  1  Vout  1 Vout

VX   I R 2  I R 3   VY     1     Vout
sC 2  R  sCR  R3  sC 2 sCR
Vout Vout
 3 V
 sCR  2 sCR out
 VX 1 Vout 3 Vout Vout
I R1    
R1 R1  sCR 
2
R1 sCR R1

1
Vin   I R 1   I R 2  I R 3   VX
sC 1
 1 Vout 3 Vout Vout Vout  1  Vout  1 Vout Vout
      1      3  Vout
 R1  sCR   R3  sC 1  sCR 
2 2
R1 sCR R1 R  sCR sCR
Vout Vout Vout
  5  6  Vout
 sCR  3
 sCR  2
sCR

Vout 1
K  3 2
Vin  1   1  6
   5   1
 sCR   sCR  sCR

1
Equating the imaginary term to zero; f 
2 6 RC

Substituting this in the equation we get, K  29

Design the phase shift oscillator using an Opamp

R4 appears between node Z and a virtual ground  R3//R4

 we must choose R3||R4 = R2 = R1 = R

 R3 could be  and
R4 =to R
If the loop gain at ω1 > 1,
amplitude grows until the Opamp output Saturates  square wave
Replace feedback resistor by “anti-parallel” diodes
 Output swings by one diode drop

To increase the Vout amplitude,

 Wien-bridge Oscillator

If R1 = R2 = R and C1 =C2 =C,

At ω1, the equation yields A = 3  choose RF1 ≥ 2RF2

To avoid saturation incorporate diodes in the gain network

For larger amplitudes, add RF3

Typical values for a 90kHz Crystal

L = 137H, C = 0.0235pF, R = 15k, Q = 5165

Dimension: 30 x 4 x 1.5mm
C : 3.5pF >> C
If R is neglected;

s2 = 3.1x1011 radians

s  p
p2 = 3.17x1011 radians

s <  < p it is inductive

Outside this it is capacitive
s <  < p it is inductive
 Negative-Resistance Circuit

Neglect channel-length modulation and other capacitances

VX = (IX – I1)(1/sCB) + IX (1/sCA)
First 2 terms represent 2 capacitors in series

3rd term is real & -ve  -ve resistance

 If the voltage across it increases, the current through it decreases

Choose |−R1| = Rp  (−R1)||Rp = 

Tank circuit becomes lossless

Energy lost by Rp in every cycle

is restored by the active circuit

 Sustained oscillation
Choose CA and CB such that their effect on the oscillation frequency is
minimized

 CACB/(CA + CB) is much smaller than Zcr

If CA and CB are large, then −gm/(CACBω2), is not “strong” enough to

cancel the crystal loss

In Typical designs, CA and CB are chosen 10 to 20 times smaller than C2

 Power Amplifiers
Class A amplifier
Device operates in active region over the whole input cycle

Useful as small signal amplifiers

Biased such that even with no input, power is drawn from the power
supply  Not very efficient

Class B amplifier
Amplifies half of the input

Results in large amount of distortion

Since device is switched off for half the time, it cannot dissipate power
 efficiency is improved

Single Class B stage is rarely used

Class AB amplifier
Device conduction time is between Class A and B

Efficiency is between Class A and B

Class C amplifier
Device conducts for less than 50% of the time

Efficiency as high as 90%

Commonly used in tuned amplifiers

Class D amplifier
Device is operated in on/off mode

No power loss

Efficiency close to 100%

No heat sink  compact

Power Calculation
 Second Harmonic Distortion
Nonlinearity in the device results nonlinear or amplitude distortion

Let the relation be,

Let,

To solve for constants B=, B1, B2,

Using these in

On solving,

2nd harmonic distortion,

 Higher Order Harmonic Distortion

Power delivered by the fundamental to the load,

Total Power delivered to the load,

• DC bias current flows through RL
- Waste of Power
- If the load is speaker; should not pass DC current
• To overcome this problem; transformer coupling is used

• For maximum power transfer to load;

we should have impedance matching transformer
• Average Power supplied from source
∵ Power drawn from source = Power absorbed by the circuit

average power
loss across device

 VCCIC=VCIC+IC2R1

 VCIC=VCCIC-IC2R1

------(1)

Eq. (1) : Amount of Power to be dissipated by the device

- Is maximum when no ac input exists (VcIc=0)
- device is cooler when delivering power to load
 Power in Fundamental

DC Power due to rectification

effect of input AC

Quiescent DC Power

Under no distortion;
Q point is such that Imin=0;

from figure
Vmin0 gives Upper limit on  as : 25%
Vmin0 gives Upper limit on  as : 50%
Which is twice that of direct coupling
• Removes even harmonics

• Leaves out 3rd harmonics as dominant harmonics

• As harmonics are reduced, should have better 

• DC currents are cancelled, no chance of core saturation

• Any ripple in the DC supply gets cancelled out

Note: If this ripple is in input, then is not eliminated
• Device are biased at cut-off

• R2=0 makes the devices to operate in Class – B Mode

- E-B Junction is shorted  device is in cut-off
Input-Output Waveforms of a single class-B stage
X2 because
of 2 halves
PC becomes maximum when Vm = 2VCC/

And,
Vm=VCC

To deliver 10W to load we need to dissipate

4W across transistor (2+2W)
• Can be overcome using Class AB Mode