LECTURE 6

Input and Output Devices

Outline

• Input and output devices

• Input/output Module Diagram
• Direct Memory Access (DMA)
• Input/Output Interfacing

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Input / Output Problems

• Wide variety of peripherals

– Delivering different amounts of data
– At different speeds
– In different formats

• All slower than CPU and RAM

• Need I/O modules

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 Generic Model of I/O Module

• Interface to the processor and memory via

system bus.
• Interface to one or
more peripheral
devices by data
links.
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External Devices

• Human readable
– Screen, printer, keyboard

• Machine readable
– HDD

• Communication
– Modem, NIC

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External Device Block Diagram

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I/O Module Function

• Control & Timing

• CPU Communication
• Device Communication
• Data Buffering
• Error Detection

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I/O Steps

• CPU checks I/O module device status

• I/O module returns status
• If ready, CPU requests data transfer
• I/O module gets data from device
• I/O module transfers data to CPU
• Variations for output, DMA, etc.

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I/O Module Diagram

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I/O Module Decisions

• Hide or reveal device properties to CPU

• Support multiple or single device
• Control device functions or leave for CPU

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Input Output Techniques

• Programmed
• Interrupt driven
• Direct Memory Access (DMA)

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Programmed I/O
• CPU has direct control over I/O
– Sensing status
– Read/write commands
– Transferring data
• CPU waits for I/O module to complete
operation
• Wastes CPU time

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 Programmed
• Processor executes an I/O instruction by issuing
command to appropriate I/O module
• I/O module performs the requested action and then sets
the appropriate bits in the I/O status register – I/O
module takes no further action to alert the processor –
it does not interrupt the processor
• The processor periodically checks the status of the I/O
module until it determines that the operation is
complete

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 Interrupt-Driven I/O
• Overcomes the processor having to wait long
periods of time for I/O modules
• The processor does not have to repeatedly check
the I/O module status

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Direct Memory Access

• Interrupt driven and programmed I/O require active

CPU intervention
– Transfer rate is limited
– CPU is tied up

• DMA is the answer

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DMA Function

• Additional Module (hardware) on bus

• DMA controller takes over from CPU for I/O

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Typical DMA Module Diagram

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DMA Operation

• CPU tells DMA controller:-

• CPU carries on with other work
• DMA controller deals with transfer
• DMA controller sends interrupt when finished

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DMA Transfer Cycle Stealing

• DMA controller takes over bus for a cycle

• Transfer of one word of data
• Not an interrupt
• CPU suspended just before it accesses bus
• Slows down CPU but not as much as CPU doing
transfer

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DMA and Interrupt Breakpoints
During an Instruction Cycle

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 DMA Configurations

• Single bus – detached DMA module

• Each transfer uses bus twice – I/O to DMA,
DMA to memory
• Processor suspended twice
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 DMA Configurations

• Single bus – integrated DMA module

• Module may support more than one device
• Each transfer uses bus once – DMA to memory
• Processor suspended once
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 DMA Configurations

• Separate I/O bus

• Bus supports all DMA enabled devices
• Each transfer uses bus once – DMA to memory
• Processor suspended once
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I/O Channels

• I/O devices getting more sophisticated

• e.g. 3D graphics cards
• CPU instructs I/O controller to do transfer
• I/O controller does entire transfer
• Improves speed

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I/O Channel Architecture

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I/O Channel Architecture

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Interfacing

• Connecting devices together

• Bit of wire?
• Dedicated processor/memory/buses?
• E.g. FireWire, InfiniBand

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 Type of Interfaces

Parallel interface – multiple bits transferred simultaneously

Serial interface – bits transferred one at a time

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IEEE 1394 FireWire

• High performance serial bus

• Fast
• Low cost
• Easy to implement
• Also being used in digital cameras, VCRs and TV

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FireWire Configuration
• Daisy chain
• Up to 63 devices on single port
• Up to 1022 buses can be connected with bridges
• Automatic configuration
• No bus terminators
• May be tree structure

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Simple FireWire Configuration

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FireWire 3 Layer Stack
• Physical
– Transmission medium, electrical and signaling characteristics

• Link
– Transmission of data in packets

• Transaction
– Request-response protocol

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FireWire - Physical Layer

• Data rates from 25 to 400Mbps

• Two forms of arbitration
– Based on tree structure
– Root acts as arbiter
– First come first served
– Natural priority controls simultaneous requests
– Fair arbitration
– Urgent arbitration

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