High resolution low cost ADC.
Made possible by the chips that integrate both analog
and digital circuitry.
Circuit uses Comparators (Delta) and Integrators
(Sigma) and so the name : “DELTA-SIGMA or SIGMA-
DELTA”
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1-Bit stream
(1 or 0)
+1 or -1 volt
1 Bit DAC
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X1
X2 = X1-X5
X3 = X2 + X3(n-1)
IF X3 > 0 IF X3 < 0
X4 = 1 X4 = 0
X5 = +1 X5 = -1
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X1 X2 X3 X4 X5
0 0 1 1
0.5 -0.5 -0.5 0 -1
0.6 1.6 1.1 1 1
0.7 -0.3 0.8 1 1
0.8 -0.2 0.6 1 1
0.9 -0.1 0.5 1 1
• Density of ones is 1 0 0.5 1 1
more when the 0.9 -0.1 0.4 1 1
input is more 0.8 -0.2 0.2 1 1
positive. 0.7 -0.3 -0.1 0 -1
0.6 1.6 `.5 1 1
0.5 -0.5 1 1 1
0.3 -0.7 0.3 1 1
• Density of zeros 0 -1 -0.7 0 -1
is more when input -0.2 0.8 0.1 1 1
is more negative. -0.4 -1.4 -1.3 0 -1
-0.6 0.4 -0.9 0 -1
-0.8 0.2 -0.7 0 -1
-1 0 -0.7 0 -1
-0.8 0.2 -0.5 0 -1
-0.6 1.6 1.1 1 1
-0.4 -1.4 -0.3 0 -1
-0.2 0.8 0.5 1 1
0 -1 -0.5 0 -1
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One option for the sigma-delta method is to count the one-bit quantized
output for a set interval. The output of the counter is latched with the
parallel binary code.
Summing
point
Analog + ∆ 1-bit n-bit Binary code
Σ Integrator Latch
input quantizer counter output
signal – . .
. .
. .
. .
. .
1-bit
DAC
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Integrating or Dual Slope A/D
integrator
comparator
Vin
-Vref
clock Control logic
Counter
Digital Output
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When conversion is initialized, the switch is connected to Vin which is applied
to the op amp integrator. The integrator output (>0) is applied to the comparator
integrator
comparator
Vin
-Vref
clock Control logic
Counter
Digital
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As conversion is initiated, the control logic enables the clock which then
sends pulses to the counter until the counter fills (9999)
integrator
comparator
Vin
-Vref
clock Control logic
Counter
Digital Output
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As the counter resets (9999 0000), an overflow signal is sent to the
control logic
this activates the input switch from Vin to
-Vref , applying a negative reference voltage to
the integrator
integrator
comparator
Vin
-Vref
clock Control logic
overflow
Counter
Digital
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The negative reference voltage removes the charge stored in the integrator
until the charge becomes zero.
At this point, the comparator switches states producing a signal that disables
the clock and freezes the counter reading.
The total number of counts on the counter (determined by the time it took the
fixed voltage Vref to cancel Vin ) is proportional to the input voltage, and thus is a
measure of the unknown input voltage.
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The operation of this A/D requires 2 voltage slopes, hence the common
name DUAL-SLOPE.
full scale conversion
Integrator Output Voltage
charging up
the capacitor discharging
the capacitor
half scale conversion
quarter scale conversion
fixed time
measured time
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Voltage to Frequency ADC
VFC(VCO) (Voltage to Low Speed
Frequency Converter) Good Noise Immunity
Convert analog input High resolution
voltage to train of pulses For slow varying
Counter signal
Generates Digital output
With long conversion
by counting pulses over
a fixed interval of time time
Applicable to remote data
sensing in noisy
environments
Digital transmission
over a long distance
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Chap 0 12
Tracking Type ADC
Tracking or Servo
Type
Using Up/Down
Counter to track input
signal continuously
For slow varying
input
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Chap 0 13
