Topics

• Organization of Von Neumann Machine/IAS

Computer

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

 IAS Computer
• Developed by John Von Neumann in 1940 at
Princeton University.
• In IAS computer, IAS stands for
Institute for Advanced Studies

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

Organization of Von-Neumann Machine (IAS
Computer)
• The task of entering and altering programs for ENIAC
was extremely tedious
• Stored program concept – says that the program is
stored in the computer along with any relevant data
• A stored program computer consists of a processing
unit and an attached memory system.

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

IAS Computer

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

Structure of Von Neumann Machine

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

 Memory of the IAS
• 1000 storage locations called words.
• Word length - 40 bits.
• A word may contain:
• A numbers stored as 40 binary digits (bits) – sign bit + 39 bit
value
• An instruction-pair. Each instruction:
• An opcode (8 bits)
• An address (12 bits) – designating one of the 1000 words in
memory.
Dr.J.saira banu , Associate Professor, SCOPE, VIT University
Instruction Format of IAS Computer

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

Von Neumann Machine
• MBR: Memory Buffer Register[40 bits]
- contains the word to be stored in memory or
just received from memory.
• MAR: Memory Address Register[20 bits]
- specifies the address in memory of the word to
be stored or retrieved.
• IR: Instruction Register [8 bits] - contains the
8-bit opcode currently being executed.
• IBR: Instruction Buffer Register[20 bits]
- temporary store for RHS instruction from word
in memory.
• PC: Program Counter[12 bits] - address of next
instruction-pair to fetch from memory.
• AC: Accumulator & MQ: Multiplier [40 bits]
quotient - holds operands and results of ALU
ops. PCU

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

Recap
• The address of memory location containing the instruction code for
next instruction is stored in --------------------
• The purposes of IBR register in von Neumann architecture is to hold
-------------------
• In the von Neumann model, the subsystem which serves as a
manager of the other subsystems is--------------------
• Von Neumann machine follows which instruction format------------
• IAS machine supports how many bit instruction--------------------------
and ----------------------- bit for data.
• ----------------- format is used to store data in IAS.

Dr.J.saira banu , Associate Professor, SCOPE, VIT University