CSE2001 – Computer Architecture and Organization

Module -1

INTRODUCTION AND OVERVIEW

OF COMPUTER ARCHITECTURE

L1M1 - Topics:
• Introduction to computer systems
• Overview of Organization and
Architecture
TYPES OF COMPUTERS?
 General Purpose Computer
 Special Purpose Computer

Worksheet (10 Mins).

Search for example General Purpose computer and Special
purpose computer and post the answer in chat box. (doc
file) – one page is enough.

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 Computer Architecture?

Architecture describes what the computer

does

 Computer Organization?

Organization describes how it does it.

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VON NEUMANN ARCHITECTURE:

 Computer has single storage system(memory) for storing data as well

as program to be executed.
 Processor needs two clock cycles to complete an instruction (Query
and Reply)

 Pipelining is not possible

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 This is a relatively older architecture and was replaced by Harvard
architecture.
HARVARD ARCHITECTURE
 Computer has two separate memories for storing data and program
 Processor can complete an instruction in one cycle
 Pipelining is possible

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 IAS COMPUTER

 Developed by John Von Neumann in 1940 at Princeton

University.

 In IAS computer, IAS stands for Institute for Advanced

Studies.

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IAS

 1000 x 40 bit words ( 1000 storage locations of 40

binary bits each)
 Binary number( both data and instructions are stored here)

 Number Format:
 Each number is represented by a sign bit and a 39 bit value.

Instruction Format

 20-bit instruction, 8-bit operation code (opcode)

12-bit address 8
 .
IAS Memory Formats

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COMPUTER FUNCTION
 The basic function performed by a computer is execution
of a program, which consists of a set of instructions
stored in memory.
 Instruction fetch-decode-execute

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 MBR: Memory Buffer Register
- contains the word to be stored in
memory or just received from memory.
 MAR: Memory Address Register
- specifies the address in memory of
the word to be stored or retrieved.
 IR: Instruction Register - contains
the 8-bit opcode currently being
executed.
 IBR: Instruction Buffer Register
- temporary store for RHS instruction
from word in memory.
 PC: Program Counter - address of
next instruction-pair to fetch from
memory.
 AC: Accumulator & MQ: Multiplier
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quotient - holds operands and results
of ALU ops.
 IAS Computer AC MQ

MARPC
MBRM[MAR] Arithmetic & Logic Input/output
Circuits Equipments
IBRMBR<20..39> IBRMBR<20..39>
IRMBR<0..7> IRMBR<0..7>
MARMBR<8..19> MARMBR<8..19> MBR
MBRM[MAR] MBRAC
ACMBR M[MAR}MBR
IRIBR<0..7> IRIBR<0..7>
MARIBR<8..19> IBR PC
MBRM[MAR]
ACAC + MBR Main
PCPC+1 Memory
MARPC
IR
MBRM[MAR] MAR

Control
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Circuits
THE FETCH/EXECUTE CYCLE

 Standard process.

Also called as
 fetch-and-execute cycle, 

 fetch-decode-execute cycle
 FDX

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QUESTIONS:
 MBR –
 MAR –
 AC –
 IBR –
 IR –
 PC –
 MQ –
 IAS –
 What is Computer Architecture?
 What is Computer Organization?
 Number of words in IAS machine?
 Number of bits per word in IAS machine?
 Data is represented in ____________ form in IAS machine 15
 Explain Stored program concept.