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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)

Question: Differentiate between Computer Register and Memory

Computer Register Computer Memory

Register is temporary storage area Memory can be temporary storage area


or permanent storage area

Register are directly attached to CPU being a Memory unit is working independently not
part of Microprocessor directly attached to CPU

Registers has no physical address Memory has a physical address

Minimum size 1 bit, Max size 64 bits Minimum size 1 byte, Max size 15 TB or more

Total 14 Register , 9 General 5 special Memory of two types Main memory


(RAM/ROM) & Secondary Memory (HDD)

Hold the current data need for processing by Hold the current data will be need for
CPU under CU & ALU processing by CPU in memory locations

Registers are faster working under one clock Memory is slow as it is related to fetch cycle
cycle and execution cycle

Registers are controllable Memory is almost not controllable

Question: Define Computer Register. What are the types of computer Registers Explain?

CPU Registers

 Computer Registers are temporary storage areas (devices like memory part of CPU )
which holds data (mostly an instruction as long it carried out by manipulation or
interoperation)to be process immediately , very fast
 Register are high speed memory areas that temporally store data during processing.
 Registers are synchronies with system clock to refresh them after an interval of time
 Registers are different from memory as they don’t have address like memory.
 Registers may be small as a single bit or it may be of several bytes.
Registers may perform following task :

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
1. may hold data being processed
2. may hold instructions being executed
3. may hold memory address of input/output devices address
4. may hold special binary code to keep the track record of status of computer task
like(completed, pending/working, not completed, not started yet)
 Registers may be special purpose or general purpose. Total 14 Registers are working
under CPU Out of which 09 are General purpose and 05 are special purpose . General
purpose registers are used to hold data temporally and general purpose registers are
also called programmable registers which may be programmed by using instructions.

 ALU have two main register Accumulator (AC) and (SR) Status Registers.
 CU (Control Unit) have two registers (Instruction Register- IR, Program Counter - PC)

There are nine (09) types of General purpose registers are:

1. Accumulator (AC)- - - - - - - - - - - - - - - - - - - - - - 16 bits register


2. Status Register (Flag Register) (1 bit Register)
3. Memory Buffer Register (MBR) - - - - - -- - - - - - 16 bits register
4. Memory Address Register (MAR) 12 bits Register
5. Instruction Register (IR) - - - - - - - - -- - - - - - - - - 16 bits register
6. Program Counter (PC) 12 bits Register
7. Stack Pointer (SP)
8. Input Register (INPR) – 8 bits registers
9. Output Register (OUTR) – 8 bits registers

i. Accumulator (AC)
 16 bits register used for storing data directly working under ALU
 also called pre-processor register perform operation on data stored in main memory
 Register used for arithmetic (addition, subtraction, multiplication, shift and logical
operations on data Result of arithmetic and logical operations are automatically
stored in AC.

ii. Status Register (Flag Register)


 Status registers are also called Flag Registers

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
 Hold 1 bit flag to indicate certain conditions that arises during arithmetic and logical
operations
 Status registers are :
I. Carry bit indicate overflow or not
II. Zero bit indicate result is zero or non-zero
III. Sign bit indicate result is positive(+) or negative (-)
IV. Parity bit indicate either the result contain odd/even number of 1s

iii. Memory Buffer Register (MBR)


 16 bits register also known as Memory Data Register (MDR)
 Used to hold a word (data value) being stored or retrieved from memory location
 Hold data with the help of current address given by memory address register (MAR)
 Temporary Register hold data temporarily generated during processing with help of MBR

iv. Memory Address Register (MAR)


 16 bits register
 Hold the address of memory location form where the word will read/write into MBR
 it can hold current instruction being executed same as for IR
 Hold operation code of 04 bits and actual data in 12bits

v. Instruction Register (IR)


 16 bits register directly working under CU
 Hold the actual instruction being executed currently by Control Unit.

vi. Program Counter (PC)


 12 bits register, deals with order of execution of instructions depending on Control unit
also called sequence control register (SCR).
 Acts like a counter and hold the address of next instructions.
 Act like a pointer to memory location where instruction is stored.
 After the execution of instruction program counter get an increment by one and indicate
the location of next instruction in order given by CU.

vii. Stack Pointer (SP)


 Stack is the set of memory locations organize data on the principle called LIFO

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
 Stack pointer indicate to memory locations marked as stack
 Stack pointer indicated the top most record the last record inserted will be the first record
retrieved
 Stack memory locations are used by Microprocessor for storing data temporally for
execution of any program
viii. Input Register (INPR)
 8 bits register and transfer 8 bits simultaneously (at the same time)
 Hold the data obtained from user using input devices like keyboard.
ix. Output Register (OUTR)
 8 bits register and transfer 8 bits simultaneously (at the same time)

 Hold the data that need to be sent to output devices like monitor or printer.

Question:
What is a computer Bus and Explain types of Buses used by CPU.

Computer Bus

 “In CPU/Microcomputers memory, input/output devices and computer hardware


parts attached to mother board are connected to the microprocessor by means of
wires called BUS”. It is the electric commucnaiton pathway connecting two or more
devices to the microprocessor.

 Bus is the transmission medium through which electric signals can be transmitted
throughout the CPU components controlled by Control unit/microprocessor. Bus width
specifies the speed of data transmission.

 There are three types of signals and three types of buses (Combined as System Bus) :

i. Address Bus (use address signals)

ii. Control Bus (use control signals)

iii. Data Bus (use data signals)

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)

1. Address Bus

 The address bus is the set of wire (16 or 32 parallel lines/wires) traces that is used to
identify which address in memory the CPU is accessing. The number of wire/bus limits the
maximum amount of RAM Which the CPU can address. Modern PC’s have 32 bits
address bus which can access 4GB memory (RAM)

 Address bus is unidirectional. Electric signals are transmitted in only one direction i.e.
from microprocessor to other I/O devices or memory tells the CPU address of memory
locations where data is stored.

 Address bus is used by microprocessor to transmit the address of memory location


from where it wants to read/write data. Suppose a memory address 2044 from where the
microprocessor want to read the data then:

i. It is first convert the address code into binary format

ii. Then transmitted to all the devices connected to microprocessor by address bus

iii. The device which has been addressed only respond and microprocessor locate the
particular memory location.

2. Control Bus

 Bi –directional bus , Transmit control signals from microprocessor (CU) to I/O devices
and vice versa.

 Control bus coordinate between I/O devices, memory and CU .

 Supervise the reading/writing of data or instructions in/out of memory

 One line of the Control Bus indicates currently CPU is reading/writing to memory.

 It transmits signals to the entire device at the proper time controlled by CU.

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
 It generates the acknowledgment for the microprocessor (Control unit) about the
completion of a particular job given by CU.

 Regulate and manage two other buses (data bus & address bus)

3. Data Bus.

 Bus on which actual data transmission take place. It may consist of 8,16 or 32 bit
parallel lines.
 CPU can read/write data from memory or from a port through data bus.
 Bi –directional bus , Transmit data from memory to microprocessor and vice
versa(microprocessor to memory).
 Used to transmit data to other output devices using Data Bus

Question: What are the minimum numbers of registers required by CPU?

Minimum Number of Registers Required by a Computer (CPU) are:


I. MBR
II. MAR
III. IR
IV. TR
V. AC
VI. PC
VII. SP
VIII. INPR
IX. OUTR

1. MBR - for holding data in memory (buffer) Memory Buffer Register.


2. IR - for storing current instruction Instruction Register.
3. MAR - for holding address of memory word Memory Address Register .
4. TR - holding temporary data generated during processing -Temporary Register
5. AC- Processor Register also called Accumulator (AC) is required for doing operations
on data. This Processor Register holds data on which addition, subtraction,
multiplication, shift and logical operations are to be carried out.
6. PC - register that act as a counter, hold address of next instruction as Program

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
Counter.
7. SP - for inserting removing any record/item in stack working on principle of LIFO.
8. INPR - for inputting and outputting data. Input Register (lNPR) will hold data obtained
from user through input devices like keyboard.
9. OUTR - will hold data that need to be sent to output devices like monitor, printer, etc.

Question: What is the principle of stack, Explain stack pointer .

STACK

 Stack can be consider as storage method in which items are stored in consecutive
memory locations where the last element stored will be the first element retrieved
Called a principle of LIFO (last in first out). Or Stack can be set of memory location
taken under-consideration as a unit

 Stack example Stack of CD’s , Book’s , Plate’s placed together one above other

 Stack may be like book/cd/Books which are placed one above anther, When you want to place
a new record it will be inserted on top and when want to remove the record the last record
inserted will be the first retrieved LIFO principle. Stack may be the set of finite registers
bundled together.

 Set of memory location marked with stack pointer pointing top most record

 Address register is associated with stack pointer, which contains the address of recently
stored elements in stack it also remember that this will be the first element to
retrieved/remove from stack. Stack pointer always points to the topmost element in the
stack.

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)

PUSH & POP Function in stack

1. PUSH term is used to insert an element into a stack (at the top most position) and it
makes an increment of 1 in stack pointer, stack pointer will be pushed downward.

2. POP term is used to remove the top most element from stack and it is done by
decrementing of -1 in stack pointer, stack pointer will pop upwards.

 Stack pointer (SP) always points to the topmost record in the stack (recently inserted record)
when there is need to remove an element from stack CU give instruction to SP with address of
memory location to MAR and makes a decrement in stack and SP move to new top most
location.

 Stack does not have infinite capacity. there is need to put a check mark to ensure that the
stack is not full otherwise it will lead to over-flow of elements from stack. Underflow will be
generated if there is any attempt to remove an element from empty stack.

Question:

Explain internal working of CPU , Fetch Cycle, Execution Cycle .

Internal Working of CPU

 Central Processing Unit (CPU) is the brain of computer that accepts data and
instructions, processes the data according to the instructions and delivers the output
to the output unit also controls and coordinates all the activities of all other units.

 The internal working of a computer explains about digital computer having following
features:
1. The computer word is 16-bit long.
2. It accepts and executes one-address instructions.
3. The instruction word is divided into two parts namely the Operation Code
(Opcode) and address field which gives the address of the operand.
4. The operation code is 4-bit long and address field is 12-bit long.
5. The computer has memory size of 4K words i.e. it has 4096 (4K = 4xl024) memory
locations which can be addressed.

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
Internal working of a CPU means the manner in which the instructions stored in the
memory, executed by the CPU. The execution of an instruction stored in memory
involves two steps: Fetch Cycle & Execution Cycle. The processing required for
a single instruction is - called an instruction cycle.

1. The fetch cycle is that duration of time in which an instruction stored in the
memory is brought to an appropriate register, all under the commands from
control unit. The process of bringing an instruction from memory to a register is
called a fetch cycle and has to be completed in a specified duration of time. The CPU
when fetching an instruction is said to be in fetch stage.

2. The execute Cycle is the process of execution of an instruction by the CPU in


a specified interval of time is called execute cycle. The instruction fetched from
memory is placed in a register where it is decoded and executed by ALU
(Arithmetic/Logic Unit) while executing an instruction is in execute stage, the two
stages appearing alternately.
Question: Explain process of fetching an instruction

1. The instructions and data are stored in computer memory as computer words
16-bit long in binary coded forms in terms of 0s and 1s.
2. It is the responsibility of the programmer to keep the track of the addresses of
the instructions and data.

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)

3. MBR TO IR By fetching of an instruction, mean transferring an instruction from


a memory location to the Instruction Register (IR) which holds an instruction
temporarily only for the time when the instruction and data are being interpreted or
decoded.
4. The instruction from a memory location is transferred to Instruction Register via
another register called Memory Buffer Register (MBR).
5. CU TO PC & PC TO MAR All the instructions and data from memory pass
through Memory Buffer Register on their way to other registers or to other units.
The other registers used in a fetching operation are Program Counter (PC) and
Memory Address Register (MAR). Thus, the registers needed in instruction
fetching operations are:
1. Instruction Register (IR)
2. Memory Buffer Register (MBR)
3. Program Counter (PC)
4. Memory Address Register (MAR)
The operation of fetching of an instruction from the main memory to the instruction
register is performed under the control of the control unit. The dotted lines show the
signals from the control unit
. Question: Explain process of EXECUTION an instruction

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
The execution of an instruction by the computer means completion of the specified
instruction. The fetch cycle brings the instruction to the Instruction Register (IR),
which holds this instruction temporarily as long as it is being interpreted
(decoded) and executed.
Computer having word size of 16·bit, the instruction held into two parts, namely
1. 4-bit operation code,
2. 12-bit address of operand.
PROCEDURE :
1. IR TO DECODER: The operation code is transferred to the control unit. This control
unit sends Opcode to decoder where it is decoded. Decodes this operation code and
issues commands to various other hardware units.
2. After decoding the Opcode, the control unit issues commands in the form of
control signals to various other units such as arithmetic/ logic unit to perform the
necessary operations.

3. The address part of the instruction in IR is transferred to a decoder. The address


part of the instruction is transferred to a decoder. The decoder interprets it and
communicates this address to the Memory Address Register, which transmits this
address to the main memory. In fact, this is the memory address of the operand.
4. DECODER TO MAR Decoder decodes it as the address of a particular memory
location.
5. MAR TO RAM Then transmitted to Memory Address Register (MAR) to (RAM)
which transmits it to the main memory under the directions of the CU.
RAM TO MBR & TO ALU Under the instructions from CU operand stored in that
particular memory location is transmitted the Memory Buffer Register, from where
it is transmitted to the ALU. Accumulator where all the arithmetic is performed.
Operand (data) is passed to the Accumulator (ALU) where the necessary arithmetic,
as directed by the control unit, is performed and the result of the operation is held in
the Accumulator for onward transmission to the main memory. This completes an
execution cycle.

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
Question: What is an Operation code (Opcode and Address) ?
Explain three, two, one and zero address registers.
An instruction is stored in main memory as a certain specified number of bits. The number
of bits representing an instruction of data item depends upon the word-size of the
computer. A computer word in an instruction has to be an Operation Code

An instruction in machine consist of two parts, namely:


1.Operation Code, abbreviated to Opcode.
2.Address or Addresses of one or more memory locations.

Opcode that specifies the operation to be performed. Opcode may instruct the computer to add
two numbers or compare or it may direct to stop the execution of the program.
Address code containing address of a particular memory location the instruction could
be found.

instruction format defines the layout of bits of an instruction in terms of its constituent
parts. There are various instruction formats depending upon architecture of the
computer. The types of commonly used instructions are:
1. Three-Address Instruction.
2. Two-Address Instruction.
3. One-Address Instruction.
4. Zero-Address Instruction
Three-Address Instruction
A three-address instruction consists of the following parts:
(a) Operation Code.
(b) Addresses of two operands, called Address 1 and Address 2.
(c) Address of the memory location where the result of the operation is to be
Stored address of the destination.

The number of bits (field length) allotted to each of the three parts depends upon the
computer. A typical three address instruction is shown below.
Opcode Address 1 Address 2 Address of Destination

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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Chapter -5 Computer Architecture (Computer Science Notes XI-CS)
A three-address instruction to add two numbers, specifies the operation code for
addition, addresses of two numbers (operands) to be added, address of the
memory location usually called address of the destination. ADD, A, B, C is coded
in binary form before it can be executed by the computer.

Two-Address Instruction

A two-address instructions. One operand is placed in a specified register such as


an Accumulator and the address of the next instruction is obtained from another
register called Program Counter (PC). This implies that such an instruction should
have the following parts:
(a) Operation Code
(b) Address of one of the operands, say Address 1
(c) Address of the storage location where the result IS to be stored. This
address is denoted by Address 2.
Opcode Address 1 Address 2

One Address Instruction This instruction has address of one' operand only, the
other operand is stored in Accumulator (AC), results of operation are left in the
Accumulator itself, from where can be moved to main memory by another
instruction. The general form of a one-address instruction is
Opcode Address 1

Zero-Address Instruction

Zero-address instructions are also called Stack Instructions and consist of Opcode
only. The general form a of zero-address instruction is Opcode

Example instruction "clear accumulator" is a 0-address instruction. "clear" is to be


performed on Accumulator (AC).
Opcode

Notes by ASAD ARSHID AZIZ Lecturer Computer Sc – DHACSS SKBZ CAMPUS (College Wing)
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