Systemverilog: Professor: Sci.D., Professor Vazgen Melikyan

SystemVerilog
Professor: Sci.D., Professor

Vazgen Melikyan
Synopsys University Courseware

Copyright © 2020 Synopsys, Inc. All rights reserved.
SystemVerilog
Lecture - 6
Developed By: Vazgen Melikyan
1
Abstract Class
 Prohibited instantiation virtual classes

 Can be extended to form other sub-classes
which can then be instantiated
virtual class <class_name>
// class definition
endclass
www.chipverify.com
SystemVerilog
Lecture - 6
2
Normal Class Example
class BaseClass;
int data;
function new();
data = 32'hc0de_c0de;
endfunction
endclass
module tb;
BaseClass base;
initial begin
base = new();
$display ("data=0x%0h", base.data);
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
3
Abstract Class Example
virtual class BaseClass;
int data;
…
endclass
module tb;
BaseClass base;
initial begin
base = new();
$display ("data=0x%0h", base.data);
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
4
Extending Abstract Classes
virtual class BaseClass;
int data;
endclass
class ChildClass extends BaseClass;

function new();
data = 32'hfade_fade;
endfunction endclass
module tb;
ChildClass child;
initial begin
child = new();
$display ("data=0x%0h", child.data);
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
5
What are different fork - join styles ?
Fork join Finishes when all child threads are over
Fork join_any Finishes when any child thread gets over
Fork join_none Finishes soon after child threads are spawned
www.chipverify.com
SystemVerilog
Lecture - 6
6
fork join Example
module tb_top;
initial begin
#1 $display ("[%0t ns] Start fork ...", $time);
fork
#5 $display ("[%0t ns] Thread1: Orange is named after orange", $time);

begin
#2 $display ("[%0t ns] Thread2: Apple keeps the doctor away", $time);
#4 $display ("[%0t ns] Thread2: But not anymore", $time); end
#10 $display ("[%0t ns] Thread3: Banana is a good fruit", $time);
join
$display ("[%0t ns] After Fork-Join", $time); end endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
7
fork join_any Example
module tb_top;
initial begin
fork
begin
join_any
www.chipverify.com
SystemVerilog
Lecture - 6
8
fork join_none Example
module tb_top;
initial begin
fork

begin
join_none
www.chipverify.com
SystemVerilog
Lecture - 6
9
fork-join_any
module tb_top;
initial begin
fork
#40 $display ("[%0t ns] Show #40 $display statement", $time);
begin
end
#60 $display ("[%0t ns] TIMEOUT", $time);
join_any
$display ("[%0tns] Fork join is done", $time);
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
10
Disabling fork
module tb_top;
initial begin
fork
begin
end
join_any
$display ("[%0tns] Fork join is done", $time);
disable fork;
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
11
Wait fork
module tb_top;
initial begin
fork
begin
#50 $display ("[%0t ns] Show #50 $display statement", $time); end
join_any
$display ("[%0t ns] Fork join is done, wait fork to end", $time);
wait fork;
$display ("[%0t ns] Fork join is over", $time);
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
12
Wait fork (2)
module tb_top;
initial begin
fork
begin #20 $display ("[%0t ns] Show #20 $display statement", $time);
#50 $display ("[%0t ns] Show #50 $display statement", $time); end
#60 $display ("[%0t ns] TIMEOUT", $time); join_any
$display ("[%0t ns] Fork join is done, wait fork to end", $time);
fork #10 $display ("[%0t ns] Wait for 10", $time); #20 $display ("[%0t ns] Wait for
20", $time); join_any
wait fork;
$display ("[%0t ns] Fork join is over", $time); end endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
13
Interprocess Communication
Events Different threads synchronize with each other via event handles in a
testbench
Semaphores Different threads might need to access the same resource; ther take turns by
using a semaphore
Mailbox Threads/Components need to exchange data with each other; data is put in a
mail box and sent
www.chipverify.com
SystemVerilog
Lecture - 6
14
Events
module main; RESULT
event e;
initial e is FALSE at 10
repeat(4) begin
#20; e is triggered at 20
->e ;
$display(" e is triggered at %t ",$time);
e is TRUE at 20
end e is FALSE at 30
initial
e is triggered at 40
#100 $finish; e is TRUE at 40
always begin
e is FALSE at 50
#10; e is triggered at 60
if(e.triggered)
$display(" e is TRUE at %t",$time);
e is TRUE at 60
else e is FALSE at 70
$display(" e is FALSE at %t",$time);
end
e is TRUE at 80
endmodule
e is FALSE at 90
www.chipverify.com
SystemVerilog
Lecture - 6
15
Event wait
module event_m;
event a;
initial
repeat(4) RESULT:
#20 -> a;
always begin
ONE :: EVENT A is triggered
@a; TWO :: EVENT A is triggered
$display(" ONE :: EVENT A is triggered ONE :: EVENT A is triggered
"); TWO :: EVENT A is triggered
end
ONE :: EVENT A is triggered
always begin TWO :: EVENT A is triggered
wait(a.triggered); ONE :: EVENT A is triggered
$display(" TWO :: EVENT A is
triggered ");
TWO :: EVENT A is triggered
#1;
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
16
Race Condition
module main;
event e1,e2;
RESULT
initial
repeat(4) e2 is triggered at 20
begin e2 is triggered at 40
#20;
->e1 ; e2 is triggered at 60
@(e1) e2 is triggered at 80
$display(" e1 is triggered at %t ",$time);
end
initial
repeat(4)
begin
#20;
->e2 ;
wait(e2.triggered);
$display(" e2 is triggered at %t ",$time);
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
17
Merging Events
module events_ab;
event a,b;
initial begin
#1 -> b; // trigger both always blocks RESULTS:
-> a;
#10 b = a; // merge events EVENT B is triggered
#20 -> a; // both will trigger ,
end EVENT A is triggered
EVENT B is triggered
always@(a) begin EVENT A is triggered
$display(" EVENT A is triggered ");
#20;
end
always@(b) begin
$display(" EVENT B is triggered ");
#20;
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
18
Merging Events (2)
module events_ab;
event a,b;
initial
begin
#20 -> a; RESULTS:
b = a;
#20 -> a; EVENT A is triggered
end
EVENT A is triggered
always@(a)
$display(" EVENT A is triggered ");
always@(b)
$display(" EVENT B is also triggered ");
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
19
Null event
program main;
event e;
initial begin e is triggered at 348

repeat(4) e is triggered at 4967
#($random()%10) -> e;
e = null;
repeat(4) e is triggered at 14901
#($random()%10) -> e;
end ** ERROR ** Accessed Null
initial
object
forever
begin
@e ;
$display(" e is triggered at %t",$time);
end
endprogram
www.chipverify.com
SystemVerilog
Lecture - 6
20
Wait Sequence
module main; always
event e1,e2,e3; begin
initial begin wait_order(e1,e2,e3)
#10;
$display(" Events are in order ");
-> e1;
-> e2; else
-> e3; $display(" Events are out of order ");
#10; end
-> e3;
-> e1; endmodule
-> e2;
#10;
-> e3; RESULT:
-> e2;
-> e3; Events are in order
end Events are out of order
Events are out of order
www.chipverify.com
SystemVerilog
Lecture - 6
21
Events Comparison
module main;
event e1,e2,e3,e4;
initial begin
e1 = null;
e2 = e3;
if(e1)
$display(" e1 is not null ");
else RESULT:
$display(" e1 is null ");
if(e2)
$display(" e2 is not null"); e1 is null
else
$display(" e2 is null"); e2 is not null
if(e3 == e4) e3 and e4 are not same events
$display( " e3 and e4 are same events ");
else e3 and e2 are same events
$display( " e3 and e4 are not same events ");
if(e3 == e2)
$display( " e3 and e2 are same events ");
else
$display( " e3 and e2 are not same events ");
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
22
Semaphore
 Has a fixed number of keys

 Process must first get a key
 Other processes must wait until keys are
available
 Are used in:
 access control to shared resources
 basic synchronization
www.chipverify.com
SystemVerilog
Lecture - 6
23
Semaphore
Methods
Name Descripton
Function new (int keyCount = 0) Specifies number of keys initially allocated to the
semaphore bucket
Function void put (int keyCount = 1) Specifies the number of keys being returned to the
semaphore
Task (get int keyCount = 1) Specifies the number of keys to obtaion from the
semaphore
Function int (try_get int keyCount = 1) Specifies the requires number of keys to obation from the
semaphore
www.chipverify.com
SystemVerilog
Lecture - 6
24
Example
module tb_top;
semaphore key;
initial begin
key = new (1);
fork personA ();
personB ();
#25 personA
();
join_none end
task personA ();
getRoom (1);
#20 putRoom (1);
endtask
task
personB ();
#5 getRoom (2);
#10 putRoom (2);
endtask
www.chipverify.com
SystemVerilog
Lecture - 6
25
Example (2)
task getRoom (bit [1:0] id);

$display ("[%0t] Trying to get a room for id[%0d] ...", $time, id);
key.get (1);
$display ("[%0t] Room Key retrieved for id[%0d]", $time, id);
endtask
task putRoom (bit [1:0] id);
$display ("[%0t] Leaving room id[%0d] ...", $time, id);
key.put (1);
$display ("[%0t] Room Key put back id[%0d]", $time, id);
endtask
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
26
Mailbox
 Allow different processes to exchange data
 bounded or unbounded queue size
 bounded can only store a limited amount of data
 unbounded mailbox has unlimited size
 There are two types:
 Generic Mailbox that can accept items of any data
type
 Parameterized Mailbox that can accept items of only a
specific data type
www.chipverify.com
SystemVerilog
Lecture - 6
27
Mailbox vs Queue
 Queue can only push and pop items from
either the front or the back
 Mailbox is a built-in class that uses
semaphores to control the push and pop from
the queue
 cannot access a given index within the
mailbox queue
 Retrieve items in FIFO order
www.chipverify.com
SystemVerilog
Lecture - 6
28
Mailbox usage
 Multiple threads running in parallel and want

to share data for which a certain level of
determinism is required
www.chipverify.com
SystemVerilog
Lecture - 6
29
Example
module tb;
mailbox mbx = new(2); // mailbox with two item
initial begin // puts item to mailbox
for (int i=0; i < 5; i++) begin
#1 mbx.put (i);
$display ("[%0t] Thread0: Put item #%0d, size=%0d", $time, i,
mbx.num());
end
end
initial begin // getting item from mailbox
forever begin
int idx;
#2 mbx.get (idx);
$display ("[%0t] Thread1: Got item #%0d, size=%0d", $time, idx,
mbx.num()); end
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
30
Example
module tb;
mailbox mbx = new(2); // mailbox with
two item
initial begin // puts item to mailbox
for (int i=0; i < 5; i++) begin
#1 mbx.put (i);
$display ("[%0t] Thread0: Put item
#%0d, size=%0d", $time, i, mbx.num());
end
end
initial begin // getting item from
mailbox
forever begin
int idx;
#2 mbx.get (idx);
$display ("[%0t] Thread1: Got item
#%0d, size=%0d", $time, idx,
mbx.num()); end
end
endmodule
www.chipverify.com
SystemVerilog
Lecture - 6
31
Mailbox Functions and Methods
Function Desciption
Function new (int bound = 0 ); Returns a mailbox handle, bound < 0 represents size of mailbox queue
Function int num (); Returns the number of messages currently in the mailbox
Task put (singular message); Blocking method that stores a messafe in the mailbox in FIFO order;
message is any singular expression
Function int try_put (singular message); Non-blocking method that stores a message if the mailbox is not
full,returns a positive integer if successful else 0
Task get (ref singular message); Blocking method until it can retrieve one message from the mailbox, if
empty blocks the process
Function int try_get (ref singular message); Non-blochikng method which tries to get one message from the
mailbox,returns 0 if empty
Task peek (ref singular message); Copires one message from the mailbox without removing the message
from the mailbox queue
Function int try_peek (ref singular message); Tries to copy one message from the mailbox without removing the
message from queue
www.chipverify.com
SystemVerilog
Lecture - 6
32
Parameterized mailboxes
 By default mailbox can send and receive objects
of mixed data-types
 It can result in type mismatches during
simulation time
 To accept and send objects of a fixed data-type,
it can be parameterized to that particular data-
type
How to do parametrization?
typedef mailbox #(string) s_mbox;

www.chipverify.com
SystemVerilog
Lecture - 6
33

Systemverilog: Professor: Sci.D., Professor Vazgen Melikyan

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Systemverilog: Professor: Sci.D., Professor Vazgen Melikyan

Uploaded by

Copyright:

Available Formats

SystemVerilog

Professor: Sci.D., Professor

Synopsys University Courseware

 Prohibited instantiation virtual classes

virtual class <class_name>

class ChildClass extends BaseClass;

Fork join Finishes when all child threads are over

Fork join_any Finishes when any child thread gets over

Fork join_none Finishes soon after child threads are spawned

initial begin e is triggered at 348

 Has a fixed number of keys

task getRoom (bit [1:0] id);

 Multiple threads running in parallel and want

typedef mailbox #(string) s_mbox;

You might also like