ECE265 1

ECE 265 – LECTURE 4

The M68HC11 Address Modes

06/06/22
 Lecture Overview
2

 The M68HC11 Addressing Modes

 Special Consideration
 Details of the various Addressing modes
 (Note: And this is a very simple architecture)

 Material from Chapter 2 plus a 68HC11 reference

manual.

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Special Considerations
3

 To start, look at the programmers model of the

architecture. What registers are available?

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Special Considerations
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 To start, look at
the programmers
model of the
architecture.
What registers
are available?

 Registers in the
CPU

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Special Consideration
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 Consider that there is an Index Register and a Stack

Pointer.
 This indicates that these register will allow for more
than simple load and store data transfers.

 Will now examine the modes of data transfer

permitted.
 The 68HC11 architecture support addressing
modes that allow the basis to understand the
addressing modes on any architecture.
 Joanne E. DeGroat, OSU ECE265 06/06/22
 Immediate Addressing (IMM)
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 In immediate addressing the

instruction itself contains the
data to be loaded into the
destination.
 Consider the instruction
 LDAA #15 This
instruction will load $0F into
Accumulator A
 In memory it will look like:
(op code of LDAA is $86) the
data immediately follows the
instruction in memory.

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Some examples from text
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 Load Immediate
 LDAA #10 Loading a decimal value
 Loads the binary for 10, i.e.,
 a value of $0A into accumulator A
 LDAA #$1C Loads the hexadecimal value $1C in A
 LDAA #@03 Loads the octal value 3 into A
 LDAA #%11101100Loads a binary value
 LDAA #’C’ Loads the ASCII code for the letter C

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Extended Addressing Mode (EXT)
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 This addressing mode introduces the concept of the

effective address of an operand.
 The effective address of an operand is the address
in memory of the operand and is usually a
calculated value.
 This mode also introduces the use of an instruction
prebyte in the machine code of the 68HC11.
 Instructions that require a prebyte take 4 bytes of
memory. Prebytes are either $18, $1A, or $CD

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Example of Extended addressing
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 Machine code and effect

 Joanne E. DeGroat, OSU ECE265 06/06/22

10

 Ended here on Wed W2, Class 4

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Direct Addressing (DIR)
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 In direct addressing the least significant byte of the 16-bit

address of the operand is in the instruction.
 The high order byte is taken to be $00. This is how you
access the 256 bytes of RAM. (could also use extended)

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Inherent (INH) addressing mode
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 In this addressing mode all the information

required for execution is contained in the
instruction.
 No other operand is required.
 Examples:
 Increment an Accumulator (either A or B)
 Accumulator A+Accumulator B  Accumulator A

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Relative Addressing Mode (REL)
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 Relative addressing is much like it sounds. The

address is relative to something else.
 In the case of the 68HC11 relative addressing mode
is used only for branch instructions.
 It is a 2 byte instruction with the second byte being
the offset (-128 to +127) to take if the condition is
TRUE.
 When the condition is not met, execution continues
with the next instruction.
 Joanne E. DeGroat, OSU ECE265 06/06/22
 BCC example of relative (REL)
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 Joanne E. DeGroat, OSU ECE265 06/06/22

 Indexed Addressing Mode
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 There are two index address registers, X and Y,

providing two indexed addressing modes, INDX
and INDY.
 The value in the indexed register is added to an
offset contained in the instruction to obtain the
effective address of the operand.
 This is best seen by an example

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Indexed Mode example
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 Joanne E. DeGroat, OSU ECE265 06/06/22

 Lecture summary
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 Have covered
 The addressing Modes of the 68HC11
 What the modes are and how they provide access to
the operand of the instruction
 What an effective address is.
 Knowledge base
 What are the addressing modes
 Where the operand (target data) for each operation
comes from and where the result is stored.

 Joanne E. DeGroat, OSU ECE265 06/06/22

 Assignment
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 Read Chapter 3.1 through 3.6

 Problems – refer to web page
 2.4
 2.6
 2.19
 2.21

 Joanne E. DeGroat, OSU ECE265 06/06/22