PSEUDO CMOS:

A DESIGN STYLE FOR LOW COST AND ROBUST FLEXIBLE

ELECTRONICS

BY
AKANSHA LAL(2K21/VLS/03)
SHWETA(2K21/VLS/18)
OBJECTIVE
 To increase carrier mobility

 To design flexible electronic circuits

DISADVANTAGES OF CONVENTIONAL
DIGITAL SYSTEM DESIGN
Diode load and Resistive load designs have
 High static power consumption
 Poor noise margin
 Lager gain lower noise margin so cascading of diode
load inverters will not work
 Complementary type inverters have asymmetric
characteristics due to their mobility
 Less reliable and slower than monotype
ABSTRACT
TFTs are key elements for flexible electronics implemented on low-
cost substrates
 Monotype TFTs are used either n- or p-type devices

 In this paper, we propose a novel design style Pseudo-

CMOS for flexible electronics that uses only monotype single-Vt TFTs
but has comparable performance with the complementary type or
dual-VT designs.
 The manufacturing cost and complexity can therefore be significantly
reduced, whereas the circuit yield
and reliability are enhanced with built-in post fabrication tunability.
 Digital cells are fabricated in two different TFT technologies,
i.e., p-type self-assembled-monolayer(SAM)-organic TFTs and n-type
metal–oxide InGaZnO TFTs
 To validate the proposed Pseudo-CMOS design style. To the best of
our knowledge, this is the first design solution that has been
experimentally proven to achieve superior performance for both types
of TFT technologies.
REFERENCE PAPER

 Pseudo-CMOS: A Design Style for Low-Cost and Robust Flexible Electronics IEEE
TRANSACTIONS ON ELECTRON DEVICES, VOL. 58, NO. 1, JANUARY 2011
 S.-K. Lee, H. Jang, M. Hasan, J. B. Koo, and J.-H. Ahn, “Mechanically flexible thin
film transistors and logic gates on plastic substrates by use of single-crystal silicon
wires from bulk wafers,” Appl. Phys. Lett., vol. 96, no. 17, p. 173 501, Apr. 2010.
 R. Blache, J. Krumm, and W. Fix, “Organic CMOS circuits for RFID applications,” in
Proc. IEEE ISSCC Dig. Tech. Papers, 2009, pp. 208–209,209a.
 Organic Pseudo-CMOS Circuits for Low-Voltage Large-Gain High-Speed Operation
IEEE ELECTRON DEVICE LETTERS, VOL. 32, NO. 10, OCTOBER 2011