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Chapter-6

Memory Management

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Memory Management
Background
• Program must be brought into memory and placed within a process for
it to be executed.
• Input queue – collection of processes on the disk that are waiting to be
brought into memory for execution.
• User programs go through several steps before being executed.

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Logical vs. Physical Address Space
• The concept of a logical address space that is bound to a separate
physical address space is central to proper memory management.
• Logical address – generated by the CPU; also referred to as virtual address.
• Physical address – address seen by the memory unit.
• Logical and physical addresses are the same in compile-time and load-
time address-binding schemes; logical (virtual) and physical addresses
differ in execution-time address-binding scheme.

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Memory-Management Unit (MMU)
• Hardware device that maps virtual to physical address.
• In MMU scheme, the value in the relocation register is added to every
address generated by a user process at the time it is sent to memory.
• The user program deals with logical addresses; it never sees the real
physical addresses.

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Swapping
• Swapping is a mechanism in which a process can be swapped
temporarily out of main memory (or move) to secondary storage (disk)
and make that memory available to other processes. At some later
time, the system swaps back the process from the secondary storage to
main memory.
• Though performance is usually affected by swapping process but it
helps in running multiple and big processes in parallel and that's the
reason Swapping is also known as a technique for memory
compaction.

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Schematic View of Swapping

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Memory allocation
• Memory is a large array of bytes, where each byte has its own address.
The memory allocation can be classified into two methods contiguous
memory allocation and non-contiguous memory allocation. The major
difference between Contiguous and Noncontiguous memory allocation
is:
• The contiguous memory allocation assigns the consecutive blocks of
memory to a process requesting for memory whereas,
• The noncontiguous memory allocation assigns the separate memory
blocks at the different location in memory space in a nonconsecutive
manner to a process requesting for memory.

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Dynamic Storage-Allocation Problem

• First-fit: Allocate the first hole that is big enough.


• Best-fit: Allocate the smallest hole that is big enough; must search
entire list, unless ordered by size. Produces the smallest leftover hole.
• Worst-fit: Allocate the largest hole; must also search entier list.
Produces the largest leftover hole.

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Fragmentation
• As processes are loaded and removed from memory, the free memory space is
broken into little pieces. It happens after sometimes that processes cannot be
allocated to memory blocks considering their small size and memory blocks
remains unused. This problem is known as Fragmentation.
• Fragmentation is of two types:
1. External fragmentation
• Total memory space is enough to satisfy a request or to reside a process in it, but
it is not contiguous, so it cannot be used.
2. Internal fragmentation
• Memory block assigned to process is bigger. Some portion of memory is left
unused, as it cannot be used by another process.
Memory Management
Fragmentation

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Paging
• Logical address space of a process can be noncontiguous; process is
allocated physical memory whenever the latter is available.
• Divide physical memory into fixed-sized blocks called frames (size is power
of 2, between 512 bytes and 8192 bytes).
• Divide logical memory into blocks of same size called pages.
• Keep track of all free frames.
• To run a program of size n pages, need to find n free frames and load
program.
• Set up a page table to translate logical to physical addresses.
• Internal fragmentation.
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Address Translation Scheme
• Address generated by CPU is divided into:
• Page number (p) – used as an index into a page table which contains base address of each page in
physical memory.
• Page offset (d) – combined with base address to define the physical memory address that is sent to the
memory unit.
Address Translation
• Page address is called logical address and represented by page number and the offset.
Logical Address = Page number + page offset
• Frame address is called physical address and represented by a frame number and the offset.
Physical Address = Frame number + page offset
• A data structure called page map table is used to keep track of the relation between a page of
a process to a frame in physical memory.

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Address Translation Architecture

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Paging Example

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Implementation of Page Table
• Page table is kept in main memory.
• Page-table base register (PTBR) points to the page table.
• Page-table length register (PRLR) indicates size of the page table.
• In this scheme every data/instruction access requires two memory
accesses. One for the page table and one for the data/instruction.
• The two memory access problem can be solved by the use of a special
fast-lookup hardware cache called associative registers or translation
look-aside buffers (TLBs)

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Associative Register
• Associative registers – parallel search
Page # Frame #

Address translation (A´, A´´)


• If A´ is in associative register, get frame # out.
• Otherwise get frame # from page table in memory

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Segmentation
• Segmentation is a memory management technique in which each job is
divided into several segments of different sizes, one for each module
that contains pieces that perform related functions. Each segment is
actually a different logical address space of the program.
• When a process is to be executed, its corresponding segmentation are
loaded into noncontiguous memory though every segment is loaded
into a contiguous block of available memory.
• Segmentation memory management works very similar to paging but
here segments are of variable-length where as in paging pages are of
fixed size.

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Segmentation(cont..)
• The operating system maintains a segment map table for every
process and a list of free memory blocks along with segment numbers,
their size and corresponding memory locations in main memory. For
each segment, the table stores the starting address of the segment and
the length of the segment. A reference to a memory location includes a
value that identifies a segment and an offset.

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Segmentation(cont..)

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Logical View of Segmentation
1

4
1

3 2
4

user space physical memory space

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Segmentation Architecture
• Logical address consists of a two tuple:
<segment-number, offset>,
• Segment table – maps two-dimensional physical addresses; each table entry has:
• base – contains the starting physical address where the segments reside in memory.
• limit – specifies the length of the segment.
• Segment-table base register (STBR) points to the segment table’s location in
memory.
• Segment-table length register (STLR) indicates number of segments used by a
program;
segment number s is legal if s < STLR.

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Segmentation Architecture (Cont.)
• Protection. With each entry in segment table associate:
• validation bit = 0  illegal segment
• read/write/execute privileges
• Protection bits associated with segments; code sharing occurs at
segment level.
• Since segments vary in length, memory allocation is a dynamic
storage-allocation problem.
• A segmentation example is shown in the following diagram

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Sharing of segments

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Virtual Memory
• Virtual memory – separation of user logical memory from physical
memory.
• Only part of the program needs to be in memory for execution.
• Logical address space can therefore be much larger than physical address
space.
• Need to allow pages to be swapped in and out.
• Virtual memory can be implemented via:
• Demand paging
• Demand segmentation

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Demand paging
• A demand paging system is quite similar to a paging system with swapping where
processes reside in secondary memory and pages are loaded only on demand, not
in advance. When a context switch occurs, the operating system does not copy
any of the old program’s pages out to the disk or any of the new program’s pages
into the main memory Instead, it just begins executing the new program after
loading the first page and fetches that program’s pages as they are referenced.
• While executing a program, if the program references a page which is not
available in the main memory because it was swapped out a little ago, the
processor treats this invalid memory reference as a page fault and transfers
control from the program to the operating system to demand the page back into
the memory.

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Demand Paging
• Bring a page into memory only when it is needed.
• Less I/O needed
• Less memory needed
• Faster response
• More users
• Page is needed  reference to it
• invalid reference  abort
• not-in-memory  bring to memory

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Valid-Invalid Bit
• With each page table entry a valid–invalid bit is associated
(1  in-memory, 0  not-in-memory)
• Initially valid–invalid but is set to 0 on all entries.
• Example of a page table snapshot.
Frame # valid-invalid bit
1
1
1
1
0

0
0
page table

• During address translation, if valid–invalid bit in page table entry is 0  page fault.
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Page Fault
• If there is ever a reference to a page, first reference will trap to
OS  page fault
• OS looks at another table to decide:
• Invalid reference  abort.
• Just not in memory.
• Get empty frame.
• Swap page into frame.
• Reset tables, validation bit = 1.
• Restart instruction: Least Recently Used
• block move

• auto increment/decrement location


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What happens if there is no free frame?
• Page replacement – find some page in memory, but not really in use,
swap it out.
• algorithm
• performance – want an algorithm which will result in minimum number of
page faults.
• Same page may be brought into memory several times.

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Performance of Demand Paging
• Page Fault Rate 0  p  1.0
• if p = 0 no page faults
• if p = 1, every reference is a fault

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Page Replacement
• Prevent over-allocation of memory by modifying page-fault service
routine to include page replacement.
• Use modify (dirty) bit to reduce overhead of page transfers – only
modified pages are written to disk.
• Page replacement completes separation between logical memory and
physical memory – large virtual memory can be provided on a smaller
physical memory.

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Page-Replacement Algorithms
• Want lowest page-fault rate.
• Evaluate algorithm by running it on a particular string of memory
references (reference string) and computing the number of page faults
on that string.
• In all our examples, the reference string is
1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5.

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First-In-First-Out (FIFO) Algorithm
• Oldest page in main memory is the one which will be selected for replacement.
• Reference string: 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5
• 3 frames (3 pages can be in memory at a time per process)
1 1 4 5
2 2 1 3 9 page faults
3 3 2 4
• 4 frames

1 1 5 4
2 2 1 5 10 page faults
3 3 2

4 4 3
• FIFO Replacement – Belady’s Anomaly
• more frames  less page faults
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Optimal Algorithm
• Replace page that will not be used for longest period of time.
• 4 frames example
1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5
1 4
2 6 page faults
3

4 5

• How do you know this?


• Used for measuring how well your algorithm performs.

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Least Recently Used (LRU) Algorithm
• Reference string: 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5
1 5
2

3 5 4
4 3

• Counter implementation
• Every page entry has a counter; every time page is referenced through this entry, copy
the clock into the counter.
• When a page needs to be changed, look at the counters to determine which are to change.

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Least Frequently Used (LFU) Algorithm
• The page with the smallest count is the one which will be selected for
replacement.
• This algorithm suffers from the situation in which a page is used
heavily during the initial phase of a process, but then is never used
again.

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