TELECOMMUNICATION

PRESENTATION

Submitted to:
Prof. Usman Sagir
Submitted by:
Kousar javed
Roll no.57(morning)
Semester 7th
Session 2018-2022
BZU Sub-Campus Lodhran
Content;
Introduction
Type of error
Error Detection
Error Detection techniques
Parity bit Error
Cyclic Redundancy Check
OBJECTIVES:
To identify the types of error commonly
found in telecommunication networks.
To specify the different error prevention
techniques.
To different the simple different types of
parity checking.
To describe cyclic redundancy check
machanism
 Introduction:
Error:
When data is transmitted from one
device to another device, the system
does not guarantee whether the data
received by the device is identical to
the data transmitted by another
device. An Error is a situation when
the message received at the
receiver end is not identical to the
message transmitted.
Type of Errors:

There may be three types of

errors:
Single Bit Error
Multiple Bit Error
Burst Bit Error
Single Bit Error:
In a frame, there is only one
bit, anywhere though, which is
corrupt.
Multiple Bit Error:
Frame is received with more than
one bits in corrupted state.
Burst Bit Error:
Frame contains more than1
consecutive bits corrupted.
Error detection
Errors in the received frames are detected
by means of Parity Check and Cyclic
Redundancy Check (CRC). In both cases,
few extra bits are sent along with actual
data to confirm that bits received at other
end are same as they were sent. If the
counter-check at receiver’ end fails, the
bits are considered corrupted.
Error detection techniques:
There are three different techniques
are used for error detection:
Parity Bit Check
1) single parity bit
2) two dimensional parity bit
Cyclic redundancy check
Parity Bit Check:
1)Single parity Bit:

One extra bit is sent along with the original

bits to make number of 1s either even in case
of even parity, or odd in case of odd parity.
The sender while creating a frame counts the
number of 1s in it. For example, if even parity
is used and number of 1s is even then one bit
with value 0 is added. This way number of 1s
remains even.If the number of 1s is odd, to
make it even a bit with value 1 is added.
.
Single parity bit
mechanism:
The receiver simply counts the number of 1s
in a frame. If the count of 1s is even and
even parity is used, the frame is considered
to be not-corrupted and is accepted. If the
count of 1s is odd and odd parity is used, the
frame is still not corrupted.
If a single bit flips in transit, the receiver can
detect it by counting the number of 1s. But
when more than one bits are erro neous,
then it is very hard for the receiver to detect
the error.
Two dimensinal parity Bit:
Performance can be improved by using
two-dimensional parity check, which
organizes the block of bits in the form
of a table. Parity check bits are
calculated for each row, which is
equivalent to a simple parity check bit.
Parity check bits are also calculated for
all columns then both are sent along
with the data. At the receiving end
these are compared with the parity bits
calculated on the received data.
Cyclic redundancy check:
CRC is a different approach to detect if
the received frame contains valid data.
This technique involves binary division
of the data bits being sent. The divisor is
generated using polynomials. The
sender performs a division operation on
the bits being sent and calculates the
remainder.
Cyclic redundancy Mechanism:
Explanation:
Before sending the actual bits, the
sender adds the remainder at the end of
the actual bits. Actual data bits plus the
remainder is called a codeword. The
sender transmits data bits as codewords.
At the other end, the receiver performs
division operation on codewords using
the same CRC divisor. If the remainder
contains all zeros the data bits are
accepted, otherwise it is considered as
there some data corruption occurred in
transit.
Any question?

THANK YOU