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CST2555 2022/23
Operating Systems and
Computer Networks
Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018
What we will learn today
Week 5: CPU Scheduling:
Basic Concepts
Scheduling Criteria
Scheduling Algorithms
Thread Scheduling
Multi-Processor Scheduling
Real-Time CPU Scheduling
Operating Systems Examples
Algorithm Evaluation
After this lecture you should
P1 P2 P3
0 24 27 30
P2 P3 P1
Waiting
0 time3 for P1 =6 6; P2 = 0; P3 = 3 30
Associate with each process the length of its next CPU burst
• Use these lengths to schedule the process with the
shortest time
SJF is optimal – gives minimum average waiting time for a
given set of processes
Preemptive version called shortest-remaining-time-first
How do we determine the length of the next CPU burst?
• Could ask the user
• Estimate
Example of SJF
P4 P1 P3 P2
0 3 9 16 24
Can only estimate the length – should be similar to the previous one
• Then pick process with shortest predicted next CPU burst
Can be done by using the length of previous CPU bursts, using
exponential averaging
Commonly, α set to ½
Prediction of the Length of the Next CPU Burst
Examples of Exponential Averaging
=0
• n+1 = n
• Recent history does not count
=1
• n+1 = tn
• Only the actual last CPU burst counts
If we expand the formula, we get:
n+1 = tn+(1 - ) tn -1 + …
+(1 - )j tn -j + …
+(1 - )n +1 0
Shortest Remaining Time First Scheduling
P1 P2 P4 P1 P3
0 1 5 10 17 26
The CPU is allocated to the process with the highest priority (smallest
integer highest priority)
• Preemptive
• Nonpreemptive
Run the process with the highest priority. Processes with the same
priority run round-robin
Example:
Processa Burst Time Priority
P1 4 3
P2 5 2
P3 8 2
P4 7 1
P5 3 3
Gantt Chart with time quantum = 2
Multilevel Queue
The ready queue consists of multiple queues
Multilevel queue scheduler defined by the following parameters:
• Number of queues
• Scheduling algorithms for each queue
• Method used to determine which queue a process will enter
when that process needs service
• Scheduling among the queues
Multilevel Queue
With priority scheduling, have separate queues for each priority.
Schedule the process in the highest-priority queue!
Multilevel Queue
Compute cycles can be blocked by the time needed to access memory, whenever the
needed data is not already present in the cache. ( Cache misses. ) In Figure below, as
much as half of the CPU cycles are lost to memory stall.
When a thread has been running on one processor, the cache contents
of that processor stores the memory accesses by that thread.
We refer to this as a thread having affinity for a processor (i.e.,
“processor affinity”)
Load balancing may affect processor affinity as a thread may be moved
from one processor to another to balance loads, yet that thread loses
the contents of what it had in the cache of the processor it was moved
off of.
Soft affinity – the operating system attempts to keep a thread running
on the same processor, but no guarantees.
Hard affinity – allows a process to specify a set of processors it may
run on.
NUMA and CPU Scheduling
If the operating system is NUMA-aware, it will assign memory closes
to the CPU the thread is running on.
Real-Time CPU Scheduling
Can present obvious challenges
Real time system means that the system is subjected to real time, i.e., response should be
guaranteed within a specified timing constraint or system should meet the specified deadline.
Typical examples of real-time systems include Air Traffic Control Systems, Networked Multimedia
Systems, Command Control Systems etc
Fast context switch
Ability to respond to interrupts quickly Ability to respond to interrupts quickly (Special interrupts
handlers) (Special interrupts handlers)
Special storage to accumulate data
Preemptive scheduling
All sorts of latency to be minimized.
Event latency – Event Latency is the time between the occurrence of a triggering event and the
( completion of ) the system's response to the event:
Interrupt latency – time from arrival of interrupt to the CPU to when it is serviced
Dispatch latency – time required for scheduler to take current process off CPU and switch to
another
Soft real-time systems – Critical real-time tasks have the highest priority, but no guarantee as to
when tasks will be scheduled
Hard real-time systems – task must be serviced by its deadline
Real-Time CPU Scheduling
Event Latency
Interrupt Latency
Interrupt processing
determines which
interrupt(s) have
occurred, and which
interrupt handler
routine to run. In the
event of
simultaneous
interrupts, a priority
scheme is needed to
determine which ISR
has the highest
priority and gets to
go next.
Dispatch Latency
The total dispatch latency ( context switching ) consists of
two parts:
• Removing the currently running process from the CPU, and
freeing up any resources that are needed by the ISR.
This step can be speeded up a lot using pre-emptive kernels.
• Loading the ISR up onto the CPU, ( dispatching )
Priority-based Scheduling
For real-time scheduling, scheduler must support preemptive, priority-based scheduling
• Real-time systems require pre-emptive priority-based scheduling systems.
• Soft real-time systems do the best they can,but make no guarantees.
Hard real-time systems, described here, must be able to provide firm guarantees that a
tasks scheduling needs can be met.
One technique is to use an admission-control algorithm, in which each task must specify its
needs at the time it attempts to launch, and the system will only launch the task if it can
guarantee that its needs can be met.
Hard real-time systems are often characterized by tasks that must run at regular periodic
intervals, each having a period p, a constant time required to execute, ( CPU burst ), t, and
a deadline after the beginning of each period by which the task must be completed, d.
In all cases, t <= d <= p
Rate Monotonic Scheduling
The rate-monotonic scheduling algorithm uses pre-emptive scheduling with
static priorities.
Priorities are assigned inversely to the period of each task, giving higher
( better ) priority to tasks with shorter periods.
Suppose that process P1 has a period of 50, an execution time of 20, and a
deadline that matches its period ( 50 ).
Similarly suppose that process P2 has period 100, execution time of 35, and
deadline of 100.
P1 is given higher priority, it gets to go first, and P2 starts after P1 completes
its burst.
At time 50 when the next period for P1 starts, P2 has only completed 30 of its
35 needed time units, but it gets pre-empted by P1.
At time 70, P1 completes its task for its second period, and the P2 is allowed
to complete its last 5 time units.
Overall both processes complete at time 75, and the cpu is then idle for 25
time units, before the process repeats.
Missed Deadlines with Rate Monotonic Scheduling
At time 0 P1 has the earliest deadline, highest priority, and goes first., followed
by P2 at time 25 when P1 completes its first burst.
At time 50 process P1 begins its second period, but since P2 has a deadline of 80
and the deadline for P1 is not until 100, P2 is allowed to stay on the CPU and
complete its burst, which it does at time 60.
P1 then starts its second burst, which it completes at time 85. P2 started its
second period at time 80, but since P1 had an earlier deadline, P2 did not pre-
empt P1.
P2 starts its second burst at time 85, and continues until time 100, at which time
P1 starts its third period.
At this point P1 has a deadline of 150 and P2 has a deadline of 160, so P1
preempts P2.
P1 completes its third burst at time 125, at which time P2 starts, completing its
third burst at time 145.
The CPU sits idle for 5 time units, until P1 starts its next period at 150 and P2 at
160.
Example 2 (EDF)
Consider two
processes P1 and P2.
Let the period of P1
be p1 = 50
Let the processing
time of P1 be t1 = 25
Let the period of P2
be period2 = 75
Let the processing
time of P2 be t2 = 30
Steps for solution:
1. Deadline pf P1 is earlier, so priority of P1>P2.
2. Initially P1 runs and completes its execution of
25 time.
3. After 25 times, P2 starts to execute until 50
times, when P1 is able to execute.
4. Now, comparing the deadline of (P1, P2) =
(100, 75), P2 continues to execute.
5. P2 completes its processing at time 55.
6. P1 starts to execute until time 75, when P2 is
able to execute.
7. Now, again comparing the deadline of (P1, P2)
= (100, 150), P1 continues to execute.
8. Repeat the above steps…
9. Finally at time 150, both P1 and P2 have the
same deadline, so P2 will continue to execute
till its processing time after which P1 starts to
execute.
Proportional Share Scheduling
Scheduling classes
• Each has specific priority
• Scheduler picks highest priority task in highest scheduling class
• Two scheduling classes included, others can be added
1. default
2. real-time
Linux Scheduling in Version 2.6.23 + (Cont.)
• RR is 23ms:
Queueing Models
Specific process data is often not available, particularly for future
times. However a study of historical performance can often
produce statistical descriptions of certain important parameters,
such as the rate at which new processes arrive, the ratio of CPU
bursts to I/O times, the distribution of CPU burst times and I/O
burst times, etc.
Describes the arrival of processes, and CPU and I/O bursts
probabilistically
• Commonly exponential, and described by mean
• Computes average throughput, utilization, waiting time, etc.
Computer system described as network of servers, each with
queue of waiting processes
• Knowing arrival rates and service rates
• Computes utilization, average queue length, average wait
time, etc.
Little’s Formula
For example, Little's Formula says that for an average queue
length of N, with an average waiting time in the queue of W, and
an average arrival of new jobs in the queue of Lambda, then
these three terms can be related by:
n = average queue length
W = average waiting time in queue
λ = average arrival rate into queue
Little’s law – in steady state, processes leaving queue must equal
processes arriving, thus:
n=λxW
• Valid for any scheduling algorithm and arrival distribution
For example, if on average 7 processes arrive per second, and
normally 14 processes in queue, then average wait time per
process = 2 seconds
Simulations
Another approach is to run computer simulations of the different
proposed algorithms ( and adjustment parameters ) under different
load conditions, and to analyze the results to determine the "best"
choice of operation for a particular load pattern.
Simulations more accurate
• Programmed model of computer system
• Clock is a variable
• Gather statistics indicating algorithm performance
• Data to drive simulation gathered via different methods
Like generating trace tapes, by monitoring and logging the
performance of a real system under typical expected work
loads.
Evaluation of CPU Schedulers by Simulation
Implementation
Even simulations have limited accuracy
Just implement new scheduler and test in real systems
• High cost, high risk
• Environments vary
Most flexible schedulers can be modified per-site or per-system
END OF WEEK 5
Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018