AMBA INTRODUCTION•

Advance microcontroller Bus Architecture (AMBA), developed by ARM as an interface

for their microprocessors.
• Very common in commercial SoC's (e.g. Qualcomm Multimedia Cellphone SoC)
• Available in three standards: APB, AHB, AXI, ASB
• AMBA 2.0 released in 1999, includes APB, AHB, ASB
• AMBA 3.0 released in 2003, includes AXI
 T H E A D VA N C E D H I G H - P E R F O R M A N C E B U S
(AHB):

suited for high clock frequency system for providing :

• High performance
• High Bandwidth

The advanced peripheral bus (APB):

Establish connection between peripherals which having

• small bandwidth.
• Low power consumption
• Reduce interface complexity
• Pipelined operation is not supported by APB, so it
• makes communication with ASB or AHB
MAIN UNITS OF AHB2APB BRIDGE:

AHB master :A bus master is able to initute read and write operations by providing an
address and control information. Only one bus master is allowed to actively use the bus
at any one time.
AHB slave: A bus slave responds to a read or write operation within a given address-
space range. The bus stave signals back to the active master the success, failure or
waiting of the data transfer.
AHB arbiter:The bus arbiter ensures that only one bus master at a time is allowed to
initiate data transfers.
AHR decoder : The AHB decoder is used to decode the address of each transfer and
provide a select signal for the slave that is involved in the transfer.
 DESIGN OF AMBA BASED AHB2APB BRIDGE

AHB2APB Bridge It is leading chunk which is not a small compared to others.. To connect various elements present in top,
all signals behaves as wires and connect all module within chief top chunk. This top factor having AHB slave, AHB2APB
bridge element & APB interface.
BLOCK DIAGRAM OF BRIDGE MODULE
INTRODUCING THE AMBA AHB

• AHB is a new generation of AMBA bus which is intended to address the

requirements of high-performance synthesizable design. It is a high-performance
system bus that supports multiple bus masters and provides high-bandwidth
operation.
• AMBA AHB implements the features required for high-performance, high
clockfrequency systems including
• Split transactions
• single-cycle bus master handover
• single-clock edge operation
• non-tritate implementation
• wider data bus configurations (64/128 bits)
 INTRODUCING THE AMBA APB

The APB is part of the AMBA hierarchy of bases and is optimized the minimal power consumption and reduced
interface complexity
The AMBA APB appears as a local secondary bus that is encapsulated as a single AHB or ASB slave device APB
provides a low-power extension to the system buswhich builds on AHB or ASB signals directly
• This improvement ensures the APB peripherals integrated easily into any design flow, with the following
advantages

high-frequency operation easier to achieve

1. performance is independent of the mark-space ratio of the clock
2. state timing analyses is simplified by the use of a single clock edge
3. no special considerations are required for automatic test insertion
4. many Application Specific Integrated Circuit (ASIC) libraries have a better
5. selection of rising edge registers
6. cany integration with cycle-based simulators