INTERFACE DESIGN

OBJECTIVE OF TRAINING

 To make trainees aware of Microlok II as a product for

railway signalling.
 To understand Microlok II as a product for railway
signalling.
 To know various hardware used in Microlok II (MLKII).
 To know various aspects of design, installation, testing
and commissioning of MLKII.
 To configure, design, install, commission and maintain
MLKII.
 To update post commissioning changes in yard
 DESIGN

Microlok II Design consists of:

Interface Design:
 Wiring diagram of relays, panels, CT racks,
 Power supply, Microlok II card file etc.
 (Mainly external to MLKII)

Application Program Design:

 Complete Interlocking program, further converted in
conventional circuit for which is easy to understand
 INPUTS FOR DESIGN

To start design of MLK II based Interlocking system,

Inputs required are:

 Approved Signal Interlocking Plan

 Approved Front Plate Drawing
 Power supply scheme
 Relay room building layout
 CT rack termination details
 Details of any additional interlocking equipment to
be interfaced with MLKII
 PROCESS OF INTERFACE DESIGN

 Vital and Non-vital I/O bit calculation

 Vital and Non-vital board calculation
 System configuration and serial communication
 Power calculation
 Interconnection of various racks and interlocking
equipment
 Manuscript of complete wiring diagram
 CALCULATION OF I/O BITS

Gather following information from Interlocking plan:

 Type of signals, direct / indirect feed

 Points / Cross over and type of control / operation
 Motor points / Hand operated points
 Level crossings, siding control and crank handles
 Track circuits
 Axle counters
 Type of block working with adjacent stations
 CALCULATION OF I/O BITS

Gather following information from Front Plate Drawing:

 Number of push button controls and key controls

 Number of indications, counters, buzzers, bells etc

The information gathered from “Signal Interlocking Plan”

and “Front Plate Drawing” is used to calculate Vital I/O
and Non-Vital I/O respectively.
 CALCULATION OF I/O BITS

Example of I/O Bits:

Out door Vital Vital Non-vital Non-vital Relays

Gear Output Input Input Output
3A Signal DR DECR GN DGKE ECR – 4
with HR HECR RGKE QNN1 – 2
Calling On COHR RECR AJKE
COHECR COKE
2A Signal HR HECR GN HGKE ECR – 2
RECR RGKE QNN1 – 1
AJKE
 CALCULATION OF I/O BITS

Example of I/O Bits:

Out door Vital Vital Input Non-vital Non-vital Relays

Gear Output Input Output
Points WNR NWKR WN NWKE QNN1 – 1
WRR RWKR RWKE QNNA1 – 1
WLKE

Track TPR TKE QNNA1 - 1

Circuit TKRE
 CALCULATION I/O BITS

Example of I/O Bits:

Out door Vital Vital Non-vital Non-vital Relays

Gear Output Input Input Output
Crank CHRR KTINPR CHN CHKE QNN1 - 1
Handle CHR CHKRE

Siding KTRR KTINPR KTN KTKE QNN1-1

Control KTR KTKRE

Level LXRR LXINPR LXN LXKE QNN1-1

Crossing LXR LXKRE QNNA1-1
 CALCULATION OF BOARD & RELAYS

After finding out final quantity of Vital and Non-vital I/O bits,
quantity of various boards is derived as below:

 16 Vital Inputs per one Vital Input Card

 16 Vital Outputs per one Vital Output Card
 32 Non-vital Inputs and 32 Non-vital Outputs
per one Non-vital Card
 8 Vital Inputs and 8 Vital Outputs per one Mixed
Vital I/O Card
 Calculate various relays on the basis of above
table and decide on size and design of relay rack
 Per Card file, allocate 16 cards either Vital or Non-vital
 ESTIMATE MLK II HARDWARE

 48 Pin Connector Assembly: Sum of Vital I/O Boards,

CPU and Power supply PCB
 48 Pin Address select PCB: Sum of Vital I/O Boards
 96 Pin Connector Assembly: Sum of Non-vital
Boards
 96 Pin Address select PCB: Sum of Non-vital Boards
 Each Cardfile will have one CPU, one PS PCB and
one VCOR
 Each CPU will have one EEPROM PCB
 CONFIGURATION OF MLK II

 Place maximum of 16 nos. of either Vital or Non-vital

cards per Cardfile. Arrive at final quantity of cardfiles.
 On the basis of requirement of installation / site,
MLK II is connected with the peripheral equipments
such as VDUs and another MLK II units.
 All the peripherals are connected with MLK II with
serial communication cable.
 I/O from / to control panel are connected through
multi core cables.

THE SAMPLE CONFIGURATION SHOWN NEXT…..

 CONFIGURATION OF MLK II

SM Room
OP.
VDU CONTROL PANEL

To Adjacent To Adjacent
Station Station
P1 P1
MLK II OP VDU Link NV MLK II
P4 P4
UNIT - A UNIT - B
P5 P3 P3 P5
Maint. VDU Link NV MAINT.
Diagnostic Link VDU

RELAY RACK - A CT RACK RELAY RACK - B

Relay Room
 CONFIGURING MLK II

 Operator VDU and Maintenance VDU are connected to

MLKII CPU through “Non-Twisted pair –
Communication” cable
 Communications between MLK II are wired with
Twisted pair – communication cable
 Control panel Inputs and Outputs are connected to
MLKII with help of “Single strand Multi core” cable
 Relay rack and CT racks are connected to MLK II with
“Single Strand Multi core” cable
 Vital Input and Vital Outputs are wired with help of
“Twisted Pair” wires
 Relay wiring is done with help of “Multi strand,
Single core” wire
 DESIGN OF RELAY ROOM FLOOR PLAN

Once calculation of boards, relays and MLK II configuration is finalized

Design of Relay Room Floor Plan is taken up with following criterion:

 MLK II Rack: Size: 2100 mm X 800 mm X 600 mm

Capacity: 2 Cardfiles

 Relay Rack: Size: 2100 mm X 1120 mm X 300 mm

Capacity: 96 Relays

 Termination Rack: Size: 2100 mm X 700 mm X 300 mm

 Capacity: 12 Non-vital boards

 INTERFACE DESIGN

All the required details now available to design Interface

drawings
Interface Drawings consist of:

 Index
 Symbols
 Material List
 Cable & Wire details
 Single Line Station Layout
 Relay Room Floor Plan
 Panel Front Plate drawing
 Route Control Chart
 System Configuration

NEXT
 INTERFACE DESIGN

 Microlok II Bit Chart

 Microlok II Cardfile Layout & Keying Plug Location
 CPU & CPS/EEPROM Connections
 Microlok II CPU board Jumper settings
 Microlok II I/O Board Jumper settings & Addressing circuit
 Serial Ports wiring details
 Non-vital & Vital board wiring
 All field gear driving circuit
 Power supply distribution drawing
 Fuse chart & Terminal Chart
 Rack assembly drawings
 Tag block Reference drawing
 Control Panel LED Identification Layout
 Contact analysis

EXIT
INDEX

END
SYMBOLS

NEXT
SYMBOLS

END
MATERIAL LIST

END
CABLE & WIRE DETAILS

END
 SINGLE LINE LAYOUT
REPRODUCED FROM APPROVED SIP

END
ROOM FLOORPLAN

END
CONTROL CUM INDICATION PANEL LAYOUT

END
ROUTE CONTROL CHART

END
SYSTEM CONFIGURATION

END
MICROLOK II NON-VITAL I/O BIT CHART

NEXT
MICROLOK II VITAL I/O BIT CHART

END
CARDFILE LAYOUT & KEYING PLUG LOCATION
NON-VITAL

NEXT
CARDFILE LAYOUT & KEYING PLUG LOCATION
VITAL

END
CPU BOARD-CPS/EEPROM CONNECTIONS MAIN

NEXT
 CPU BOARD-CPS/EEPROM CONNECTIONS STANDBY

BACK END
CPU BOARD JUMPER SETTINGS

END
TYPICAL NON –VIRAL I/O BOARD JUMPER SETTINGS & ADDRESSING CIRCUITS

NEXT
TYPICAL VITAL I/O BOARD JUMPER SETTINGS & ADDRESSING CIRCUITS

END
SERIAL COMMUNICATION CIRCUIT MASTER – SLAVE MAIN

SYS. CONFIG LINK NEXT

SERIAL COMMUNICATION CIRCUITS MASTER – SLAVE STANDBY

SYS. CONFIG LINK NEXT

SERIAL COMMUNICATION MASTER - SLAVE

SYS. CONFIG LINK NEXT

SERIAL COMMUNICATION MASTER - SLAVE

SYS. CONFIG LINK NEXT

SERIAL COMMUNICATION MASTER - SLAVE

SYS. CONFIG LINK END

NON-VITAL INPUT CIRCUITS

NEXT
NON-VITAL INPUT CIRCUITS

NEXT
NON-VITAL OUTPUT CIRCUITS

NEXT
NON-VITAL OUTPUT CIRCUITS

NEXT
NON-VITAL I/O BOARD POWER CIRCUIT

NEXT
VITAL OUTPUT CIRCUITS

NEXT
VITAL OUTPUT CIRCUITS

NEXT
VITAL INPUT CIRCUITS

NEXT
VITAL INPUT CIRCUITS

END
SIGNAL REPEATER RELAY & LIGHTING CIRCUITS - 1

NEXT
POINT REPEATER RELAYS

NEXT
CRANK HANDLE CONTROL CIRCUITS

NEXT
FIELD INPUT RELAY CIRCUITS

END
POWER DISTRIBUTION

NEXT
POWER DISTRIBUTION –M1 RACK (5V, 12 & 24V DC)

NEXT
POWER DISTRIBUTION – R1 & R2 RACK (110V AC, 24V DC)

NEXT
POWER DISTRIBUTION – M1, M2, R1 & R2 RACK (24V DC)

NEXT
POWER DISTRIBUTION - R1 & R2 RACK (12V & 24V DC)

NEXT
POWER DISTRIBUTION – R1 & R2 RACK (24V DC)

NEXT
POWER DISTRIBUTION – M1 & M2 RACK (24V DC)

NEXT
POWER DISTRIBUTION – M1 & M2 RACK (12V DC)

NEXT
POWER DISTRIBUTION PC & PANEL

END
 EARTHING

R1
T1 EVR ROOM
C TR2

M1 M2

R2
C TR1

REFER DOCUMENT EARTHING, NOISE PROTECTION & EMC VER.1.0

END
R1 RACK LAYOUT

NEXT
R2 RACK LAYOUT

NEXT
M1 & M2 RACK LAYOUT

NEXT
T1 RACK LAYOUT

END
R1 RACK FUSE & TERMINAL CHART

NEXT
M1 RACK FUSE & TERMINAL CHART

NEXT
R1 RACK TERMINAL CHART R1 –CTRACK1 INTERCONNECTION

NEXT
R1 RACK TERMINAL CHART VITAL OUTPUT

NEXT
R1 RACK TERMINAL CHART VITAL INPUT

NEXT
T1 RACK TERMINAL CHART

NEXT
T1 RACK CONTROL PANEL INTERCONNECTION CHART

END
TAG BLOCK PIN REFERENCE

END
CONTROL PANEL LED IDENTIFICATION LAYOUT

END
CONTACT ANALYSIS

END