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DIGITAL LOGIC DESIGN


( CE_118 )

CHAPTER 0:
Overview
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Content
• Advance Sequential Logic

• Storage Components

• Register-Transfer Design

• Processor Design
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General Information
• Subject: Digital Logic Design
• Lecturer: Lam Duc Khai
• Class:
• Rules:
• 3 absented days allowed
• 15 minutes late allowed
• Assessment:
- Attendance/Home works: 10%
- Lab work: 20%
- Mid-term exam: 20%
- Final exam: 50%
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Book & Meterial

1. Lecturer slides

2. Main book: Principles of Digital Design, Daniel D.

GAJSKI

3. Reference book: Digital Systems: principles and

applications (eighth edition), Ronald J.Tocci.

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