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CLASS 5

12th August 2023


Crystal growth to be contd..

CRYSTAL
GROWTH
Basic process of IC fabrication

●Crystal growth

●Wafer preparation
● A crystal is a solid material whose constituent
atoms, molecules, or ions are arranged in an
orderly repeating pattern extending in all three
spatial dimensions.
● A systematic and scientific study of crystals
including process of crystallization, internal
structure, external morphology, properties and
classification of crystals is known as
Crystallography”.
● The study of the formation of crystals is covered
under the subhead “Crystal Growth”. The process
of crystal formation is known as crystallization.
● Why do crystals form?
Crystals are orderly arrangements of pure
substances. For example, diamonds are pure carbon, and
quartz is pure silicon dioxide.
Crystals form as their component atoms move closer
and closer together. This can occur as pressure and
temperature decrease, or as a solvent evaporates

● What controls their shape and size?


Three aspects to the growth of a crystal are
● Nucleation: formation of a stable nucleus
● Diffusion of material to the nucleus
● Growth of the crystal by adding atoms

The slowest of these three aspects generally controls the shape


and size
Different types of crystals
● If diffusion is slow, the crystal
grows spikes to get at the new
material needed & forms a
dendrite or a skeletal crystal
● If nucleation is the restriction
(a) spherulites can form (many
radiating crystals grow from
one nucleus or (b) a few large
crystals
● If growth is the restriction
(slow crystallization) then well
formed crystals develop
Silicon wafers

Silicon wafer

Microchips are made on silicon wafers.


Crystal Growth Techniques
➢ Bridgman technique
➢ This technique cannot be used for materials, which decompose before melting. This
technique is best suited for materials with low melting point.
➢ Czochralski technique
➢ the material to be grown is melted by induction or resistance heating under a
controlled atmosphere in a suitable non-reacting container.
➢ Kyropoulos technique
➢ the crystal is grown in a larger diameter . The major use of this method is growth of
alkali halides to make optical components
➢ Zone melting technique
➢ Zone melting (or zone refining or floating zone process) is a group of similar
methods of purifying crystals, in which a narrow region of a crystal is melted, and
this molten zone is moved along the crystal
➢ Verneuil technique
➢ The principle of the process involves melting a finely powdered substance using
an oxy hydrogen flame, and crystallising the melted droplets into a boule
Czochralski growth
● Technique for producing crystals from which
semiconductor wafers are cut.

● Developed by Czochralski in 1918.

● Main process: solidification of a crystal from a melt.

● Material used: Electronic Grade Polycrystalline


Silicon.
Orientation
➢The processing characteristics and some material
properties of silicon wafers depend on its orientation.

➢ The <111> planes have the highest density of atoms on


the surface, so crystals grow most easily on these planes
and oxidation occurs at a higher pace when compared to
other crystal planes.

➢Traditionally, bipolar devices are fabricated in <111>


oriented crystals whereas <100> materials are preferred
for MOS devices.
Electronics grade Silicon
➢ Electronic Grade Silicon (EGS), a polycrystalline material of high purity,
is the starting material for the preparation of single crystal silicon.
➢ EGS is made from metallurgical-grade silicon (MGS) which in turn is
made from quartzite, which is a relatively pure form of sand.
➢ MGS ( Metallurgical grade Silicon) is purified by the following reaction
:Si(solid) + 3HCl (gas) →SiHCl3 (gas) + H2 (gas) + heat
➢ The boiling point of trichlorosilane(SiHCl3) is 32oC and can be readily
purified using fractional distillation.

➢ EGS is formed by reacting trichlorosilane with hydrogen:


2SiHCl3 (gas) + 2H2 (gas) →2Si (solid) + 6HCl (gas)
● Polycrystalline Si obtained.
● 99.999999% pure.
Czochralski Growth

● Heat EGS around 15000C.


● Insert single crystal seed.
● Rotate and pull the seed.
● Pull rate decides the ingot size.
● Atom layer with same
orientation as that of seed is
developed.
● Diameter vary with speed of
pulling.
Wafers are cut from boules, which are large logs
of uniform silicon.
Pure Si ingots
CZ growth setup
● Apparatus: Puller

● Puller has 4 subsystems:


● Furnace
● Crystal pulling mechanism
● Ambient control
● Control system
Furnace:
Crucible, susceptor and rotation mechanisms, heating element and power

supply, and chamber.
● Crucible contains EGS melt
● Chemically unreactive to molten Si.
● Should have high melting point, thermal stability and hardness.
● Inexpensive and reusable.
● Fused silica is used exclusively today.
● Reacts with silicon and releases silicon and oxygen into the melt.
● Most of oxygen escapes from melt forming silicon monoxide. It condenses
on crucible wall creating cleanliness problem.
● Alternate choice: Silicon nitride. (still developing)
Crystal pulling mechanism
● Minimum vibrations
● Control pull rate and maintain crystal orientation precisely.
● Seed must be held precisely perpendicular to the melt surface.
● Crystal leaves the furnace through a purge tube.
● Ambient gas is directed along the surface of crystal for cooling.
● Crystal enters an upper chamber separated from the furnace through the
purge tube
Ambient control
● Growth must take place in an inert gas or vacuum:
● Hot graphite parts must be protected from oxygen to
prevent erosion.
● Gases in ambience must not react with molten Si.

Control system

■ Maintains process parameters: temperature, crystal


diameter, pull rate, rotation speed etc.
■ Prefers a closed loop system
● Solidification: by reduction in temperature
● Increased pull rate: material cannot solidify as
heat will not be conducted away.
● Material near melt has higher density of point
defects.
● Hence cool quickly to prevent agglomeration
of defects.
● Point defects agglomerate and form most
commonly dislocation loops.
During the process…

● Considerable O2 is released from silica.


● 95% escape from surface as SiO.
● Reduction of O2 concentration: grow boule
under magnetic confinement.
● Field directed along the length of boule.
● Creates Lorentz force (qvB) which will change
the motion of ionized impurities in the melt in
such a manner so as to keep them away from
liquid-solid interface.
Dopant addition
● Dopant may be introduced in the melt.
●Wafer with desired resistivity.
● Boron and Phosphorous commonly for Si
● Complicated since impurities tend to
segregate at solid-liquid interface.
● Segregation co-efficient, k = CS/CL
●CS,CL – impurity concentration at solid &
liquid sides
Impurity Seggragation

➢ Impurities, both intentional and unintentional, are introduced


into the silicon ingot.
➢ Intentional dopants are mixed into the melt during crystal
growth, while unintentional impurities originate from the
crucible, ambient, etc.
➢ All common impurities have different solubilities in the solid
and in the melt.
➢ An equilibrium segregation coefficient ko can be defined to be
the ratio of the equilibrium concentration of the impurity in the
solid to that in the liquid at the interface, i.e. ko= Cs/Cl.
Impurity Distribution

The distribution of an impurity in the grown


crystal can be described mathematically by the
normal freezing
Cs= koc0(1-X)ko-1
is the fraction of the melt solidified
Co is the initial melt concentration,
Cs is the solid concentration
ko is the segregation coefficient
where X is the fraction of liquid solidified
Making silicon boules
Czochralski process:

Melting of Introduction of Beginning of Crystal pulling Formed crystal


polysilicon seed crystal crystal growth
12” (30 cm) Boule
● The ends of the boule are richer in
impurities because of segregation effects.

● When the final amount of liquid solidifies,


all the remaining impurities are trapped.
Wafer Finishing

● Boule characterized for resistivity (probe method) and


crystal perfection
● Mechanically trimmed into proper diameter
● Flats are introduced over the entire length of the boule
● Etching in HF-HNO3 to remove damage from
grinding
Wafers Cut from Boule & Polished
https://www.youtube.com/watch?
v=AMgQ1-HdElM
Shaping operation:
● Remove seed and tang end.
● Remove ingot portions that fail in resistivity and
perfection evaluation.
● Surface grinding: defines diameter of the wafer.
● Flats are ground along the length of the ingot: primary
flat & secondary flat. (according to SEMI standard)
● Slicing.
● Determines surface orientation, thickness, taper and bow.
● Surface orientation analyzed by X-ray analysis.
● Two side lapping using Al2O3 and glycerin ensures flatness of
surface.
Shaping operation leaves the wafer surface and edges
contaminated and damaged…
● Damage depends on the specifics of machining operations.
● Such regions are removed by chemical etching.
● Mixtures of hydrofluoric, nitric and acetic acids:
● Nitric acid is the oxidant.
● HF dissolves the oxidized products.
● Acetic acid dilutes the system for better control on
etching.
● Over the range of 30 to 500C, etching kinetics will be
diffusion controlled rather than reaction rate limited.
Hence HNO3 rich solutions are preferred to remove work
damages.
● Potassium or sodium hydroxide (alkaline etching).
● Rate depends on surface orientation
● Reaction rate limited. Hence no wafer rotation.
Polishing
• Final step.
• Gives a smooth specular surface on which device features can
be photoengraved.
• Can be single wafer or batch wafer processing depending on
equipment.
• Polishing pads made of artificial fabric and dripped with
polishing slurry and water.
• Wafers mounted on a fixture are pressed against the pad under
high pressure and rotated.
– Slurry: colloidal suspension of fine SiO2 particle in an
aqueous solution of sodium hydroxide.
– Heat generated due to friction helps sodium hydroxide to
oxidize the Si with the OH- radical. (chemical)
– Silica particle in the slurry abrades the oxidized silicon
(mechanical).
Challenges associated with growth of GaAs:
● Vapor pressure of Ga is 0.001atm while that of As is ~ 10atm at
melting point (1238C).
● Arsenic evaporates and maintaining stoichiometry will be
difficult.
● The thermal conductivity of GaAs (0.07W/cm-K) is 1/3rd of
that of silicon (0.21W/cm-K)
● Heat dissipation is more difficult
● Critical resolved shear stress for creating dislocation is very
small (1/4th of silicon) at mp
● Very easy to create dislocations in GaAs

➢GaAs is typically grown by LEC or Bridgman methods


Bridgman technique : widely used
LEC for larger diameter ingots.
Liquid encapsulated Czochralski
● A sealant material such as B2O3
is used on top of GaAs to prevent
out diffusion of Arsenic.
● B2O3 melts at ~400C and seals
GaAs.
● Seed crystal is inserted through
sealant on to GaAs.
● Crystal growth occurs usually at
~20atm (high pressure LEC).
● Graphite crucible used.
● Segregation coefficient similar to
that of Si.
Liquid encapsulated Czochralski
● Sealant should have following properties:
● Impervious to As diffusion
● Chemical resistance to GaAs
● Optically transparent
● Lower density than molten GaAs (1.5gm/cc to 5.7gm/cc for GaAs)
● B2O3, CaCl2, BaCl2

● Less Ox contamination; but B gets incorporated

● As B2O3 increases heat transfer, increased chances for


defects
● Annealing or alloying with Indium reduces defects

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