SOFTWARE AND HARDWARE

INTEGRATION
2.1 PIC 16F877A SPECIFICATIONS

 PIC 16F877A is one of the advanced microcontroller from

Microchip.

 Widely used because:

~ low price
~ wide range of applications
~ high quality
~ ease of availability
 2.1 PIC 16F877A SPECIFICATIONS
(CONTINUED …..)
Main features of PIC 16F877A:
 RISC architecture  512 data memory size

 Operating frequency 0-20 MHz  A/D converter

 Power supply voltage 2.0-5.5V  3 independent timers/counters

 Power-Saving Sleep Mode

 Watch-dog timer

 Analogue comparator module

 Brown-out Reset (BOR)

 PWM output steering control

 40 pins

 Enhanced USART module

 8K Flash program memory (14-bit
words)
 Master Synchronous Serial Port
2.2 CLOCK CYCLE
 PIC uses oscillator to synchronize its internal operations.

 The pulses from oscillator are internally divided to four signals called
Q1, Q2, Q3, and Q4.

 A machine cycle (MC) is defined as four pulses from the main

oscillator.

Clock signals in PIC

microcontrollers. OSC1 is the main
oscillator from which the internal
signals Q1, Q2, Q3, and Q4 are
derived. These signals synchronize
fetching, decode, and execute of
instructions. TMC is the duration of a
machine cycle. It uses four OSC1
pulses.
2.2 CLOCK CYCLE (CONTINUED …..)
 3 phases in the execution of a program:
1) Fetch
The microcontroller reads the instruction in the program
memory and brings it to the CPU.

2) Decode
The CPU determines the operation to carry out as
described by the instruction.

3) Execution
The operation is executed during the execution phase.
2.2.1 CLOCK CYCLE (CONTINUED …..)
 Executing an instruction takes 2 machine cycles:

 The first cycle fetches the instruction from the program

memory.

 The second cycle decodes and executes the instruction.

 However, due to pipelining, the second machine cycle

overlaps with the first machine cycle from the next instruction.

 Therefore, it is possible to say that instructions are executed

in one machine cycle.
2.2.2 PIPELINING

 Used to overlap two or more instructions as they are

being executed

 introduces some parallelism

 reducing execution time

 PIC microcontroller executes instructions in a two-stage

pipeline
2.2.2 PIPELINING (CONTINUED …..)

Two-stage pipelining:

 Each instruction requires two stages.

o Fetching stage (1 machine cycle)

o Decoding and execution stage (1 machine cycle)

 The situation above assumes that the instruction execution

sequence is linear

 Therefore, normally it is possible to say that an instruction

takes one machine cycle to executed.
2.2.2 PIPELINING (CONTINUED …..)
 For jump instructions, the instruction sitting at the top of the
pipeline needs to be replaced by the far instruction.

 It is known as flushing

 It adds an extra machine cycle to the execution time.

Instruction I3, being a control

transfer instruction needs 2 MCs to
be executed.

The rest of the instructions are

executed in 1 MC.
2.2.3 PIC 16F877A PINS
 MCLR : MASTER CLEAR

 PORT A (A0 – A5)

 PORT B (B0 – B7)

 PORT C (C0 – C7)

 PORT D (D0 – D7)

 PORT E (E0 – E2)

 Oscillator or clock output

 VDD – “+” voltage supply

 VSS – ground
 2.3 OSCILLATORS
 The main oscillator in PIC microcontrollers:
i. crystal oscillator ii. RC oscillator iii. external clock

 Increasing the oscillator frequency shortens the length of

the machine cycles and therefore the time needed for
executing instructions, but also increases power
consumption
( frequency, power consumption
machine cycle , time )
2.3 OSCILLATORS (CONTINUED …..)

Standard modes for all devices

LP Low power for frequencies between 32 kHz and 200

kHz.
XT Crystal (XTAL) for frequencies between 100 kHz and 4
MHz.

HS High Speed for frequencies between 8 MHz and 20

MHz.
RC / EXTRC External Resistor-Capacitor / Clock.

Oscillator Operation Mode

2.4 MEMORY ORGANIZATION

 RAM
o can be read and written

o volatile memory

o static RAM – information kept as long as the memory is

powered
o dynamic RAM – it is refreshed periodically to keep the

information stored

 ROM
o can be read

o non-volatile memory
2.4 MEMORY ORGANIZATION
(CONTINUED …..)

 EEPROM
o non-volatile memory
o can be read and written electrically (seldom rewritten)
o per byte erase capabilities (slower)

 Flash
o specialized version of EEPROM
o block-wise erasable (faster)
2.4.1 PROGRAM MEMORY
 A memory that contains the program (which we had
written), after we've burned it

 Program memory is organized in pages

 Has 4 pages

 Each page has 2k words

 Total memory size is 8k words

 Length of each word is 14 bits

 13 bit program counter to support address for 8k words

(213)

 Address 0h is reserved for reset (main program

execution)

PIC 16F877A program memory

 Address 4h is reserved for the interrupt service routine
2.4.2 DATA MEMORY
 Data memory implemented using RAM
technology

 Has 4 banks

 Each bank has 128 memory cells /

registers

 The range of addresses for each bank is

from 00h to 7Fh

 General purpose registers make up the

data memory available to the user.

 Special function registers are used to

control the PIC and access its peripheral
modules

* it is possible to access most of the special function

PIC 16F877A data memory
2.4 MEMORY ORGANIZATION
 Each one of them has a different role. Program Memory and
Data Memory two memories that are needed to build a
program, and Data EEPROM is non-volatile and is particularly
useful for holding data variables that can be changed but are
likely to be needed for the medium to long term.
2.5 SPECIAL FUNCTION REGISTER (SFR)

 SFRs are registers located in the data memory with specific information or
control functions for the microcontroller or its peripherals can be read and
written

 Some of the common SFRs:

 STATUS
 PCLATH

 PCL

 OPTION

 INTCON

 PORTA

 PORTB

 TRISA

 TRISB

 TMR0
 2.5.1 THE STATUS REGISTER

 IRP: Selects memory bank in indirect addressing.

IRP = 0 (banks 0 &1).
IRP = 1 (banks 2 & 3)

 RP1, RP0: Select banks in direct memory addressing

00 = bank 0;
01 = bank 1;
10 = bank 2;
11 = bank 3.

 TO#: This bit indicates the state of the WDT.

TO = 0 (WDT overflow)
TO = 1 (clrwdt and sleep)

 PD#: Low-power Indication / power-down.

PD = 0 low power consumption mode (sleep)
 2.5.1 THE STATUS REGISTER
(CONTINUED …..)

 Z: Zero indicator.
Z = 1 (indicates arithmetic or logic operation was zero)
Z = 0 (otherwise)

 DC: Digit carry bit.

DC = 1 (there is a carryover between bits 3 and 4 in binary addition)
DC = 0 (otherwise)
*The state is reverse for a subtraction operation (borrowing)

 C: Carry bit.
C = 1 when there is carry over between bits 7 and 8 in binary addition.
C = 0 (otherwise)
*The state is reverse for a subtraction operation (borrowing)
 The register file can be accessed either directly, or indirectly, through the File Select
Register (FSR).
 To clear register located at 0x20 (Bank0)

bcf STATUS, IRP

movlw 0x20
movwf fsr
clrf indf

bcf STATUS, RP0 IRP = “0”,and FSR = “0x20” and

bcf STATUS, RP1 together they point to register
clrf 0x20 address 0x20.This is why this is
called Indirect mode. A special
register FSR is used to point to another
register address. Now in order to
clear 0x20 we’ll use CLRF 0x00 or
CLRF INDF. As soon as PIC “sees” 0x00
or INDF in the f field of any instruction
it goes to FSR+IRP and retrieve a 9 bit
address of a register
2.6 I/O PORTS
 PIC 16F877A has 5 ports:
i. PORT A
ii. PORT B
iii. PORT C
iv. PORT D
v. PORT E

 many I/O pins have two or three functions

 every port has its “satellite”, i.e. TRIS register

(if bit in TRIS: 0 = output ;
bit in TRIS: 1 = input)
2.6 I/O PORTS (CONTINUED …..)
Example:
Initialize PORT A0, A1, A2, A3, A4 and A5
all as output

clrf STATUS ; Select bank 0

clrf PORTA ; Set PORTA register to 0
bsf STATUS, RP0 ; Select bank 1
movlw 0x00 ; Value in TRISA to program
movwf TRISA ; RA<5:0> as outputs
bcf STATUS, RP0 ; Select bank 0
2.6 I/O PORTS (CONTINUED …..)

Exercise:
Initialize PORT B0, B1, B2, and B3 as output
while PORT B4, B5, B6, and B7 as input
2.7 PROGRAM STRUCTURE
2.7.1 Instruction set

 Each PIC16 instruction is a 14-bit word

 divided into an opcode (specifies instruction type) and
operands (specify the operation of the instruction)
 The PIC16 instruction set is comprised of:
i. Byte-oriented operations
ii. Bit-oriented operations
iii. Literal and control operations
2.7 PROGRAM STRUCTURE
(CONTINUED…..)

General format for instructions OPCODE field descriptions

2.7 PROGRAM STRUCTURE
(EXERCISE)

1. movf h’25’, w
to W (Working
register)

? ? ? ? ? ? ? ? ? ? ? ? ? ?

movf opcode from file h’25’

2.7 PROGRAM STRUCTURE
(EXERCISE)

2. bsf STATUS, RP0

RP0, bit 5 in
STATUS register

? ? ? ? ? ? ? ? ? ? ? ? ? ?

bsf opcode STATUS register

address h’03’
2.7 PROGRAM STRUCTURE
(EXERCISE)

3. movlw h’CF’
movlw opcode

? ? ? ? ? ? ? ? ? ? ? ? ? ?

literal ‘CF’
2.7 PROGRAM STRUCTURE
(CONTINUED …..)
2.7.2 Instruction description

 There are 35 instructions set found in PIC 16F877A microcontrollers:

QUESTIONS:
1. In a microcontroller there are 14 instruction/data buses and 13
address buses connected between Central Processing Unit
(CPU) and Memory.

a. What is the maximum value of the data can be process at a

time?

b. What type of bus will determine the memory size of

the microcontroller?

c. Calculate the memory size for this microcontroller?

d. If the address memory is organized in 4 pages, what is the

QUESTIONS:
2. The pairs of numbers shown below are added in a PIC16F877A program. What
is the result in each case and the value of the Status register bits Z , DC and C
after each addition?
(a) 0101 1101 added to 0001 0011;
(b) 1110 1001 added to 0001 0111;
(c) 0001 0101 added to 0100 1001

3. Assume that STATUS register has a value of 0x1F , what is the state of the status
bits after executing the following instructions
QUESTIONS:
4. How could you bring pin RA1 High, then pulse RA0 four
times and then RA1 is to go Low again? Your solution
should include the setting for TRISA.
5.Translate the PIC instruction 0x19C4 to assembly language.
THANK YOU