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Pipelining Hazards 3
Pipelining Hazards 3
By
Dr. Mausumi Maitra
Professor
Dept. of Information Technology
Govt. College of Engg. and Ceramic Technology
Control Hazard
A branch disrupts the normal flow of control.
Conditional Jump :
i IF ID EX MEM WB
i+1 IF ID EX MEM WB
i+2 IF ID EX MEM WB Continue if branch is
not taken
Discard if branch is
taken
i+3 idle idle idle IF ID AL ME If branch is
U M taken
All the instructions following the branch in the pipeline
becomes
• useless and will be drained from the pipeline
i.e. pipeline will be flushed loosing a number of useful
cycles.
I1 The no. of pipeline
I2(conditional branch cycles wasted
I3 to Ik) between a branch
taken and its branch
. target is called the
. delay slot – d.
.
Ik (Branch target) There will be delay of
Ik+1 3 cycles (3, 4, 5)
Effect of Branch Penalty on Pipeline
Performance
Let
Tav = Average no. of cycles per instruction
Pb = Probability of conditional branch instruction
Then
1.Condition is true – the target path is chosen, no. of cycles needed for
the execution is
(1 + d ) cycles ( d = branch penalty)
Thus, the average no. of cycles per branch instruction would be equal to
Pt X (1+d) + (1 – Pt) X 1
When Pb = Pt = 0, H = 1.
Soln.
No. of cycles per instruction = 1
Average delay cycles due to unconditional branches = 3 X 0.05 = 0.15
Average delay cycles due to conditional branches = 3 X 0.15 X 0.8
= 0.36
Therefore, total delay = 0.15 + 0.36 = 0.51 cycles
Therefore, Tav = 1 + 0.51 = 1.51 cycles.
Pipeline throughput (H) = 1 / Tav = 1/1.51 = 0.662
Pipeline operates at 66.2% of its maximum efficiency.
Therefore % loss of speed up due to branches = 33.8%
1.Hardware Method
Primary objective is to find out the branch address as
early as possible. A separate ALU is put in the ID step of the
pipeline to find out the effective jump address at the earliest.
2. Software Method
The compiler rearranges the statements of the assembly language
program in such a way that the statement following the branch
statement - called a delay slot – is always executed once without
affecting the correctness of the program.
Original Program Rearranged Program
. .
. .
ADD A,B ADD A,B
STO C STO C
ADD D,F ADD D,F
SUB B,C JMI X
JMI X SUB B,C
. .
X . X .
JMI X has been placed before ADD D,F, while JMI is decoded, ADD D,F
will be allowed to complete without changing the meaning of the
program.