Uploads by Ruqaiya Khanam

ISLPED05

Fault Modeling and Test Algorithm Creation Strategy for FinFET-based Memories

Analysis of Various Full-Adder Circuits in Cadence

SRAM

6Transistor SRAM Cell Designed Using 18nm FinFET Technology

Design_and_Stability_Analysis_of_CNTFET

Cnfet Based Basic Gates and a Novel Full

Aim_Design_a_Full_Substractor_using_NOR

Comparison of CMOS XOR and XNOR Gate Design

Energy Efficient Full Adder Cell Design

Aspects of Reversible and Quantum Computing in a p

aws-iot

Lecture Notes Wireless Communication

X1

X5

X2

X3

X4

106815

106813

106814

MCEN5011

10.1016@j.tifs.2020.06.008

CSCC-Cloud-Customer-Architecture-for-IoT

Cloud computing in IoT

ANDROID OS.pdf

Architecting for the Internet of Things.pdf

slides7.pdf