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Receiver basics
Channel selection why not at RF? BPF first or LNA first? Direct digitization of RF signal
Receiver architectures
Sub sampling Sub-sampling receiver noise problem Heterodyne receiver image problem Super-heterodyne receiver more image problem Image-reject receivers
Harley receiver Weaver architecture
Homodyne (direct conversion, zero-IF) DC offset zero IF) Digital IF Wide-IF double-conversion Sliding IF
Prof. C. Patrick Yue Slide 1
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Directly sample the carrier at RF to facilitate the use of high-speed DSP. For input power ranging from 100 dBm (3.2 Vpeak) to 10 dBm (100 mVpeak), the ADC will need the following performance:
A 1-GHz, 15-bit ADC is impossible to implement with reasonable power in the near future
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Sub-Sampling Receiver
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The noise floor is raised by a factor of 2m, where m is the sub-sampling factor Phase noise is increased by m2 at the output of the sub-sampler
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Heterodyne Receiver
The KEY question in receiver design is at what stage to perform at pe o channel select? Easier to achieve high-Q BPF at lower frequency, which favors lower IF but IF, but Image rejection becomes difficult Another questions is should the LO (LO) be above or below carrier (RF)?
Mixer output
Another important consideration in the choice of high-side LO versus p g low-side LO is in the image frequencies that will be picked up. The choice of high-side LO versus low-side LO might be made based on the relative quietness of the image band in each case.
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Trade-off between sensitivity (image rejection) and selectivity (channel selection) dictates the choice of IF
High-IF image reject filter easier to implement and provides better sensitivity Low-IF channel select filter easier to implement and gives better selectivity
Both image reject BPF and channel select select BPF are difficult to implement on chip, which makes heterodyne receiver less attractive for chip hich heterod ne recei er attracti e monolithic RF transceiver
Prof. C. Patrick Yue Slide 10
Half-IF Problem
2LO
A spurious tone at 0.5*IF (half way between RF and LO) undergoes even harmonic 0 5*IF distortion and generates a spur at (RF + LO) at the input of the mixer, which mixes with the 2nd harmonic of the LO to produce noise at (RF LO). To suppress the half-IF phenomenon
minimize second-order distortion in the RF path (using differential circuits) maintain 50% duty cycle in the LO to reduce 2LO
Prof. C. Patrick Yue Slide 11
Tunable high-Q bandpass filters are difficult and expensive to implement, so rather th t i th BPF center f th than tuning the t frequency, th LO is changed the i h d depending on the desired channel
For example, FM radios use 10.7 MHz as the fixed IF, to tune to the station at 101.3 MHz, 101 3 MHz the LO is adjusted to 112 0 MHz. 112.0 MHz
Prof. C. Patrick Yue Slide 12
Super-heterodyne Receiver
To relax the trade-off between sensitivity (image reject) and selectivity (channel select), we can introduce a second IF to the heterodyne receiver architecture, which results in a super-heterodyne receiver p y A super-heterodyne receiver is a heterodyne receiver with dual IFs A super-heterodyne receiver relaxes the bandpass filter Q at each stage by having more filter stages
Qoverall = 10 950 M 100 M 10 M 10 10 = 95 100 500 = 4.75e 6 100 M 10 M 200k
Prof. C. Patrick Yue Slide 13
The input spurious tone at IM2 (at input of 1st mixer) = RF + 2LO2 will p p ( p ) cause a secondary image tone at LO2 + IF2 at the input of the 2nd mixer. Example: given that RF = 950 MHz, LO1 = 1050 MHz, and LO2 = 110 MHz
IF1 = 100 MHz and IF2 = 10 MHz IM2 = IF2 + LO2 + LO1 = 10 + 110 + 1050 = 1170 MHz (= RF + 2LO2)
Prof. C. Patrick Yue Slide 14
The input spurious tone at 2LO1 2LO2 RF will also cause a secondary image tone at LO2 + IF2 at the input of the second mixer Notice that the difference between 2LO1 2LO2 RF and LO1 is the same as p p the spurious tone in the previous slide
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Using a variable LO1and fixed LO2 makes the task of channel selection extremely challenging Example: In GSM we need to zero down on to a frequency such as 935.20 MHz with increments of 0.2 MHz Fractional h F ti l change in LO1frequency is 0.2 MHz / 950 MHz ~ 0.02% i LO1f i 0 2 MH MH 0 02% Total change in LO1 is 25 Hz / 950MHz ~ 2.5%
Prof. C. Patrick Yue Slide 17
Using a fixed LO1 makes it easier to design LO1. Fixed frequency oscillators have the advantage that a lower phase noise can be obtained due to the lower PLL bandwidth that can be used Using a variable LO2 makes the task of channel selection much easier. Fractional change required in LO2 is 0.2 MHz / 100 MHz ~ 0 2% 02 0.2%. Total change required in LO2 is 25 MHz / 100 MHz ~ 25%
Requires wide tuning range VCO in the frequency synthesizer, need to the use of varactor in conjunction with switching capacitor arrays
Prof. C. Patrick Yue Slide 18
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I and Q path use LO th t are 90 out of phase, cosine vs. sine d th LOs that t f h i i
Prof. C. Patrick Yue Slide 21
90 degree shift is added to the Q path, such that the output due to the image path signal is 180 out of phase with respect to the image in the I path
Prof. C. Patrick Yue Slide 22
Question: Remember quadrature modulation using I&Q as two separate channels? How would it work in a image reject receiver architecture?
Prof. C. Patrick Yue Slide 23
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Quadrature Generators
Frequency dividers (covered in previous lecture) Polyphase filter
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With Qi and QBi absent, the polyphase filter reduces to the simple RC-CR The Th current configuration allows easy cascading of multiple stages t fi ti ll di f lti l t
Prof. C. Patrick Yue Slide 30
With Qi and QBi absent, the polyphase filter reduces to the simple RC-CR The Th current configuration allows easy cascading of multiple stages t fi ti ll di f lti l t
Prof. C. Patrick Yue Slide 31
Multi-stage broaden the bandwidth over which the amplitude of I and Q paths matches.
Prof. C. Patrick Yue Slide 32
Why 4A2?
5% of amplitude imbalance (~0 5 dB) and 1 of phase mismatch result in (~0.5 approximately 30 dB of IRR
Prof. C. Patrick Yue Slide 33
Amplitude imbalance and phase mismatch in the I and Q paths limits the IRR
Gain mismatch can usually be limited to < 0.5~1.0 dB and phase error is around 12 Mismatch in mixers and LPF also d Mi t hi i d LPFs l degrade IRR d
Typical image rejection ratio achievable on-chip is about 2530 dB using Hartley architecture
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Quadrature LO can be generated by passing the output of the frequency synthesizer through a polyphase filter
A 90 phase shift between I & Q signals is achieved by shifting the I-signal with 45 and the Q-signal with +45
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Practical Considerations
Image Rejection Requirement
An overall image suppression of 5570 dB is needed in most receiver (what determines the required image rejection?) With an appropriate choice of IF frequency (high enough), an image suppression of 30-40 dB can be achieved by the RF band select filter or the image reject filter (if necessary) Hartley s Hartleys architecture provides an additional 25 30 dB image rejection 2530 bringing the overall image rejection to 5570 dB Other mismatches in the I&Q paths limits the practical IRR to 25 to 30 dB
Mismatches between I&Q mixers, LPFs I&Q LO mismatches in amplitude and phase
Polyphase filter yp
Multi-stage improves I & Q matching over a wider bandwidth, but increases noise (thermal noise in the resistors) and power consumption (amplitude reduction) Practical implementation rarely uses more than 2 stages of RCCR
Prof. C. Patrick Yue Slide 39
Weaver Architecture
We have seen that a 90 phase shift is introduced between I & Q signals by mixing the incoming signal using cosine and sine LOs We need to achieve another 90 phase shift, such that the down-converted desired signal will remain in phase while the one due to the image spur will be become 180 out of phase. In Weaver architecture, the second down-conversion mixing is also performed with I&Q LOs to achieve another 90 phase shift between the I&Q paths
Prof. C. Patrick Yue Slide 40
Note that a negative sine is used as the LO for the Q path to provide the +90 phase shift because the incoming desired signal is a positive sine wave and the image tone is negative sine wave
Prof. C. Patrick Yue Slide 41
Weaver Receiver
What happens if the desired input signal is a sine wave? pp p g Weaver architecture is sensitive to relative phase of the RF input and the LOs To support quadrature modulation (incoming signals in cosine and sine), the second mixing requires quadrature mixing to preserve the desired signal
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Recall that there are two secondary image tones which can cause interference at IF2 the one above LO1 will appear as a negative sine wave at the input of the second mixer, so it will under go a total of 180 phase shift after the second down-conversion 180 down conversion the one below LO1 will appear as a positive sine wave (just like the desired signal) at the input of the second mixer, and it will become in-phase with its I-path counterpart BPF is used to remove this tone before the second mixer Prof. C. Patrick Yue
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Homodyne Receiver
LO frequency is the same as the incoming RF carrier frequency Also known as direction conversion or zero-IF receiver No more image problem to worry about But it will work only if the desired signal has symmetrical sidebands (known as double sideband modulation)
Prof. C. Patrick Yue Slide 44
Homodyne Receiver
If phase modulation is used, quadrature mixing converts the information in to the relative phase between I and Q signals. In the abo e e a p e, t e ca e is modulated us g Q S , hence t e above example, the carrier s odu ated using QPSK, e ce (t) is /4, 3/4, 5/4, or 7/4
Prof. C. Patrick Yue Slide 46
Disadvantages
DC offset (A BIG PROBLEM!!)
LO leakage Strong interferer Time-varying offset LO with non-50% duty cycle y y Even order distortion in LNA
1/f noise I&Q gain and phase mismatch More stringent dynamic range and reverse isolation
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DC Offset
DC offset can be as large as 10 mV due to various sources The desired signal can be much small, e.g. 0.5 mV In order for the ADC to be able to resolve the desired signal, the IF amplifier needs to provide sufficient gain so the desired signal reaches the full scale of the ADC, e.g. 500mV With a gain of 1000, the DC offset will clearly saturate the ADC
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LO signal can leak through the LO port to the RF port due to parasitic couplings and cause self mixing
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A strong interferer can leak through the RF port to the LO port due to parasitic couplings and cause self mixing
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LO signal can leak through the antenna, radiate into the air and reflect from the surrounding and reach the RF port of the mixer Good LNA reverse isolation can suppress this effect
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If the duty cycle of the LO is not 50%, the output of the mixer will have a DC offset ff t
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In homodyne receivers we also need to consider even order distortion characterized by IIP2 Consider two strong interferers closely spaced in frequency being received atthe antenna. Second order distortion results in a difference frequency to appear at t S d d di t ti lt i diff f t t the output of the LNA. The mixer exhibits a finite amount of direct feedthrough; hence the difference frequency signal would end up at the output of the mixer corrupting the desired signal. For homodyne applications, the LNA should be designed t h d i d to have hi h IIP2 i addition t hi h IIP3 high in dditi to high IIP3. Use differential circuit to reduce even order distortion
Prof. C. Patrick Yue Slide 53
Requires huge AC coupling capacitor (too big to fit on a chip) Very slow settling time, for example, a 200-Hz cut-off implies a settling time of 2 ms, which can too long for most system Only O l works with zero DC modulation which has no data below the cut-off k ith d l ti hi h h d t b l th t ff frequency of the HPF
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Some systems such as TDMA, inherently contain time intervals during which the receiver is idle, which could be used to perform offset cancellation The output DC voltage accumulated on the capacitor during the idle time could be measured and subtracted from the output voltage of the mixer resulting in cancellation of the DC offset If the offset cancellation is performed at a sufficient rate, the time-varying DC time varying offset can also be handled kT/C noise due to the switch must be considered An alternative is to have two sets of mixers so that, at any given moment, one is used while the other is having its offset cancelled sed hile ha ing
Prof. C. Patrick Yue Slide 55
1/f noise from the mixer presents a severe problem in the design of homodyne receivers since the 1/f noise spectrum falls in the same band as the down-converted output signal
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Gain mismatch can be compensated by the variable gain IF amplifiers in the I&Q paths
Prof. C. Patrick Yue Slide 57
Case 1: relaxes LPF noise requirements, demands higher linearity from IF amp Case 2: LPF needs to low noise figure IF amp linearity requirement is relaxed figure, Case 3: high linearity required in both IF amp and ADC, LPF performed in digital domain Which one will you choose?
Prof. C. Patrick Yue Slide 58
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Digital IF Receiver
Commonly used for multi-band, multi-mode cellular phone applications The second stage of mixing and filtering in a super heterodyne (dual IF) architecture is performed in the digital domain After the first i Aft th fi t mixer, th signal i digitized b th A/D the i l is di iti d by the The quantization and thermal noise of the A/D cannot exceed a few uV for a good receiver The li Th linearity of the A/D must be sufficiently high to suppress the it f th tb ffi i tl hi h t th intermodulation outputs from corrupting the desired signal Choice of the first IF is dictated by the speed of the A/D Typically, Typically first IF is around 75 MHz with the ADC running at 150 to 200 MS/s and 9 to 11 bit resolution
Prof. C. Patrick Yue Slide 60
But we still need image reject BPF filter before the first mixer, which means that we need to go off chip can we do better? off-chip,
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Both the first and second LO are generated by the same frequency synthesizer
Prof. C. Patrick Yue Slide 64
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Divid-by-4 in the divider chain produces I&Q LOIF with excellent q quadrature p p properties
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References
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Prof. M. Perrott, MIT http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-ComputerScience/6-776Spring-2005/CourseHome/index.htm Prof. L. Larson, UC San Diego ECE 265A and 265B lecture notes
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