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  • Orkom Mega

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    surya_satria
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    The document describes a simple computer system with 6 registers - AR, PC, DR, E, AC, and TR along with a 4096x16 memory unit and input/output ports. The computer uses a 16-bit common bus and executes instructions in 4 clock cycles - T0 loads the AR and PC, T1 loads the IR from memory and increments PC, T2 decodes the operation code, and T3 executes the instruction by loading registers from memory or performing I/O.

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    The document describes a simple computer system with 6 registers - AR, PC, DR, E, AC, and TR along with a 4096x16 memory unit and input/output ports. The computer uses a 16-bit common bus and executes instructions in 4 clock cycles - T0 loads the AR and PC, T1 loads the IR from memory and increments PC, T2 decodes the operation code, and T3 executes the instruction by loading registers from memory or performing I/O.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
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    2 views2 pages

    Orkom Mega

    Uploaded by

    surya_satria
    The document describes a simple computer system with 6 registers - AR, PC, DR, E, AC, and TR along with a 4096x16 memory unit and input/output ports. The computer uses a 16-bit common bus and executes instructions in 4 clock cycles - T0 loads the AR and PC, T1 loads the IR from memory and increments PC, T2 decodes the operation code, and T3 executes the instruction by loading registers from memory or performing I/O.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
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    of 2

    S2 S1 S0

    Bus

    Memory Unit 4096 x 16


    Address Write Read

    AR
    LD INR CLR

    PC
    LD INR CLR

    DR
    LD INR CLR

    Adder and Logic

    E AC
    LD INR CLR 4

    INPR

    IR
    LD

    TR
    LD INR CLR

    OUTR
    LD Clock

    16 bit common bus

    Start SC 0

    T0 AR PC

    T1 IR M[AR], PC PC + 1

    T2 Decode operation code in IR(12 14) AR IR(0 11), I IR(15)

    (Register or I/O)

    =1

    D7

    =0

    (Memory-reference)

    (I/O)

    =1

    =0

    (register)

    (indirect)

    =1

    =0

    (direct)

    T3 Execute input-output instruction SC 0

    T3 Execute register-reference instruction SC 0 AR

    T3 M[AR] Nothing

    T3

    Execute memory-reference instruction SC 0

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