VLSI BASED DESIGN AND IMPLEMENTATION OF ELEVATOR CONTROLLER AIM: The aim of the project is to design an Elevator/Lift Controller

using VHDL tool and implement the Elevator controller in programmable IC PAL/FPGA. THEORY: The Elevators/Lifts are used in multistorey buildings as a means of transport between various floors. Normally the lifts are controlled by Microprocessor based systems, which are costlier. It is proposed to design a low cost and compact dedicated controller using PAL/FPGA. The Elevator Controller is a device used to control a lift motion and to indicate the direction of motion, and the present floor level, etc. The device control the lift motion by means of accepting the floor level as input and generate control signals (for control the lift motion) as output. HARDWARE: The Hardware of the elevator controller consists of SPDT switch settings, PAL C22V10/FPGA as elevator controller, clock generator, buffer and LEDs.
PAL C22V10 (or) FPGA ELEVATOR CONTROLL -ER BUFFER

Output LEDs

INPUT & CONTROL SWITCHES

BUFFER

CLOCK GENERATOR

Figure: Block diagram of Elevator Controller SOFTWARE: The design and simulation of the Elevator controller can be performed using Active VHDL. Also the Timings of various signals can be verified. Then the system can be implemented in PAL C22V10 using WARP-R4 or can implemented in ALTERA FPGA using MAX plus II or in ATMEL FPGA using IDS 6.0. APPLICATIONS: Used for Automatic control of Elevators/Lifts in Apartments, Hospitals, Shopping Complex, Hotels, etc,.