Scribd Logo
Upload

Welcome to Scribd!

  • Read Me For RS232 Serial Module

    Uploaded by

    ronallldo3289
    7 views1 page
    This document provides instructions for testing an RS232 serial loopback module by downloading a bitfile to an FPGA board via JTAG, running a loopback test from a software application, and verifying the results by comparing input and output files. The test involves connecting JTAG and serial cables between a PC and the board, downloading a bitfile, selecting a COM port and input file in software, running the loopback test, and confirming a successful output file is generated matching the input.

    Original Description:

    read me, eagle files

    Original Title

    Read Me

    Copyright

    © Attribution Non-Commercial (BY-NC)

    Available Formats

    DOC, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    This document provides instructions for testing an RS232 serial loopback module by downloading a bitfile to an FPGA board via JTAG, running a loopback test from a software application, and verifying the results by comparing input and output files. The test involves connecting JTAG and serial cables between a PC and the board, downloading a bitfile, selecting a COM port and input file in software, running the loopback test, and confirming a successful output file is generated matching the input.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    7 views1 page

    Read Me For RS232 Serial Module

    Uploaded by

    ronallldo3289
    This document provides instructions for testing an RS232 serial loopback module by downloading a bitfile to an FPGA board via JTAG, running a loopback test from a software application, and verifying the results by comparing input and output files. The test involves connecting JTAG and serial cables between a PC and the board, downloading a bitfile, selecting a COM port and input file in software, running the loopback test, and confirming a successful output file is generated matching the input.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 1

    Read Me for RS232 Serial Module

    This is the test code for a RS232 Serial Loopback test. Follow the below mentioned steps for testing

    1. Power ON the Board and connect the JTAG cable via USB to the FPGA at one end and PC at the other. 2. Open IMPACT utility from Xilinx ISE Suit and detect the JTAG chain. 3. Connect the RS232 cable to Serial Connector at one end and PC at the other. 4. Download the UART_Main.bit file to the FPGA through JTAG. 5. Open the IM_Software.exe application (present in 3_Software Folder) 6. Select the COM port. 7. Click and browse for the input file and select an input file from the Input_Files folder. 8. Click on the Loopback button. 9. An output file naming serial_loopback_out.txt will be created on successful test. 10.Compare the input and output files for verification.

    You might also like