A

test1

Compal confidential

Schematics Document
Mobile Arrandale rPGA989 with
Intel PCH(Ibex Peak-M) core logic

2009-11-05
REV 1.0
4

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
A

2006/03/10

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

Compal Electronics, Inc.

Cover Sheet

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Rev
1.0

Thursday, November 12, 2009

Sheet
E

of

45

Compal confidential

Calpella Consumer 14" UMA

CK505

Fan conn

Mobile Arrandale

Page 6

32QFN

Clock Generator
ICS9LRS3197AKLFT MLF

P19

2C CPU + GMCH
Socket-rPGA989

DDR3 SO-DIMM X2

DDR3 1066 1.5V

LCD Conn.

page 21

BANK 0, 1, 2, 3

P17, 18

Page 6,7,8,9,10

UMA

Dual Channel

CRT

page 20

DMI X4

UMA

USB conn x1 P29

Left side (ESATA)

FDI X4

USB conn x2
Right side

P29

USB2.0 X12

HDMI Conn.

Level Shifter

page 22

BT Conn

Intel PCH

UMA

page 22

PCI-E BUS*4

USB Camera
(LVDS Conn)

Azalia

Ibex Peak-M
FCBGA 951

P29

P21

SATA Master-1

Finger print

P29

SATA Slave
Page 11,12,13,14,15,16

Mini-Card

P29

WWAN

RTL8401 (LAN
+Card reader)
P25

Mini-Card

Mini-Card

WLAN

TV-tuner
P24

SPI

Audio CKT

New Card
P24

Codec_IDT92HD80

Audio Jack

P27

LPC BUS

P24

P28

P30

SPI ROM 32M

AT25DF321-SU

RJ45 CONN
P25

MDC

ME code + System BIOS

4M Bytes

ENE
KB926
Version D2

P27

SATA HDD Connector

P23

P31

SATA ODD Connector

P23

RTC CKT.

LED

P11

Int.KBD

Touch Pad CONN.

P32

P31

P32

Dock

ESATA

P29

Multi Bay

P23

USB2.0*1

ACCELEROMETER
ST

P23

RJ45
SPDIF

EC code
256K Bytes

MIC*1

K/B backlight Conn

LPC Debug
Port P30

P30
SPI ROM 2M
MX25L2005CMI-12G

RGB

LINE-OUT*1

Capsense switch Conn

P32

P32

Compal Secret Data

Security Classification

DC/DC Interface CKT.

http://mycomp.su/x/
P33

2006/02/13

Issued Date

2006/03/10

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

P26
B

Title

Compal Electronics, Inc.

Block Diagram

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Rev
1.0

Thursday, November 12, 2009

Sheet
E

of

45

USB assignment:

Symbol Note :

Voltage Rails

O MEANS ON

X MEANS OFF

: means Digital Ground

: means Analog Ground

power
plane

@ : means just reserve , no build

+5VALW

+B

+1.5V

+5VS
+3VS

VL

+3VALW

+1.5VS
+0.75V

+1.05VS

Right side
Dock

USB-4

Camera

USB-5

MiniCard(WLAN)

USB-6

X (HM55 don't support)

X (HM55 don't support)

USB-8

MiniCard(WWAN)

BATT @ : means need be mounted when 45 level assy or rework stage.

USB-9

New Card

USB-10 X
USB-11 Finger Printer
USB-12 Bluetooth
USB-13 X

OPP@ : For POWER BUTTON (NO CAP SERSOR)

+1.5VS_CPU

USB-2
USB-3

45@ : means need be mounted when 45 level assy or rework stage.

PA@ : Only For PA (With Capacitor sensor)

+CPU_CORE

Left side(with ESATA)

Right side

USB-7

CONN@ : means ME part

+VCCP

State

USB-0
USB-1

PCIe assignment:

DEBUG@ : For DEBUG

PCIe-1 WWAN
S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery

don't exist

PCIe-2 WLAN
PCIe-3 RTL8401 Combo
PCIe-4 New card
PCIe-5 X
PCIe-6 X
PCIe-7 X (HM55 don't support)
PCIe-8 X (HM55 don't support)

SATA assignment:
SATA0 HDD
SATA1 ODD
SATA2 X (HM55 don't support)
SATA3 X (HM55 don't support)

SATA4 ESATA
SATA5 Multi Bay

SMBUS Control Table

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK
SML1DATA

SOURCE

XDP

KB926

WWAN

BATT

Thermal
Sensor

SODIMM

CLK GEN

WLAN

M93
Thermal Cap sensor
Sensor board

NEW
CARD

PCH I2C / SMBUS ADDRESSING

G sensor

+3VL

KB926

+3VALW

PCH

+3VS/+3VALW

PCH

PCH

VCCP

+3VS

+3VS

+3VS
@+3VALW

+3VS
@+3VALW

+3VL

+3VS

+3VS

DEVICE

HEX

ADDRESS

DDR SO-DIMM0

A0

10100000

DDR SO-DIMM1

A4

10100100

CLOCK GENERATOR (EXT.)

D2

11010010

G sensor

1D

00011101

EC I2C / SMBUS1 ADDRESSING

+3VALW

DEVICE

CONNECTED

HEX

ADDRESS

Smart Battery
Cap Sensor board

ZZZ

ZZZ

PCB: DA60000F400
PA@: DAZ0BI00600 (w/o SIM daoughter/B)
OPP@: DAZ0BI00400
DAZ0BI00100
PA@

http://mycomp.su/x/

OPP@

Compal Secret Data

Security Classification
2007/08/28

Issued Date

DAZ0BI00400

Deciphered Date

2006/03/10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.

Notes List

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Rev
1.0
Sheet

of

45

1A

0.3A

Dock con

+V_BATTERY

Dock con

INVPWR_B+

LVDS CON

80mA
1.3A

EC_ROM
DOCK_VIN

VL

20mA

+5VL

10mA

+3VL_EC

EC

8.3A

201mA

8287mA

+3VALW

50mA

275A
7.12A

169mA

B++

500mA

+3V_PEC

201mA
275mA

PCH
500mA

7.7A

+5VALW

6.1A

3A

850mA

+5VALW_LED

20mAx4

+1.8VS

100mA

LED

100mA

+3VS_LS

800Mhz 4G x2
650mA

+0.75V

0.5A

3.7 X 3=11.1V

+1.5VS_WLAN

0.5A

+1.5VS
650mA

+1.5VS_PEC

650mA

60mA

2.89A

VCCP_B+

25.24A

+VCCP

80mA

+1.05V_VCCP
7A

+1.05VS

7A

CODEC 92HD81
B

Mini card-WWAN

INT_MIC
500mA

CODEC PVDD

Mini card-WLAN
1.8A

18A

G-SENSOR

+AVDD_CODEC

ODD

New card
162mA

CODEC I/O
1mA

+3VS_ACL

DDR3

1300mA

18.24A

HDMI TRANS

MDC

1mA

60mA

1650mA

CPU

DDR3

+5VS

DDR3

+1.5V
650mA

BATT

600mA

+3VS_HDA
+1.5V_B+

PCH

850mA

CPU

8 A

13.3A

Mini card-WLAN
250mA

USB-L(ESATA)

20.67A
2.16A

Mini card-WWAN

1A

+3VS_WLAN

35mA

DC

1A

+3VS_WWAN

USBX2-R

0.1A

B+

LVDS CON

+3VS_CK505

1A

NEW CARD

1.5A

+LCDVDD

250mA

LAN

1A

PCH

1A

+USB_VCC

CODEC 92HD81

Finger printer

1.5A

+3VS
+3V_LAN

25mA

+3VS_DVDD

541mA

VIN

New card

INT_MIC

CIR

AC

BLUE TOOTH

1.3A

+3VS_PEC

SPI ROM(PCH)

25mA

7642mA

80mA

+3VAUX_BT

HDD

1300mA

PCH

Multi Bay

1A

CPU
+1.05VS_CK505

50mA/3.19V
120mA

PCH

1A

+CRT_VCC

CRT CONN
PC Camera

+USB_CAM
20mAx6

+5VS_LED

LED

5.49A

CPU_B+

+VCC_CORE

GFX_B+

+GFX_CORE

48A/1.05V

CPU
Compal Secret Data

Security Classification

http://mycomp.su/x/

1.72A

15A/1.05 V

Issued Date

CPU

2007/08/28

Deciphered Date

2006/03/10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Power delevry
Size
C
Date:

Compal Electronics, Inc.

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Thursday, November 12, 2009
1

Sheet

of

45

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/

Deciphered Date

2006/03/10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.

Notes List

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Rev
1.0
Sheet

of

45

Layout rule 10mil

width trace length <
0.5", spacing 20mil
AT24

COMP2

G16

COMP1

R7 1

2 49.9_0402_1% COMP0

AT26

COMP0

TP_SKTOCC#

T1

H_PECI_ISO
2
0_0402_5%

H_PROCHOT#

40 H_PROCHOT#

H_THERMTRIP#

14 H_THERMTRIP#

38

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

H_PM_SYNC_R
2
0_0402_5%

AL15

PM_SYNC

R21

2SYS_AGENT_PWROK
0_0402_5%

AN14

VCCPWRGOOD_1

R23

2 VCCPWRGOOD_0
0_0402_5%

AN27

VCCPWRGOOD_0

VDDPWRGOOD_R

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

T73

R20

1.5K_0402_1%
2

R1217
1
T74

PAD
14 BUF_PLT_RST#

PECI

H_CPURST#_R

PAD

R1216
2K_0402_1%
1
2

VCCP_POK

AT15

R26

H_PWRGD_XDP_R

PLT_RST#_R

1.5K_0402_1%

PEG_CLK
PEG_CLK#

E16
D16

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

A18
A17

SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_CPU_BCLK 14
CLK_CPU_BCLK# 14

CLK_EXP
CLK_EXP#

CLK_EXP 12
CLK_EXP# 12

2 51_0402_1%

XDP_TDO

2 51_0402_1%

R8 1

@ R9 1

2 51_0402_1%
D

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

AN15
AP15

PM_EXTTS#0
PM_EXTTS#1

JTAG MAPPING
XDP_TDI_R

R14

T63 PAD
2 0_0402_5%

PM_EXTTS#1_R 17,18

XDP_TDO_M

R30

2 0_0402_5%

XDP_TDI

@ R32

2 0_0402_5%

XDP_TDO

R34
0_0402_5%

+VCCP

PRDY#
PREQ#

AT28
AP27

TCK
TMS
TRST#

AN28
AP28
AT27

XDP_TCK
XDP_TMS
XDP_TRST#

TDI
TDO
TDI_M
TDO_M

AT29
AR27
AR29
AP29

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

DBR#

AN25

XDP_DBRESET#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

XDP_PREQ#
PM_EXTTS#0

R27

2 10K_0402_5%

PM_EXTTS#1

R29

2 10K_0402_5%

XDP_TDI_M

@ R37

+3VS

2 0_0402_5%
R603
XDP_DBRESET#

XDP_TDO_R

R38

2 0_0402_5%

XDP_TRST#

R39

2 51_0402_1%

2
1K_0402_5%

XDP_DBRESET#

13

PWM Fan Control circuit

+1.5V

1105_Add R597.
+5VS

R597
0_0603_5%
1
2

2 100_0402_1%

R41

2 24.9_0402_1%

SM_RCOMP2

R42

2 130_0402_1%

2
31

1
RLZ5.1B_LL34

FAN_PWM

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

SI3456BDV-T1-E3_TSOP6

1103_Add 0.1uF for DRAMRST#.

1.5VSCPU_DRAM_PWRGD

+1.5V

13 PM_DRAM_PWRGD

U57
Y

VCCP_POK

+3VALW

39
R1208
2

1.5VSCPU_DRAM_PWRGD

Layout Note:Please these

resistors near Processor

PM_DRAM_PWRGD

1.5K_0402_1%
1

@ R384
2

1.1K_0402_1%
1

R1209
1
2
0_0402_5%

VDDPWRGOOD_R

NC7SZ08P5X_NL_SC70-5

@ R383
3K_0402_1%

R1218
750_0402_1%
2

Compal Secret Data

Security Classification
Issued Date

2008/03/13

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

http://mycomp.su/x/

@ D49

R40

SM_RCOMP1

1 @ 1 @ 1 @
C1438 C1439 C1440

D Q97
C12
470P_0402_50V7K

DDR3 Compensation Signals

SM_RCOMP0

GND
GND
ACES_88231-02001
CONN@

14

1
2
5
6

PCH_DDR_RST

1
2

+FAN

BSS138_NL_SOT23-3

1
R15
100K_0402_5%

3
4

1 68_0402_5%

17,18

C295
0.1U_0402_16V4Z

DRAMRST#

JP2
1
2

2 68_0402_5%

H_PROCHOT#

2 49.9_0402_1%

C3
4.7U_0805_10V4Z

D48
RB751V_SOD323

R35

R12
1K_0402_1%

Q104
SM_DRAMRST#

H_CPURST#_R @ R36
R11

2 51_0402_1%

XDP_TCK

from DDR

+VCCP

Processor Pullups
H_CATERR#

@ R4 1

XDP_PREQ# @ R6 1

eDP

AL1
AM1
AN1

@ R1205 0_0402_5%
1
2

XDP_TMS

This shall place near CPU

SM_DRAMRST#

F6

2 51_0402_1%

IC,AUB_CFD_rPGA,R1P0
CONN@

R28
750_0402_1%
Design guide
1.11update,PLTRST series
resittor 1.5K, PL
resistor 750 ohm

RESET_OBS#

A16
B16
AR30
AT30

@ R2 1

14 H_CPUPWRGD

CATERR#

PWR MANAGEMENT

H_CPUPWRGD

SKTOCC#

AK14

THERMAL

R10

AH24

BCLK
BCLK#
BCLK_ITP
BCLK_ITP#

XDP_TDI

COMP2

2 49.9_0402_1% COMP1

XDP Connector

2 20_0402_1%

R5 1

CLOCKS

R3 1

DDR3
MISC

COMP3

JTAG & BPM

AT23

MISC

COMP3

H_CATERR#

13 H_PM_SYNC

+VCCP
2 20_0402_1%

H_PECI

JCPU1B

R1 1

PAD

14

Title

Compal Electronics, Inc.

Auburndale(1/5)-Thermal/XDP

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Rev
1.0
Sheet

of

45

Layout rule trace

length < 0.5"
JCPU1E
JCPU1A

13
13
13
13

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

B24
D23
B23
A22

13
13
13
13

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

D24
G24
F23
H23

13
13
13
13

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

D25
F24
E23
G23

13
13
13
13
13
13
13
13

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

E22
D21
D19
D18
G21
E19
F21
G18

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

13
13
13
13
13
13
13
13

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

D22
C21
D20
C18
G22
E20
F20
G19

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

13 FDI_FSYNC0
13 FDI_FSYNC1

F17
E17

FDI_FSYNC[0]
FDI_FSYNC[1]

13 FDI_INT

C17

FDI_INT

13 FDI_LSYNC0
13 FDI_LSYNC1

F18
D17

FDI_LSYNC[0]
FDI_LSYNC[1]

PCI EXPRESS -- GRAPHICS

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

B26
A26
B27
A25

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

EXP_RBIAS

R44
R45

1
1

2 49.9_0402_1%
2 750_0402_1%
+V_DDR_CPU_REF0
+V_DDR_CPU_REF1

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14

RSVD32
RSVD33

AJ13
AJ12

RSVD34
RSVD35

AH25
AK26

RSVD36
RSVD_NCTF_37
RSVD38
RSVD39

RSVD_NCTF_40
RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

B19
A19
@ R50
@ R51

1
1

2 0_0402_5%
2 0_0402_5%

A20
B20
U9
T9
AC9
AB9

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

C1
A3

J29
J28
A34
A33
C35
B35

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

RESERVED

A24
C23
B22
A21

Intel(R) FDI

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI

13
13
13
13

EXP_ICOMPI

AL26
AR2
D

AJ26
AJ27

AP1
AT2
AT3
AR1

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65

E15
F15
A2
D15
C15
AJ15
AH15

@ R48
@ R49

2 0_0402_5%
2 0_0402_5%

1
1

RSVD15
RSVD16
RSVD17
RSVD18
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD19
RSVD20
RSVD21
RSVD22

RSVD_NCTF_23
RSVD_NCTF_24

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

RSVD26
RSVD27
RSVD_NCTF_28
RSVD_NCTF_29
RSVD_NCTF_30
RSVD_NCTF_31

IC,AUB_CFD_rPGA,R1P0
CONN@

VSS

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

IC,AUB_CFD_rPGA,R1P0
CONN@

CRB 0.9 change to GND

CFG Straps for PROCESSOR

CFG0

@ R52

CFG4

2 3.01K_0402_1%

PCI-Express Configuration Select

1: Disabled; No Physical
Display Port

Not applicable for Clarksfield Processor

CFG4
CFG3

R54

2 3.01K_0402_1%

CFG3-PCI Express Static Lane Reversal

CFG3

1: Normal Operation
0: Lane Numbers Reversed
15 -> 0, 14 ->1, .....

http://mycomp.su/x/
5

2 3.01K_0402_1%

CFG4-Display Port Presence

1: Single PEG
0: Bifurcation enabled

CFG0

@ R53 1

attached to Embedded Display Port

0: Enabled; An external
Display Port
device is connected to the
Embedded Display Port

CFG7 @ R55

2 3.01K_0402_1%

Only temporary for early

CFD samples (rPGA/BGA)
Only for pre ES1 sample
4

PD 3.01K on CFG7 for PCIE Jitter

don't
staff

CFG7

WW33
WW41

Compal Secret Data

Security Classification
2008/03/13

Issued Date

2009/05/11

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Title

Compal Electronics, Inc.

Auburndale(2/5)-DMI/PEG/FDI

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Rev
1.0
Sheet

Thursday, November 12, 2009

1

of

45

JCPU1D
JCPU1C

A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

M_CLK_DDR0 17
M_CLK_DDR#0 17
DDR_CKE0_DIMMA 17

Y6
Y5
P6

M_CLK_DDR1 17
M_CLK_DDR#1 17
DDR_CKE1_DIMMA 17

SA_CS#[0]
SA_CS#[1]

AE2
AE8

DDR_CS0_DIMMA# 17
DDR_CS1_DIMMA# 17

SA_ODT[0]
SA_ODT[1]

AD8
AF9

M_ODT0 17
M_ODT1 17

17 DDR_A_BS0
17 DDR_A_BS1
17 DDR_A_BS2

AC3
AB2
U7

SA_BS[0]
SA_BS[1]
SA_BS[2]

17 DDR_A_CAS#
17 DDR_A_RAS#
17 DDR_A_WE#

AE1
AB3
AE9

SA_CAS#
SA_RAS#
SA_WE#

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

DDR SYSTEM MEMORY A

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

18 DDR_B_D[0..63]

AA6
AA7
P7

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

17 DDR_A_D[0..63]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

B9
D7
H7
M7
AG6
AM7
AN10
AN13

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DM[0..7]

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

17

C9
F8
J9
N9
AH7
AK9
AP11
AT13

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_DQS#[0..7]

17

C8
F9
H9
M9
AH8
AK10
AN11
AR13

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS[0..7]

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

DDR_A_MA[0..15] 17

17

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

18 DDR_B_BS0
18 DDR_B_BS1
18 DDR_B_BS2

AB1
W5
R7

18 DDR_B_CAS#
18 DDR_B_RAS#
18 DDR_B_WE#

AC5
Y7
AC6

W8
W9
M3

M_CLK_DDR2 18
M_CLK_DDR#2 18
DDR_CKE2_DIMMB 18

V7
V6
M2

M_CLK_DDR3 18
M_CLK_DDR#3 18
DDR_CKE3_DIMMB 18

SB_CS#[0]
SB_CS#[1]

AB8
AD6

DDR_CS2_DIMMB# 18
DDR_CS3_DIMMB# 18

SB_ODT[0]
SB_ODT[1]

AC7
AD1

M_ODT2 18
M_ODT3 18

D4
E1
H3
K1
AH1
AL2
AR4
AT8

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DM[0..7] 18

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

D5
F4
J4
L4
AH2
AL4
AR5
AR8

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_DQS#[0..7]

C5
E3
H4
M5
AG2
AL5
AP5
AR7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS[0..7]

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

DDR SYSTEM MEMORY - B

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#

18

18

DDR_B_MA[0..15] 18

IC,AUB_CFD_rPGA,R1P0
CONN@
IC,AUB_CFD_rPGA,R1P0
CONN@

Compal Secret Data

Security Classification
2008/03/13

Issued Date

http://mycomp.su/x/
5

2009/05/11

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

Cantiga(2/6)-DDR3 A/B CH

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Rev
1.0

Thursday, November 12, 2009

Sheet
1

of

45

H_PSI# 40
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PM_DPRSLPVR_R R58

H_VID[0..6]

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

0.6A

40

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19
1

L26
L27
M26

2 0_0402_5%

H_DPRSLPVR 40

+1.5VS_CPU

C60
1U_0603_10V4Z

C59
1U_0603_10V4Z

C58
1U_0603_10V4Z

C57
1U_0603_10V4Z

C330
47P_0402_50V8J

C329
47P_0402_50V8J

C328
47P_0402_50V8J

C327
47P_0402_50V8J

to power

IC,AUB_CFD_rPGA,R1P0
CONN@

+VCCP

+VCCP

+1.8VS

C83
4.7U_0603_6.3V6K

C66
22U_0805_6.3V6M

2
VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

+1.5VS_CPU
1

+VCCP
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25

C82
10U_0805_6.3V6M

2 0_0603_5%

C72
10U_0805_6.3V6M

PEG & DMI

POWER

C79
1U_0603_10V4Z

R57

to power

CPU VIDS

VTT0_59
VTT0_60
VTT0_61
VTT0_62

1.1V

+VTT_43

AN33
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

RF request.

1.8V

2 0_0603_5%

C76
22U_0805_6.3V6M

C75
10U_0805_6.3V6M

R56

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR

3A

GFXVR_IMON 41

1105_Chagne from 4.7K to 249 ohm.

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

+VCCP
+VTT_44

PSI#

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

41
41
41
41
41
41
41

1 10K_0402_5%
GFXVR_IMON
1 1K_0402_5%

C78
22U_0805_6.3V6M

VTT1_45
VTT1_46
VTT1_47

@
R1176

C81
2.2U_0603_6.3V4Z

+VTT_43
+VTT_44

J24
J23
H25

C70
22U_0805_6.3V6M

C69
22U_0805_6.3V6M

C74
10U_0805_6.3V6M

C73
22U_0805_6.3V6M

C68
10U_0805_6.3V6M

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

FDI

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

C67
10U_0805_6.3V6M

+VCCP

2
@ R128 2

C65
22U_0805_6.3V6M

+VCCP

GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6

R43 1
2 249_0402_1%
GFXVR_EN
GFXVR_EN 41
GFXVR_DPRSLPVR
GFXVR_DPRSLPVR 41

C56
1U_0603_10V4Z

AR25
AT25
AM24

C64
220U_D2_2VY_R15M

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

VCC_AXG_SENSE 41
VSS_AXG_SENSE 41
D

C71
10U_0805_6.3V6M

GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6

C77
22U_0805_6.3V6M

C63
22U_0805_6.3V6M

C62
10U_0805_6.3V6M

C61
10U_0805_6.3V6M

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

AM22
AP22
AN22
AP23
AM23
AP24
AN24

C80
1U_0603_10V4Z

VCC_AXG_SENSE
VSS_AXG_SENSE

- 1.5V RAILS

+VCCP

SENSE
LINES

C43
10U_0805_6.3V6M
2

AR22
AT22

VAXG_SENSE
VSSAXG_SENSE

DDR3

15A

GRAPHICS VIDs

2 @

C52
10U_0805_6.3V6M

C50
10U_0805_6.3V6M

C51
10U_0805_6.3V6M

C42
10U_0805_6.3V6M

C41
10U_0805_6.3V6M
C49
10U_0805_6.3V6M

C40
10U_0805_6.3V6M
C48
10U_0805_6.3V6M

2 @

C996
330U_D2_2VY_R7M

1.1V RAIL POWER

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

GRAPHICS

C994
22U_0805_6.3V6M

C990
10U_0805_6.3V6M

C993
22U_0805_6.3V6M

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

C991
22U_0805_6.3V6M

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

C989
10U_0805_6.3V6M

+VCCP

AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

CPU

to power
VTT_SELECT

G15

+1.5V to +1.5VS_CPU Transfer

VTT_SELECT 38

H_VTTVID1 = Low, 1.1V(Clarksfield)

PJ1 PAD-OPEN 3x3m

1
2

+1.5V
B+

H_VTTVID1 = High, 1.05V(Auburndale)

1021_Change R1182
from 470 ohm to 220 ohm.

+1.5VS_CPU

+1.5VS_CPU

2 0_0402_5%

2 0.1U_0402_10V6K

C334

2 0.1U_0402_10V6K

RUNON_1.5VS_CPU

VTT_SENSE 38

Q105A

Near Processor

33,39

SUSP

SUSP

Near Processor

1
2

R1182
220_0402_5%
2

C333

VCCSENSE 40
VSSSENSE 40

1
SI7326DN-T1-E3_PAK1212-8
4

VCCSENSE
VSSSENSE

Q105B
SUSP

R1184
1K_0402_5%

5
4

VSS_SENSE_VTT R203 1

0_0402_5%
0_0402_5%

330K_0402_5%

C1357
10U_0805_10V4Z

2
2

R1183

+1.5VS_CPU

C1356
0.1U_0402_16V4Z

1
1

2 0.1U_0402_10V6K

2N7002DW-7-F_SOT363-6

B15
A15

R59
R60

2 0.1U_0402_10V6K

VTT_SENSE
VSS_SENSE_VTT

AJ34 VCCSENSE_R
AJ35 VSSSENSE_R

C332

1
2
3

SENSE LINES

VCC_SENSE
VSS_SENSE

C331

2N7002DW-7-F_SOT363-6

+1.5V

IMVP_IMON 40
to power

C1355
10U_0805_10V4Z

AN35

ISENSE

U55

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

CPU CORE SUPPLY

RF request.

18A

JCPU1G

C995
330U_D2_2VY_R9M

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

+GFX_CORE
C988
22U_0805_6.3V6M

C987
22U_0805_6.3V6M

RF request.
48A

POWER

C313
47P_0402_50V8J

C312
47P_0402_50V8J

C311
47P_0402_50V8J

C310
47P_0402_50V8J

C309
47P_0402_50V8J

C308
47P_0402_50V8J

1
JCPU1F

+GFX_CORE
C307
47P_0402_50V8J

+VCC_CORE

C306
47P_0402_50V8J

+VCCP

C1358
0.1U_0402_16V4Z

2
+VCC_CORE

VCCSENSE

R61

2 100_0402_1%

VSSSENSE

R62

2 100_0402_1%

http://mycomp.su/x/

2008/03/13

Issued Date

2009/05/11

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

IC,AUB_CFD_rPGA,R1P0
CONN@
5

Compal Secret Data

Security Classification

Title

Compal Electronics, Inc.

Auburndale(4/5)-PWR

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Rev
1.0

Thursday, November 12, 2009

Sheet
1

of

45

IC,AUB_CFD_rPGA,R1P0
CONN@

1
+

1
+
2

1
+
2

1
+
2

C95
10U_0805_6.3V6M

C94
10U_0805_6.3V6M

C93
10U_0805_6.3V6M

Inside cavity
D

C107
22U_0805_6.3V6M

C106
22U_0805_6.3V6M

C104
10U_0805_6.3V6M

C105
10U_0805_6.3V6M

C92
10U_0805_6.3V6M

C91
10U_0805_6.3V6M
C103
10U_0805_6.3V6M

C90
10U_0805_6.3V6M
C102
10U_0805_6.3V6M

C89
10U_0805_6.3V6M
C101
10U_0805_6.3V6M

C88
22U_0805_6.3V6M

C87
22U_0805_6.3V6M

C85
22U_0805_6.3V6M

C86
22U_0805_6.3V6M
C98
10U_0805_6.3V6M

C100
22U_0805_6.3V6M

between
Inductor and
socket

C111
330U_D2_2VM_R9M

C110
330U_D2_2VM_R9M

C109
330U_D2_2VM_R9M

C108
330U_D2_2VM_R9M

C121
22U_0805_6.3V6M

C120
10U_0805_6.3V6M

C119
22U_0805_6.3V6M

C118
10U_0805_6.3V6M

C116
22U_0805_6.3V6M

C97
10U_0805_6.3V6M

C115
22U_0805_6.3V6M

C84
22U_0805_6.3V6M

C96
10U_0805_6.3V6M

VSS
C

AT35
AT1
AR34
B34
B2
B1
A35

VSS_NCTF1_R
VSS_NCTF2_R
VSS_NCTF3_R
VSS_NCTF4_R
VSS_NCTF5_R
VSS_NCTF6_R
VSS_NCTF7_R

C317
47P_0402_50V8J

+VCC_CORE
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

C316
47P_0402_50V8J

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

C114
22U_0805_6.3V6M

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

C982

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

C315
47P_0402_50V8J

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

47P_0402_50V8J

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

C314
47P_0402_50V8J

JCPU1I

NCTF

AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

CPU CORE

+VCC_CORE
JCPU1H

C99
22U_0805_6.3V6M

C117
10U_0805_6.3V6M

RF request.

IC,AUB_CFD_rPGA,R1P0
CONN@

Compal Secret Data

Security Classification
2008/03/13

Issued Date

http://mycomp.su/x/
5

2009/05/11

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

Auburndale(5/5)-GND/Bypass

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Rev
1.0

Thursday, November 12, 2009

Sheet
1

10

of

45

+RTCVCC

ICH_RTCX1

2 1M_0402_5%

R66

2 330K_0402_5% PCH_INTVRMEN

2 10K_0402_5%

SIRQ

@ R67

2 1K_0402_5%

SB_SPKR

LOW=Default
HIGH=No Reboot *

A30

HDA_BCLK

HDA_SYNC

D29

HDA_SYNC

SB_SPKR

P1

HDA_RST#

C30

HDA_RST#

27 HDA_SDIN0

HDA_SDIN0

G30

HDA_SDIN0

27 HDA_SDIN1

HDA_SDIN1

F30

HDA_SDIN1

27

SB_SPKR

1
R1163 1
R78

27 HDA_RST#_MDC
27,31 HDA_RST#_CODEC

2
2 33_0402_5%
33_0402_5%

HDA_BITCLK_CODEC

E32

HDA_SDIN2

2 22P_0402_50V8J

HDA_SDOUT_CODEC

F32

HDA_SDIN3

R81
R82

2 33_0402_5%
2 33_0402_5%

HDA_SDOUT

B29

HDA_SDO

2 100K_0402_5%

ME_EN#

H32

HDA_DOCK_EN# / GPIO33

T16

J30

HDA_DOCK_RST# / GPIO13

1
1

@ R670 1

PAD

AK7
AK6
AK11
AK9

SATA_TXN0_C
SATA_TXP0_C

C126
C127

1
1

2 0.01U_0402_50V7K
2 0.01U_0402_50V7K

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0
SATA_TXP0

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AH6
AH5
AH9
AH8

SATA_TXN1_C
SATA_TXP1_C

C130
C131

1
1

2 0.01U_0402_50V7K
2 0.01U_0402_50V7K

SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1
SATA_TXP1

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF11
AF9
AF7
AF6

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

AH3
AH1
AF3
AF1

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AD9
AD8
AD6
AD5

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AD3
AD1
AB3
AB1

SPKR

2 22P_0402_50V8J

27 HDA_SDOUT_MDC
27 HDA_SDOUT_CODEC

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

PCH_JTAG_TCK

M3

JTAG_TCK

PCH_JTAG_TMS

K3

JTAG_TMS

PCH_JTAG_TDI

K1

JTAG_TDI

PCH_JTAG_TDO

J2

JTAG_TDO

PCH_JTAG_RST#

J4

TRST#

SATAICOMPO

AF16

SATAICOMPI

AF15

SIRQ

31

SATA_RXN0_C 23
SATA_RXP0_C 23
SATA_TXN0 23
SATA_TXP0 23
SATA_RXN1_C 23
SATA_RXP1_C 23
SATA_TXN1 23
SATA_TXP1 23

SATA_TXN4_C
SATA_TXP4_C

SATA_TXN5_C
SATA_TXP5_C

R89

C128
C129

C296
C297

1
1

1
1

2 0.01U_0402_50V7K
2 0.01U_0402_50V7K

SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4
SATA_TXP4

2 0.01U_0402_50V7K
2 0.01U_0402_50V7K

SATA_RXN5_C
SATA_RXP5_C
SATA_TXN5
SATA_TXP5

2 37.4_0402_1%

SATA_RXN4_C 29
SATA_RXP4_C 29
SATA_TXN4 29
SATA_TXP4 29

+1.05VS

+3VALW

SPI_CLK_PCH

30

SPI_SB_CS#

R654 1

2 15_0402_5%

SPI_SB_CS#

SPI_SO_R

2 10K_0402_5%

30

30

SPI_SI

SPI_SI

R655 1

2 15_0402_5%

SPI_SO_R

SPI_SO_R

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

SATALED#

T3

AY1

SPI_MOSI

SATA0GP / GPIO21

Y9

SATA1GP / GPIO19

V1

AV1

R91

SPI_MISO

HDA_SYNC
This signal has a weak internal pull down.
H=>On Die PLL is supplied by 1.5V
L=>On Die PLL is supplied by 1.8V

R1221

100K_0402_5%

32

PCH_GPIO21
PCH_GPIO19

Reserve GPIO1921 PD for LPM enable power saving

Q106

PCH_JTAG_TDO

2N7002_SOT23-3

1
R90

PCH Pin

Disable iTPM=No Stuff

Enable iTPM=Stuff

+3VALW

@
R85
20K_0402_5%

R87
@ 20K_0402_5%

PCH_JTAG_TDI
@
R685
10K_0402_1%

PCH_JTAG_RST#
B

R88
@ 10K_0402_5%

PCH_JTAG_TCK
2
51_0402_5%

PCH JTAG Enable

PCH JTAG Disable

ES1

ES1

RefDes
ES2

ES2

@ BATT1

R86

No Install

200ohm

No Install No Install

R684

PCH_JTAG_TDO

HDA_DOCK_EN#

+RTCVCC

+3VL

H=>security measures defined in the Flash

Descriptor will be in effect (default)

BATT1.1

W=20mils

W=20mils

L=>Flash Descriptor Security will be overridden

1

SPI_MOSI

This signal has a weak internal pull down.

CR2032 RTC BATTERY

D3

100K_0402_5%

PCH_JTAG_TMS

R683
@ 100_0402_1%

This signal has a weak internal pull down.

This signal can't PU

ME debug mode , this signal has a weak internal PU

R1222

+3VALW

R84
@ 200_0402_5%

R684
@ 100_0402_1%

ME_EN#

2
G
3

R86
@ 200_0402_5%

+3VS

HDA_SDO

+3VS

ME_EN

2 10K_0402_1%

SATA_LED#

SI

BD82HM55 QMNT B3_FCBGA1071

31

+3VALW

SPI_CLK_PCH

30

Multi Bay

SPI_SB_CS#

E SATA

SATA_RXN5_C 23
SATA_RXP5_C 23
SATA_TXN5 23
SATA_TXP5 23

2 10K_0402_5%

SPI

R657

ODD

SATA2 SATA3 don't

support on HM55

+3VS

R656

HDD

HDA_BIT_CLK

SIRQ

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

2
2
2
2

AB9

24,31

PAD
PAD

1
1
1
1

SERIRQ

T13
T14

INTVRMEN

LPC_FRAME#
LDRQ0#
LDRQ1#

A14

A34
F34

PCH_INTVRMEN

C34

LDRQ0#
LDRQ1# / GPIO23

CLRP2
SHORT PADS

FWH4 / LFRAME#

INTRUDER#

A16

SRTCRST#

SM_INTRUDER#

24,31
24,31
24,31
24,31

RTCRST#

D17

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

R1161
R73
R1162
R75

HDA_BITCLK_MDC
HDA_BITCLK_CODEC
HDA_SYNC_MDC
HDA_SYNC_CODEC

C14

ICH_SRTCRST#

D33
B33
C32
A32

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

2 20K_0402_1%

RTCX1
RTCX2

ICH_RTCRST#

RTC

CLRP1
SHORT PADS

IHDA

R70

B13
D13

SATA

2 20K_0402_1%

ICH_RTCX1
ICH_RTCX2

JTAG

27
27
27
27

@ C54

R64

C124
1U_0603_10V4Z
R69

C125
1U_0603_10V4Z

U1A
1

+RTCVCC

@ C53

SM_INTRUDER#

R65

+3VS

INTVRMEN
H Integrated VRM enable
L Integrated VRM disable

C123
18P_0402_50V8J

4
OSC

OSC

NC

NC
2

C122
18P_0402_50V8J

1
D

Y1
32.768KHZ_12.5PF_Q13MC14610002

2 10M_0402_5% ICH_RTCX2

R63

1
3

JBATT1
R94 1

2 1K_0402_5%

W=20mils

DAN202U_SC70
C132
2.2U_0603_6.3V4Z

1
2
3
4

100ohm

No Install No Install

200ohm

200ohm

No Install No Install

R683

100ohm

100ohm

No Install No Install

R85

200ohm

200ohm

20Kohm

No Install

R685

100ohm

100ohm

10Kohm

No Install

R90

51ohm

51ohm

51ohm

R87

20Kohm

20Kohm

No Install No Install

R88

10Kohm

10Kohm

No Install No Install

PCH_JTAG_TDI

1
2
GND
GND

PCH_JTAG_TCK

ACES_85205-02001
CONN@

Place near IBEX-M

No Install

R84
PCH_JTAG_TMS

51ohm
A

PCH_JTAG_RST#

Disable iTPM=No Stuff

Enable iTPM=Stuff

+3VS

iTPM ENABLE/DISABLE
+3VS

PCH_GPIO21
PCH_GPIO19

@ R68

http://mycomp.su/x/

2 1K_0402_5%

R92

1 10K_0402_5%

R93

1 10K_0402_5%

Compal Secret Data

Security Classification
Issued Date

2008/03/13

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SPI_SI

Title

Compal Electronics, Inc.

IBEX-M(1/6)-HDA/JTAG/SATA

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Rev
1.0
Sheet

11

of

45

EC_LID_OUT#

R95

2 10K_0402_5%

SMBCLK

R96

2 2.2K_0402_5%

SMBDATA

R97

2 2.2K_0402_5%

SML0CLK

R98

2 2.2K_0402_5%

SML0DATA

R99

2 2.2K_0402_5%

SML0ALERT#

R100 1

2 10K_0402_5%

SML1ALERT#

R101 1

2 10K_0402_5%

SML1CLK

R103 1

2 2.2K_0402_5%

SML1DATA

R104 1

2 2.2K_0402_5%

+3VALW
+3VS
+3VS
+3VS
R105
2.2K_0402_5%
Q1A

SMBDATA

SMBCLK

New Card

PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4

C139 1
C140 1

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

PCIE_RXN3
PCIE_RXP3
GLAN_C_TXN
GLAN_C_TXP

AU30
AT30
AU32
AV32

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

PCIE_RXN4
PCIE_RXP4
PCIE_C_TXN4
PCIE_C_TXP4

BA32
BB32
BD32
BE32

PERN4
PERP4
PETN4
PETP4

BF33
BH33
BG32
BJ32

PERN5
PERP5
PETN5
PETP5

BA34
AW34
BC34
BD34

PERN6
PERP6
PETN6
PETP6

AT34
AU34
AU36
AV36

PERN7
PERP7
PETN7
PETP7

BG34
BJ34
BG36
BJ36

PERN8
PERP8
PETN8
PETP8

+3VS
+3VALW
+3VS
+3VALW

OK

OK

R677 1

10K_0402_5%

CLKREQ_LAN#

R405 1

10K_0402_5%

CLKREQ_WWAN#_R

R411 1

10K_0402_5%

CLKREQ_WLAN#

R415 1

WWAN

WLAN

10K_0402_5%

PCIE7 PCIE8 don't

support on HM55

CLKREQ_EXP#_R

24 CLK_PCIE_WWAN#
24 CLK_PCIE_WWAN

R107 1
R108 1

2 0_0402_5%
2 0_0402_5%

24 CLKREQ_WWAN#

R80

2 100_0402_5% CLKREQ_WWAN#_R

P9

24 CLK_PCIE_WLAN#
24 CLK_PCIE_WLAN

R109 1
R110 1

CLK_PCIE_WLAN#_R
CLK_PCIE_WLAN_R

AM43
AM45

2 0_0402_5%
2 0_0402_5%

CLK_PCIE_WWAN#_R
CLK_PCIE_WWAN_R

AK48
AK47

U4

24 CLKREQ_WLAN#

LAN+Card reader
OK
OK
New Card

R111 1
R112 1

25 CLK_PCIE_LAN#
25 CLK_PCIE_LAN

2 0_0402_5%
2 0_0402_5%

CLK_PCIE_LAN#_R
CLK_PCIE_LAN_R

AM47
AM48

CLKREQ_LAN#

25 CLKREQ_LAN#

N4

24 CLK_PCIE_EXP#
24 CLK_PCIE_EXP

R114 1
R115 1

2 0_0402_5%
2 0_0402_5%

24 CLKREQ_EXP#

R83

2 100_0402_5% CLKREQ_EXP#_R

CLK_PCIE_EXP#_R
CLK_PCIE_EXP_R

AH42
AH41
A8
AM51
AM53

+3VALW

R503 1

10K_0402_5%

PCIECLKREQ4#

PAD
PAD

T59
T60

M9
AJ50
AJ52

+3VALW

R757 1

2 10K_0402_5%

PCIECLKREQ5#

T61
T62

AK53
AK51

+3VALW

R606 1

2 10K_0402_5%

PEG_B_CLKRQ#

P13

PAD
PAD

H6

SMBCLK
SMBDATA

PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P

SMBDATA

SMBDATA 24

SML0ALERT#
SML0CLK

SML0DATA

G8

SML0DATA

SML1ALERT# / GPIO74

M14

SML1ALERT#

SMB_CLK_S3

17,18,19,23

31

WLAN

WWANNew card

PCH

SMBCLK

For Intel
LAN only

@ R501
2.2_0402_5%~D

SML1CLK / GPIO58

E10

SML1CLK

R215

0_0402_5%

SMB_EC_CK2

31

SML1DATA / GPIO75

G12

SML1DATA R231

0_0402_5%

SMB_EC_DA2

31

CL_CLK1

T13

CL_DATA1

T11

CL_RST1#

T9

H1

AN4
AN2

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

AT1
AT3

RF
request.
PEG_CLKREQ# R102 1

2 10K_0402_5%

CLK_EXP# 6
CLK_EXP 6
CLK_DP#
CLK_DP

T71
T72

OK

PAD
PAD

AW24
BA24

CLK_DMI# 19
CLK_DMI 19

CLKIN_BCLK_N
CLKIN_BCLK_P

AP3
AP1

CLK_BUF_BCLK# 19
CLK_BUF_BCLK 19

CLKIN_DOT_96N
CLKIN_DOT_96P

F18
E18

CLK_BUF_DOT96# 19
CLK_BUF_DOT96 19

OK

AH13
AH12

CLK_BUF_CKSSCD#
CLK_BUF_CKSSCD

OK

CLKIN_DMI_N
CLKIN_DMI_P

AD43
AD45

CLKOUT_DMI_N
CLKOUT_DMI_P

OK
OK
XTAL25_IN

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
REFCLK14IN

P41

CLKIN_PCILOOPBACK

J42

CLK_14M_PCH

XTAL25_OUT

R113 1

2 1M_0402_5%
B

19
19

Y2
1

OK

19

25MHZ_20P_1BG25000CK1A

PCIECLKRQ3# / GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P

XTAL25_IN
XTAL25_OUT

PCIECLKRQ4# / GPIO26

XCLK_RCOMP

CLKOUT_PCIE5N
CLKOUT_PCIE5P

PEG_B_CLKRQ# / GPIO56

C8
J14

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_PCIE3N
CLKOUT_PCIE3P

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

SMBCLK 24

DTS , read from EC

PCIECLKRQ2# / GPIO20

PCIECLKRQ5# / GPIO44

SMBCLK

C6

PEG_A_CLKRQ# / GPIO47

CLKOUT_PCIE0N
CLKOUT_PCIE0P

EC_LID_OUT#

H14

SML0CLK

SML0ALERT# / GPIO60

PERN3
PERP3
PETN3
PETP3

B9

EC_LID_OUT#

PERN2
PERP2
PETN2
PETP2

SODIMM Clock
gen G sensor

17,18,19,23

24
24
24
24

C137 1
C138 1

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

AW30
BA30
BC30
BD30

SMB_CLK_S3

SMB_DATA_S3

C326
12P_0402_50V8J

LAN+Cardreader

C135 1
C136 1

PCIE_RXN2
PCIE_RXP2
PCIE_C_TXN2
PCIE_C_TXP2

SMBALERT# / GPIO11

SMBus

PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

PERN1
PERP1
PETN1
PETP1

Link

25
25
25
25

BG30
BJ30
BF29
BH29

Controller

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

PEG

WLAN

24
24
24
24

C133 1
C134 1

PCI-E*

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

From CLK BUFFER

24
24
24
24

SMB_DATA_S3

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

Clock Flex

WWAN

6
Q1B

U1B
PCIE_RXN1
PCIE_RXP1
PCIE_C_TXN1
PCIE_C_TXP1

R106
2.2K_0402_5%

CLK_PCI_FB

AH51
AH53

XTAL25_IN
XTAL25_OUT

AF38

R116 1

CLKOUTFLEX0 / GPIO64

T45

CLKOUTFLEX1 / GPIO65

P43

CLKOUTFLEX2 / GPIO66

T42

CLKOUTFLEX3 / GPIO67

N50

OK

14

2
2 90.9_0402_1%

1
C141
18P_0402_50V8J

C142
18P_0402_50V8J

+1.05VS

1019_Stuff R113, Y2, C141 and change C142 from 0 ohm to 18pF.

BD82HM55 QMNT B3_FCBGA1071

Compal Secret Data

Security Classification
Issued Date

2008/03/13

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

http://mycomp.su/x/

Title

Compal Electronics, Inc.

IBEX-M(2/6)-PCI-E/SMBUS/CLK

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Rev
1.0
Sheet

12

of

45

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

BC24
BJ22
AW20
BJ20

7
7
7
7

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

BD24
BG22
BA20
BG20

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

7
7
7
7

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

BE22
BF21
BD20
BE18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

7
7
7
7

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

BD22
BH21
BC20
BD18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

R118 1

2 49.9_0402_1%

DMI_IRCOMP

DMI_ZCOMP

BF25

DMI_IRCOMP

4mil width and place

within 500mil of the PCH

FDI

BH25

DMI

+1.05VS

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

7
7
7
7
7
7
7
7

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

7
7
7
7
7
7
7
7

R890 2

21,31 LVDS_INV_PWM

1 0_0402_5% DPST_PWM

1
1 R771
R772
R7731
PAD

Close PCH and mini space 20mil

21 LVDS_ACLK21 LVDS_ACLK+

FDI_INT

BJ14

FDI_INT

BF13

FDI_FSYNC0

FDI_FSYNC1

BH13

FDI_FSYNC1

FDI_LSYNC0

BJ12

FDI_LSYNC0

FDI_LSYNC1

BG14

FDI_LSYNC1

7
7

21
21
21

2 0_0402_5%

PM_PWROK
R120 2

31

R121 1
@ R379 1

2 0_0402_5%
2 0_0402_5%

R122

K5

2 10K_0402_5% A10

R123 1

D9

SYS_PWROK

CLKRUN# / GPIO32

PWROK
MEPWROK
LAN_RST#
DRAMPWROK

2
100_0402_5%

C16

1 10K_0402_5%
1
2 SUS_PWR_ACK
+3VALW
R151 10K_0402_5%

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

R125 1

31 PWRBTN_OUT#
31

2 0_0402_5%
EC_ACIN

EC_ACIN

A6

BATLOW# / GPIO72

Y1

PM_CLKRUN#

SUS_STAT# / GPIO61

P8

PM_SUS_STAT#

SUSCLK / GPIO62

F3

SUS_CLK

ICH_PCIE_WAKE#

PM_RI#
D37
PM_PWROK 2

F14

RI#

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

AP48
AP47

LVDSB_CLK#
LVDSB_CLK

AY53
AT49
AU52
AT53

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AY51
AT48
AU50
AT51

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

AA52
AB53
AD53

CRT_BLUE
CRT_GREEN
CRT_RED

T17
T18

20
20
20

SLP_S5# / GPIO63

E4

SLP_S5# 31

SLP_S4#

H7

SLP_S4# 31

SLP_S3#

P12

SLP_M#

K8

TP23

N2

M_BLUE
M_GREEN
M_RED

M_BLUE
M_GREEN
M_RED

V51
V53

20 I_DDCCLK
20 I_DDCDATA

SLP_S3# 31

20
20

CRT_HSYNC
CRT_VSYNC

Can be left NC when IAMT is

not support on the platfrom

BJ10

PMSYNCH

F6

SLP_LAN# / GPIO29

CRT_HSYNC
CRT_VSYNC

1 R774
1
R775

2
2

0_0402_5%
HSYNC
VSYNC
0_0402_5%

CRB0.9 change to 0 ohm

H_PM_SYNC

If not using integrated

LAN,signal may be left as NC.

Y53
Y51
AD48
AB51

CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

BG44
BJ44
AU38

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

DDPC_CTRLCLK
DDPC_CTRLDATA

Y49
AB49

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

BE44
BD44
AV40

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

DDPD_CTRLCLK
DDPD_CTRLDATA

CRT_DDC_CLK
CRT_DDC_DATA

T51
T53

U50
U52

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

BC46
BD46
AT38

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

HDMID_CTRLCLK
HDMID_CTRLDATA

TMDS_B_HPD#

HDMID_CTRLCLK
22
HDMID_CTRLDATA 22

TMDS_B_HPD#

22

TMDSD_DATA0# 22
TMDSD_DATA0 22
TMDSD_DATA1# 22
TMDSD_DATA1 22
TMDSD_DATA2# 22
TMDSD_DATA2 22
TMDSD_CLK# 22
TMDSD_CLK 22

BD82HM55 QMNT B3_FCBGA1071

CRB0.9 change to 0 ohm

BD82HM55 QMNT B3_FCBGA1071

R_EC_RSMRST#

LVD_VREFH
LVD_VREFL

BB48
BA50
AY49
AV48

24,25

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK
SDVO_CTRLDATA

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LOW_BAT#

RSMRST#

ICH_PCIE_WAKE#

LVD_IBG
LVD_VBG

LVDSA_CLK#
LVDSA_CLK

LVDS_A0+
LVDS_A1+
LVDS_A2+

BJ48
BG48
BF45
BH45

L_CTRL_CLK
L_CTRL_DATA

BB47
BA52
AY48
AV47

LVDS_A0+
LVDS_A1+
LVDS_A2+

BJ46
BG46

SDVO_STALLN
SDVO_STALLP

Display Port D

PM_DRAM_PWRGD
R_EC_RSMRST#

6 PM_DRAM_PWRGD
31 EC_RSMRST#
R124 2

B17

10K_0402_5%

M_PWROK

M6

J12

L_DDC_CLK
L_DDC_DATA

AV53
AV51

2 0_0402_5%

WAKE#

SDVO_TVCLKINN
SDVO_TVCLKINP

LVDS_A0LVDS_A1LVDS_A2-

R126
1K_0402_0.5%

31

R365 1
@ R373 1

VGATE

SYS_RESET#

System Power Management

19,40

2 0_0402_5% SYS_RST# T6

L_BKLTCTL

Display Port C

R119 1

Y48

LVDS_ACLKLVDS_ACLK+

Checklist0.8 MEPWROK
can be connect to
PWROK if iAMT disable
6 XDP_DBRESET#

L_BKLTEN
L_VDD_EN

2
AB46
2 10K_0402_5% V48
10K_0402_5%
2 2.37K_0402_1% AP39
AP41
T69
AT43
AT42

LVDS_A0LVDS_A1LVDS_A221
21
21

T48
T47

LVDS_EDID_CLK AB48
LVDS_EDID_DATA Y45

21 LVDS_EDID_CLK
21 LVDS_EDID_DATA
+3VS

FDI_FSYNC0

U1D

ENBKL
I_ENAVDD

31 ENBKL
21 I_ENAVDD

Display Port B

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

100K_0402_5%

SDVO

7
7
7
7

ENBKL

Digital Display Interface

1
U1C

EDID_CLK and EDID_DATA single

end and keep 30 mil with other
LVDS signal avoid noise

R770

LVDS

CRT

RB751V_SOD323
31 SUS_PWR_ACK

+3VS

SUS_PWR_ACK

M_BLUE
M_GREEN

SYS_RST#

@ R133

2 10K_0402_5%

R129

2 8.2K_0402_5%

M_RED

PM_CLKRUN#

1
R776
1
R777
1
R778

2
150_0402_1%
2
150_0402_1%
2
150_0402_1%

Place the 3 resistors close to IBEX

+3VALW
LOW_BAT#

R134

2 8.2K_0402_5%

PM_RI#

R136

2 10K_0402_5%

ICH_PCIE_WAKE#

R137

2 10K_0402_5%

EC_ACIN

R138

1 8.2K_0402_5%

0_0402_5%

Check PM_SLP_LAN#
R1215
2
+RTCVCC

1021_Change R137 from 1K ohm to 10K ohm.

U58
36 +3_5V PWR_OK

+RTCVCC

@ R1213
1

IN+

GND

VCC+

OUT

R_EC_RSMRST#

INLMV331IDCKRG4_SC70-5
@

1K_0402_5%

@ R1214
2.2K_0402_5%

Compal Secret Data

Security Classification
Issued Date

http://mycomp.su/x/
5

2008/03/13

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

IBEX-M(3/6)-DMI/GPIO/LVDS

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Rev
1.0
Sheet

13

of

45

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

G38
H51
B37
A44

PIRQA#
PIRQB#
PIRQC#
PIRQD#

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#

F51
A46
B45
M53

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

8.2K_0804_8P4R_5%
RP5
PCI_REQ3#
PCI_PIRQF#
PCI_PERR#
PCI_LOCK#

1
2
3
4

8
7
6
5
8.2K_0804_8P4R_5%
+3VS
RP6

PCI_PIRQA#
PCI_PIRQD#
PCI_PIRQG#
PCI_PIRQC#

1
2
3
4

8
7
6
5
8.2K_0804_8P4R_5%
RP7

PCI_PIRQE#
PCI_STOP#
PCI_IRDY#
PCI_REQ2#

1
2
3
4

8
7
6
5
8.2K_0804_8P4R_5%

T70 PAD

23

R150
2
1
0_0402_5%

ACCEL_INT

ACCEL_INT

31

PCI_GNT0#
PCI_GNT1#
PCI_GNT2#
PCI_GNT3#

F48
K45
F36
H53

GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

B41
K53
A36
A48

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

K6

PCI_RST#

31

PCI_SERR#
PCI_PERR#

PCI_SERR#

E44
E50

NV_ALE
NV_CLE

BD3
AY6

PCIRST#
SERR#
PERR#

Default-Internal pull up

Low=Configures DMI for ESI

compatible operation(for
servers only.Not for
mobile/desktops)

PCI_DEVSEL#
PCI_FRAME#

A42
H44
F46
C46

IRDY#
PAR
DEVSEL#
FRAME#

PCI_LOCK#

D49

PLOCK#

PCI_STOP#
PCI_TRDY#

D41
C48

STOP#
TRDY#

M7

PME#

D5

PLTRST#

31 PCI_PME#
PLT_RST#

24,25 PLT_RST#
B

R_CLK_PCI_FB
R_CLK_PCI_EC
R_CLK_DEBUG_PORT_1

N52
P53
P46
P51
P48

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

H Intel ME Crypto Transport

Layer Security(TLS) chiper suite
with confidentiality

C38

TACH1 / GPIO1

PCH_GPIO6

D37

TACH2 / GPIO6

EC_SCI#

EC_SCI#

J32

TACH3 / GPIO7

31

EC_SMI#

EC_SMI#

F10

GPIO8

24

2 10K_0402_5%

T19
T20

PAD
PAD

AF48
AF47

T21
T22

PAD
PAD

K9

LAN_PHY_PWR_CTRL / GPIO12

A20GATE

PCH_GPIO15

T7

GPIO15

PCH_GPIO16

AA2

PCH_GPIO17

F38

Internal VccVRM Option

R145 1

AH45
AH46

PCH_GPIO12

XMIT_OFF

XMIT_OFF

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

CR_WAKE#

NV_ALE
NV_CLE
+3VS

BMBUSY# / GPIO0

31

it have weak internal PU 20K

Check list Rev0.8 section1.23.2 If not

implemented, the Braidwood interface
signals can be left as No Connect (NC).

Y3

PCH_GPIO1

Y7

TACH0 / GPIO17
SCLOCK / GPIO22
GPIO24

AB12

GPIO27

PCH_GPIO28

V13

GPIO28

H_STP_PCI#

M11

STP_PCI# / GPIO34

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AM3

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

AM1

PECI
RCIN#
PROCPWRGD
THRMTRIP#

T1

V6

SATA2GP / GPIO36

TP1

BA22

NV_WR#0_RE#
NV_WR#1_RE#

AY8
AY5

AB13

SATA3GP / GPIO37

TP2

AW22

NV_WE#_CK0
NV_WE#_CK1

AV11
BF5

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

B25

USBRBIAS

D25

H
L

On-Die voltage regulator enable

On-Die
PLL Voltage Regulator disable

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USBRBIAS#

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5

ESATA

USB20_N8
USB20_P8
USB20_N9
USB20_P9

USB20_N11
USB20_P11
USB20_N12
USB20_P12

USB20_N11
USB20_P11
USB20_N12
USB20_P12

R155 1

24
24
24
24
29
29
29
29

SATACLKREQ# / GPIO35

SLOAD / GPIO38

TP3

P3

SDATAOUT0 / GPIO39

TP4

AY45

H3

PCIECLKRQ6# / GPIO45

TP5

AY46

PCH_DDR_RST

F1

EC_SCI#

R166 1

2 10K_0402_5%

+3VS

PCIECLKRQ7# / GPIO46

TP6

AB6

SDATAOUT1 / GPIO48

TP7

AV45

PCH_GPIO1

R167 1

2 10K_0402_5%

MB USB

PCH_TEMP_ALERT#

AA4

SATA5GP / GPIO49

TP8

AF13

KB_RST#

R171 1

2 10K_0402_5%

GPIO57

TP9

M18

PCH_GPIO36

R172 1

2 10K_0402_5%

TP10

N18

PCH_GPIO6

R173 1

2 10K_0402_5%

TP11

AJ24

VGA_PRSNT_L#

R175 1

2 10K_0402_5%

TP12

AK41

PCH_GPIO16

R176 1

2 10K_0402_5%

TP13

AK42

WWAN_DETECT#

R178 1

2 10K_0402_5%

TP14

M32

GATEA20

R180 1

2 10K_0402_5%

TP15

N32

PCH_TEMP_ALERT# R181 1

2 10K_0402_5%

TP16

M30

HDDHALT_LED#

R169 1

2 10K_0402_5%

TP17

N30

PCHGPIO48

R170 1

2 10K_0402_5%

TP18

H12

CR_WAKE#

R168 1

2 10K_0402_5%

TP19

AA23

PCH_GPIO17

R874 1

2 10K_0402_5%

NC_1

AB45

NC_2

AB38

NC_3

AB42

INIT3_3V

NC_4

AB41
T39

This signal has weak internal

PU, can't pull low

NC_5

31 PCH_TEMP_ALERT#

PCH_GPIO57

Dock
USB Camera

EHCI 1

WWAN
New Card
EHCI2

Finger printer

USB20_N4
USB20_P4

BT

@
C304
47P_0402_50V8J

BT_OFF

F8

29

WXMIT_OFF#

24

EXP_CPPE#

1 @
C305

RF
request.

47P_0402_50V8J

Close PCH

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

INIT3_3V#

EXP_CPPE# 24

TP24

P6

12
31

CLK_PCI_FB
CLK_PCI_EC

24 CLK_DEBUG_PORT_1

R158 1
R160 1

2 22_0402_5%
2 22_0402_5%

R162 1

2 22_0402_5%

PCI_GNT0#

@ R163 1

2 1K_0402_5%

PCI_GNT1#

@ R164 1

2 1K_0402_5%

R_CLK_DEBUG_PORT_1

PAD

C10
+3VALW

Boot BIOS Strap

+3VALW

PCI_GNT0# PCI_GNT1# Boot BIOS

Location
0
LPC
0

RP8
USB_OC#0
WXMIT_OFF#
BT_OFF
USB_OC#2

4
3
2
1

5
6
7
8

10K_1206_8P4R_5%
RP9
USB_OC#6
USB_OC#5
USB_OC#4
EXP_CPPE#

4
3
2
1

Reserved(NAND)

PCI

SPI

5
6
7
8

R179 1

NV_ALE

@ R174 1

2 1K_0402_5%

DMI Termination Voltage

Set to Vcc when HIGH
NV_CLE
Set to Vss when LOW

NV_CLE

+3VS

*
+1.8VS

Weak internal
PU,Do not pull low

2 0_0402_5%

10K_1206_8P4R_5%

Intel Anti-Theft Techonlogy

High=Endabled
NV_ALE
Low=Disable(floating)

@ R184 1

T48

BD82HM55 QMNT B3_FCBGA1071

BD82HM55 QMNT B3_FCBGA1071
R_CLK_PCI_FB
R_CLK_PCI_EC

+VCCP

PCHGPIO48

2 22.6_0402_1%

USB_OC#0
BT_OFF
USB_OC#2
WXMIT_OFF#
USB_OC#4
USB_OC#5
USB_OC#6

H_THERMTRIP#

MB

6 PCH_DDR_RST

2 54.9_0402_1%

AV43

Within 500
mils

N16
J16
F16
L16
E14
G16
F12
T15

H_CPUPWRGD
1
R146

PCIECLKREQ6#

WLAN
USB port5, port6 don't
support on HM55

USB20_N8
USB20_P8
USB20_N9
USB20_P9

USBRBIAS

29
29
29
29
29
29
26
26
21
21
24
24

H_PECI

BB22

HDDHALT_LED#

32 HDDHALT_LED#

6
2 0_0402_5%

R147
56_0402_5%

AB7

V3

KB_RST# 31

BE10

PCH_GPIO36

WWAN_DETECT#

R144

BD10 H_THERMTRIP#_L

PCH_GPIO35

24 WWAN_DETECT#

CLK_CPU_BCLK

KB_RST#

AV7

VGA_PRSNT_L#

CLK_CPU_BCLK#

PCH_PECI_R

AU2

GPIO27

GATEA20 31

BG10

NV_RB#

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

GATEA20

SATA4GP / GPIO16

H10

U2

NV_RCOMP

GNT2
PCI_IRDY#

GPIO15
L Intel ME Crypto Transport
Layer Security(TLS) chiper suite
with no confidentiality

PCH_GPIO0

8
7
6
5

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

2 1K_0402_1%

1
2
3
4

AV9
BG8

R140 1

+3VS

MISC

PCI_REQ1#
PCI_FRAME#
PCI_TRDY#
PCI_PIRQH#

NV_DQS0
NV_DQS1
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

This signal has a weak internal

pull up ,can't Pull low

CPU

C/BE0#
C/BE1#
C/BE2#
C/BE3#

RP4

AY9
BD1
AP15
BD8

NCTF

J50
G42
H47
G34

8.2K_0804_8P4R_5%

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

RSVD

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

NVRAM

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

8
7
6
5

USB

1
2
3
4

U1F

GPIO8

PCI

PCI_DEVSEL#
PCI_SERR#
PCI_REQ0#
PCI_PIRQB#

U1E

+3VS

GPIO

RP3

NV_ALE
Enable Intel Anti-Theft
Technology 8.2K PU to +3VS

Disable Intel Anti-Theft

Technologyfloating(internal PD)

EC_SMI#

R157 1

2 10K_0402_5%

PCH_GPIO15

R159 1

2 1K_0402_5%

PCH_GPIO12

R811 1

2 10K_0402_5%

PCIECLKREQ6#

R812 1

2 10K_0402_5%

PCH_DDR_RST

R813 1

2 10K_0402_5%

PCH_GPIO28

R814 1

2 10K_0402_5%

PCH_GPIO57

R182 1

2 10K_0402_5%

PCH_GPIO35

R165 2

1 10K_0402_5%

NV_CLE
DMI termination voltage.
weak internal PU, don't PD

+3VS

2 1K_0402_5%
A

@ R183 1

2 1K_0402_5%

@U2
@
U2

IN1

IN2

PCI_GNT3#

http://mycomp.su/x/

@
R185
100K_0402_5%

PLT_RST#

Compal Secret Data

Security Classification

SN74AHC1G08DCKR_SC70-5

Low=A16 swap
override/Top-Block
PCI_GNT3# Swap Override enabled
High=Default *

6 BUF_PLT_RST#

Issued Date

A16 swap overide Strap/Top-Block

Swap Override jumper

2008/03/13

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

IBEX-M(4/6)-PCI/USB/RSVD

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Rev
1.0
Sheet

14

of

45

+VCCP_VCCA_CLK

+VCCSST

2
0.1U_0402_16V4Z

VCCIO[21]
VCCIO[22]
VCCIO[23]

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

VCCIO[4]

V12

DCPSST

J38

+3VS

VCC3_3[9]

L38

0.357A

VCC3_3[10]

M36

VCC3_3[11]

N36

VCC3_3[12]

P36

VCC3_3[13]

U35

VCC3_3[14]

AD13

3.208A

VCCSATAPLL[1]
VCCSATAPLL[2]

+V1.1A_INT_VCCSUS
2
0.1U_0402_16V4Z

2 0.1U_0402_16V4Z

C179

VCCIO[9]

AH22
2

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22
+3VS

0.4A@3.3V

2
0.1U_0402_16V4Z

C185
+VCCP

V16

VCC3_3[6]

Y16

VCC3_3[7]

V_CPU_IO[1]
V_CPU_IO[2]

A12

VCCRTC

2mA

CPU

AT18
AU18

6mA

AT20

VCCIO[10]

AH19

VCCIO[11]

AD20

VCCIO[12]

AF22

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

AD19
AF20
AF19
AH20

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

AB19
AB20
AB22
AD22

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

AA34
Y34
Y35
AA35

VCCSUSHDA

L30

AN30
AN31

@ R189
2
0_0603_5%

+1.05VS

+1.8VS

VCCIO[54]
VCCIO[55]
VCC3_3[1]

AT22

VCCVRM[1]

0.035A

BJ18

VCCFDIPLL

6mA

AM23

VCCIO[1]

AT16

VCCDMI[2]

AU16

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

AM8
AM9
AP11
AP9

LVDS

0.085A

2 0_0402_5%

+1.8VS

2 0_0402_5%

+3VS

@ R190
1
2
0_0603_5%

+1.05VS

+1.05VS_VCCFDIPLL

2
+1.05VS

+1.05VS_L
R191
1
2
0_0603_5%

+V1.05S_VCCA_A_DPL_L
R192
L6
1
2
1
2
0_0603_5%
10UH_LB2012T100MR_20%_0805
@

+1.05VS

1
+PCH_VCC1_1_20
+PCH_VCC1_1_21
+PCH_VCC1_1_22
+PCH_VCC1_1_23

R194
R195
R198
R200

1
1
1
1

+3.3A_1.5A_VCCPAZSUS

2
2
2
2

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

+V1.05S_VCCA_B_DPL_L
R201
L7
1
2
1
2
0_0603_5%
10UH_LB2012T100MR_20%_0805

+
2

+5VALW +3VALW

@
2

+3VS

R197

D5
RB751V_SOD323

100_0402_5%

ICH_V5REF_RUN

+
2

20 mils
1

20 mils
1

C194
1U_0402_6.3V6K

Compal Secret Data

2008/03/13

+5VS

ICH_V5REF_SUS
1

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

D4
RB751V_SOD323

R196
100_0402_5%

+V1.05S_VCCA_B_DPL

+3VALW
1

Close PCH

+V1.05S_VCCA_A_DPL
1
2

Issued Date

http://mycomp.su/x/

R671
@ R672

+3VS

+1.05VS

C148
10U_0805_6.3V6M

+VCCP

BD82HM55 QMNT B3_FCBGA1071

Security Classification

C147
0.01U_0402_25V7K

VCC CORE

C146
10U_0603_6.3V6M

C145
1U_0402_6.3V6K

+1.05VS_VCCFDIPLL

AT24

VCCDMI[1]

0.061A

0.156A

AN35

2 @

BD82HM55 QMNT B3_FCBGA1071

C197
0.1U_0402_16V4Z

C196
0.1U_0402_16V4Z

2mA@3.3V
A

VCC3_3[5]

HDA

C190
0.1U_0402_16V4Z

C189
0.1U_0402_16V4Z

2
+RTCVCC

V15

0.1A@1.1V

C188
4.7U_0603_6.3V6K

VCCSUS3_3[32]

VCCVRM[4]

C184
1U_0402_6.3V6K

VCCSUS3_3[29]

SATA

P18

PCI/GPIO/LPC

2
0.1U_0402_16V4Z

C182

DCPSUS

+1.05VS
1

+3VALW

0.2A@3.3V

Y22

C682 1
2 0.1U_0402_16V4Z
+1.8VS

0.1A@1.1V

AK3
AK1

RTC

+3VS
C176 1

C177

VCCVRM[2]

+3VS

+1.05VS_VCCAPLL

0.032A

C183
10U_0805_6.3V6M

AH23
AJ35
AH35

VCC3_3[8]

C175
1U_0402_6.3V6K

ICH_V5REF_RUN

+3VS

C174
1U_0402_6.3V6K

C173
1U_0402_6.3V6K

0.073A
VCCADPLLB[1]
VCCADPLLB[2]

K49

VCC3_3[4]

AD35

BD51
BD53

0.072A

V5REF

>1mA

AB35

+1.8VS

VCCADPLLA[1]
VCCADPLLA[2]

VCC3_3[3]

BB51
BB53

AB34

2 0_0603_5%

VCCVRM[3]

+V1.05S_VCCA_B_DPL
+1.05VS

0.035A

AU24

ICH_V5REF_SUS

VCC3_3[2]

R779 1

C167
1U_0402_6.3V6K

+V1.05S_VCCA_A_DPL

DCPRTC

F24

C172
0.1U_0402_16V4Z

+1.8VS

V9

+1.05VS

V5REF_SUS

>1mA

C178
0.1U_0402_16V4Z

+VCCRTCEXT
2
0.1U_0402_16V4Z

V23

AP43
AP45
AT46
AT45

C166 1

U23

VCCIO[56]

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

VCCSUS3_3[28]

AH39

HVCMOS

VCCME[12]

+1.8VS

DMI

VCCME[11]

Y42

+1.05VS

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

VSSA_LVDS

PCI E*

Y41

AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

VCCALVDS

AH38

NAND / SPI

VCCME[10]

FDI

VCCME[9]

Y39

VCCAPLLEXP0.042A

AF51

0.030A

C186
220U_B_2.5VM_R15M

V42

VCCIO[24]

BJ24

VSSA_DAC[2]

C191
220U_B_2.5VM_R15M

VCCME[8]

AK24

C187
1U_0402_6.3V6K

VCCME[7]

V41

C159
10U_0805_6.3V6M

V39

C165
1U_0402_6.3V6K

1.998A

0_0603_5%

C170
10U_0603_6.3V6M

VCCME[6]

C164
1U_0402_6.3V6K

AF42

+1.05VS_APLL
@ R188
1

C169
1U_0402_6.3V6K

VCCME[5]

C168
1U_0402_6.3V6K

AF41

C158
0.1U_0402_16V4Z

VCCME[4]

C181
10U_0805_6.3V6M

VCCME[3]

AF43

C193
1U_0402_6.3V6K

AD41

C157
0.1U_0402_16V4Z

VCCME[2]

AF53

0.059A

C180
1U_0402_6.3V6K

C153
1U_0402_6.3V6K
C161
1U_0402_6.3V6K

C163
10U_0805_6.3V6M

C162
10U_0805_6.3V6M

AD39

AE52

VSSA_DAC[1]

+3VS

+1.05VS
+3VALW

AE50

VCCADAC[2]

C1000

VCCME[1]

VCCADAC[1]

0.069A

10U_0805_6.3V6M

DCPSUSBYP

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4] 1.524A
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

C999

0.344A

C150
1U_0402_6.3V6K

VCCLAN[2]

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

0.01U_0603_16V7K

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
0.163AVCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

C998

VCCLAN[1]

AF24

AD38

V24
V26
Y24
Y26

0.01U_0603_16V7K

+1.05VS

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

0.052A

VCCACLK[2]

AF23

2 C152
Y20
0.1U_0402_16V4Z

AP53

VCCACLK[1]

+1.05VS

C171
0.1U_0402_16V4Z

DG1.1 no M3
support and not
Intel LAN, VCCLAN
Source=>GND

AP51

USB

Clock and Miscellaneous

POWER

U1J

PCI/GPIO/LPC

C144
1U_0402_6.3V6K

C143
10U_0805_6.3V6M

+3VS
L45
2
1
MURATA_BLM18AG601SN1D_0603

POWER

U1G

CRT

+1.05VS

@ R186
1
0_0603_5%

C192
1U_0402_6.3V6K

+1.05VS

C149
0.1U_0402_16V4Z

C160
0.1U_0402_16V4Z

Title

C195
1U_0402_6.3V6K

Compal Electronics, Inc.

IBEX-M(5/6)-PWR

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Rev
1.0
Sheet

15

of

45

U1I
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

U1H
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

AB16

VSS[0]

AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

BD82HM55 QMNT B3_FCBGA1071

BD82HM55 QMNT B3_FCBGA1071

A

Compal Secret Data

Security Classification
Issued Date

2008/03/13

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

http://mycomp.su/x/

Title

Compal Electronics, Inc.

IBEX-M(6/6)-GND

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Rev
1.0
Sheet

16

of

45

+1.5V

3A@1.5V

8 DDR_A_D[0..63]

+1.5V
+V_DDR_CPU_REF

8 DDR_A_DM[0..7]

DDR_A_DM0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

205

G1

CONN@
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

8 DDR_A_DQS[0..7]
DDR_A_D4
DDR_A_D5

R884 1

8 DDR_A_DQS#[0..7]
8 DDR_A_MA[0..15]

DDR_A_DQS#0
DDR_A_DQS0

@ R898 1

V_DDR_CPU_REF
0_0402_5%

R205
1K_0402_1%

+V_DDR_CPU_REF0

2 0_0402_5%

+V_DDR_CPU_REF

C1058
2.2U_0603_6.3V4Z

2
D

C1057
0.1U_0402_10V6K

DDR_A_D0
DDR_A_D1

+VREF_DQ_DIMMA

DDR_A_D6
DDR_A_D7

R206
1K_0402_1%

DDR_A_D12
DDR_A_D13

JDIMM1
+VREF_DQ_DIMMA

+1.5V

+VREF_DQ_DIMMA

DDR_A_DM1
DRAMRST#

DRAMRST#

6,18

DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21

DDR_A_DM2

@
C1441
0.1U_0402_16V4Z

1103_Add 0.1uF for DRAMRST#.

DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29

Layout Note:
Place near JDIMM1

DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31

+1.5V

DDR_A_WE#
DDR_A_CAS#

8 DDR_CS1_DIMMA#

DDR_A_MA13
DDR_CS1_DIMMA#

DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
B

DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
1 R207
2
10K_0402_5%

1
2

R208
10K_0402_5%

C220
0.1U_0402_16V4Z

C219
2.2U_0402_6.3V6M

+3VS
A

2 @

M_CLK_DDR1
M_CLK_DDR#1
DDR_A_BS1
DDR_A_RAS#

+ C200
330U_D2_2V_Y
2

M_CLK_DDR1 8
M_CLK_DDR#1 8
DDR_A_BS1 8
DDR_A_RAS# 8

DDR_CS0_DIMMA#
M_ODT0
M_ODT1

DDR_CS0_DIMMA#
M_ODT0 8
M_ODT1 8

Layout Note:
Place near JDIMM1.203 & JDIMM1.204

+VREF_CA

+V_DDR_CPU_REF
+0.75VS

+VREF_CA

1
R877

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

2
0_0402_5%

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PM_EXTTS#1_R
SMB_DATA_S3
SMB_CLK_S3

PM_EXTTS#1_R 6,18
SMB_DATA_S3 12,18,19,23
SMB_CLK_S3 12,18,19,23

+0.75VS

0.65A@0.75V

DDR3 SO-DIMM A
REVERSE

+0.75VS

Issued Date

Compal Secret Data

2008/03/13

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://mycomp.su/x/

DDR_A_MA2
DDR_A_MA0

Security Classification

C212
0.1U_0402_16V4Z

C211
0.1U_0402_16V4Z

2 @

C210
0.1U_0402_16V4Z

C209
0.1U_0402_16V4Z

C208
10U_0603_6.3V6M

C207
10U_0603_6.3V6M

C206
10U_0603_6.3V6M

C205
10U_0603_6.3V6M

C204
10U_0603_6.3V6M

C203
10U_0603_6.3V6M

C201
10U_0603_6.3V6M

206

G2

C202
10U_0805_6.3V6M

8 DDR_A_WE#
8 DDR_A_CAS#

C218
1U_0402_6.3V6K

8 DDR_A_BS0

DDR_A_MA10
DDR_A_BS0

DDR_A_MA6
DDR_A_MA4

C217
1U_0402_6.3V6K

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA11
DDR_A_MA7

C216
1U_0402_6.3V6K

8 M_CLK_DDR0
8 M_CLK_DDR#0

DDR_A_MA15
DDR_A_MA14

C215
1U_0402_6.3V6K

DDR_A_MA3
DDR_A_MA1

DDR_A_MA8
DDR_A_MA5

DDR_CKE1_DIMMA

C45
47P_0402_50V8J

DDR_A_MA12
DDR_A_MA9

DDR_CKE1_DIMMA

DDR_A_BS2

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

8 DDR_A_BS2

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

C44
47P_0402_50V8J

DDR_CKE0_DIMMA

C214
2.2U_0402_6.3V6M

8 DDR_CKE0_DIMMA

C213
0.1U_0402_16V4Z

Title

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Rev
1.0
Sheet

17

of

45

+1.5V

+1.5V

8 DDR_B_D[0..63]

DDR_B_WE#
DDR_B_CAS#

8 DDR_CS3_DIMMB#

DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
B

DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
1 R210
2
10K_0402_5%

C242
0.1U_0402_16V4Z

C241
2.2U_0402_6.3V6M

+3VS
A

R211
1

10K_0402_5%

205

G1

G2

206

DDR_CKE3_DIMMB

DDR_CKE3_DIMMB

Layout Note:
Place near JDIMM2

DDR_B_MA15
DDR_B_MA14

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4

+1.5V

DDR_B_MA2
DDR_B_MA0
M_CLK_DDR3
M_CLK_DDR#3

M_CLK_DDR3 8
M_CLK_DDR#3 8

DDR_B_BS1
DDR_B_RAS#

DDR_B_BS1 8
DDR_B_RAS# 8

DDR_CS2_DIMMB#
M_ODT2

DDR_CS2_DIMMB#
M_ODT2 8

M_ODT3

M_ODT3 8

2 @

+VREF_CA

DDR_B_D36
DDR_B_D37

DDR_B_DM4
2

DDR_B_D38
DDR_B_D39

Layout Note:
Place near JDIMM2.203 & JDIMM2.204
B

+0.75VS

DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PM_EXTTS#1_R
SMB_DATA_S3
SMB_CLK_S3

PM_EXTTS#1_R 6,17
SMB_DATA_S3 12,17,19,23
SMB_CLK_S3 12,17,19,23
+0.75VS

DDR3 SO-DIMM B
REVERSE

0.65A@0.75V

+0.75VS
CONN@

Issued Date

Compal Secret Data

2008/03/13

Deciphered Date

2009/05/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://mycomp.su/x/

+VREF_CA

Security Classification

C234
0.1U_0402_16V4Z

8 DDR_B_WE#
8 DDR_B_CAS#

DDR_B_D30
DDR_B_D31

C233
0.1U_0402_16V4Z

8 DDR_B_BS0

DDR_B_MA10
DDR_B_BS0

DDR_B_DQS#3
DDR_B_DQS3

C232
0.1U_0402_16V4Z

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_D28
DDR_B_D29

C231
0.1U_0402_16V4Z

8 M_CLK_DDR2
8 M_CLK_DDR#2

1103_Add 0.1uF for DRAMRST#.

DDR_B_D22
DDR_B_D23

C230
10U_0603_6.3V6M

DDR_B_MA3
DDR_B_MA1

@
C1442
0.1U_0402_16V4Z

C229
10U_0603_6.3V6M

DDR_B_MA8
DDR_B_MA5

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

C228
10U_0603_6.3V6M

DDR_B_MA12
DDR_B_MA9

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

DDR_B_DM2

C227
10U_0603_6.3V6M

DDR_B_BS2

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

DDR_B_D20
DDR_B_D21

C240
1U_0402_6.3V6K

8 DDR_B_BS2

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

6,17

C226
10U_0603_6.3V6M

DDR_CKE2_DIMMB

DRAMRST#

DDR_B_D14
DDR_B_D15

C239
1U_0402_6.3V6K

8 DDR_CKE2_DIMMB

DDR_B_DM1
DRAMRST#

C225
10U_0603_6.3V6M

2 0_0402_5%

C238
1U_0402_6.3V6K

DDR_B_D26
DDR_B_D27

@ R899 1

+V_DDR_CPU_REF1

C224
10U_0603_6.3V6M

DDR_B_DM3

2 0_0402_5%

DDR_B_D12
DDR_B_D13

C237
1U_0402_6.3V6K

DDR_B_D24
DDR_B_D25

R885 1

DDR_B_D6
DDR_B_D7

C223
10U_0603_6.3V6M

DDR_B_D18
DDR_B_D19

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_DQS#2
DDR_B_DQS2

+V_DDR_CPU_REF

8 DDR_B_MA[0..15]

DDR_B_D16
DDR_B_D17

DDR_B_D4
DDR_B_D5

C47
47P_0402_50V8J

DDR_B_D10
DDR_B_D11

8 DDR_B_DQS[0..7]

DDR_B_DQS#1
DDR_B_DQS1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

DDR_B_D8
DDR_B_D9

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

C46
47P_0402_50V8J

DDR_B_D2
DDR_B_D3

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

C1060
2.2U_0603_6.3V4Z

DDR_B_DM0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

C235
0.1U_0402_16V4Z

DDR_B_D0
DDR_B_D1

C1059
0.1U_0402_10V6K

C221
2.2U_0402_6.3V6M

+VREF_DQ_DIMMB

8 DDR_B_DM[0..7]

JDIMM2

8 DDR_B_DQS#[0..7]

3A@1.5V
+VREF_DQ_DIMMB
+VREF_DQ_DIMMB

Title

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Sheet

18

of

45

+1.05VS_CK505

+1.05VS_CK505
+3VS_CK505

+3VS_CK505
+1.5VS_CK505

+1.5VS_CK505

80mA

CLK_14M_PCH @ C808 1

2 10P_0402_50V8J

U3

NC

12

OK
OK

CKSSCD

CLK_DMI
CLK_DMI#

CLK_DMI
CLK_DMI#

DMI12

CLK_BUF_CKSSCD
CLK_BUF_CKSSCD#

12 CLK_BUF_CKSSCD
12 CLK_BUF_CKSSCD#

R221 1
R223 1

2
2

R219 1
R220 1

2
2

33_0402_5% L_CLK_DMI
33_0402_5% L_CLK_DMI#
33_0402_5% L_CLK_BUF_CKSSCD
33_0402_5% L_CLK_BUF_CKSSCD#
CPU_STOP#

9
10
11
12
13
14
15
16

VSS_SATA
SRC_1/SATA
SRC_1#/SATA#100MHz
VSS_SRC
SRC_2
SRC_2# 100MHz
VDD_SRC_IO
CPU_STOP#

SMB_CLK_S3
SMB_DATA_S3
REF_0/CPU_SEL

32
31
30
29
28
27
26
25

SCL
SDA
REF_0/CPU_SEL
VDD_REF
XTAL_IN
XTAL_OUT
VSS_REF
CKPWRGD/PD#

VSS_CPU
CPU_1
CPU_1#
VDD_CPU_IO
VDD_SRC

R_CKPWRGD

R226 1
R237 1

2 0_0402_5%
2 0_0402_5% CKPWRGD

L_CLK_BUF_BCLK
L_CLK_BUF_BCLK#

R224 1
R225 1

2 33_0402_5%
2 33_0402_5%

33

REF(14.318MHz)

DOT_CLK(96MHz)

27MHz

27MHz_SS

is GND (for DELLHP)

pin8
pin8 is 48MHz (For ABO or 030)

CLK_XTAL_OUT
CLK_XTAL_IN

2
R212
0_0805_5%

2
1 14.318MHZ_16PF_7A14300083

1
C259
22P_0402_50V8J

1019_Change C259/C260 from 18pF to 22pF.

40

CLK_EN#

+3VS_CK505

0(default)

133MHz

133MHz

100MHz

100MHz

CPU_STOP#

R234 1

CPU_1

CPU_0

R218
1
2
0_0805_5%

CKPWRGD

PIN 30

Near pin29

+1.05VS_CK505

+VCCP
R607
10K_0402_5%

C260
22P_0402_50V8J

Vendor
suggests 22pF

BCLK OK

Place close to
U3

+3VS_CK505

Y3
1

SRC/SATA(100MHz)

250mA

S Q30
2N7002_SOT23-3

CLK_EN# 2
G

C252
10U_0805_10V4Z

CLK_BUF_BCLK 12
CLK_BUF_BCLK# 12

133MHz
SRC(100MHz_SS)

13,40

+3VS_CK505

Number of Clock Outputs

SLG8SP585
SLG8SP587

VGATE

Near pin5

+3VS

Number

14M OK
D

ICS9LRS3197AKLFT MLF_QFN32_5X5

Output

CLK_14M_PCH 12

CLK_XTAL_IN
CLK_XTAL_OUT

24
23
22
21
20
19
18
17

VDD_CPU
CPU_0

133MHz CPU_0#

SMB_CLK_S3 12,17,18,23
SMB_DATA_S3 12,17,18,23
R222 2
1 33_0402_5% CLK_14M_PCH

C250
0.1U_0402_16V4Z

VDD_DOT
VSS_DOT
DOT_96
DOT_96# 96MHz
VDD_27
27MHZ
27MHZ_SS
VSS_27

C247
0.1U_0402_16V4Z

1
2
3
4
5
6
7
8

33_0402_5% L_CLK_BUF_DOT96
33_0402_5% L_CLK_BUF_DOT96#

C254
0.1U_0402_16V4Z

1
1

C245
10U_0805_10V4Z

DOT96

R213 2
R214 2

C253
0.1U_0402_16V4Z

OK

CLK_BUF_DOT96
CLK_BUF_DOT96#

12 CLK_BUF_DOT96
12 CLK_BUF_DOT96#

TGND

250mA

Routing the trace at

least 10mil

2 10K_0402_5%

+1.5VS_CK505

CPU_SEL During CK_PEWGD Latch Pin1

+3VS

+3VS

2 10K_0402_5%

+1.5VS

2
@ R229
@R229
0_0603_5%

2
B

Near pin1 Near pin17

SI

C249
0.1U_0402_16V4Z

R247 1

REF_0/CPU_SEL
C246
0.1U_0402_16V4Z

2 10K_0402_5%

C248
0.1U_0402_16V4Z

@
R244 1

R228
0_0603_5%
1
2

Near pin24

Reserve low power clock generator solution

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
5

Deciphered Date

2006/03/10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

Clock Generator CK505

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Sheet

Thursday, November 12, 2009

1

19

of

45

BLUE
GREEN
RED

26

+5VS

R270
4.7K_0402_5%
Y

R274 1

D_VSYNC

2 0_0603_5%

D_DDCDATA

U6
SN74AHCT1G125GW_SOT353-5

R272
2.2K_0402_5%

R271
4.7K_0402_5%

@ C269
5P_0402_50V8C

@ C270
5P_0402_50V8C

1
3

1
3

DAN217T146_SC59-3

R273
2.2K_0402_5%
2

VSYNC_G_A

+3VS

+CRTVDD

D_HSYNC

2 0_0603_5%

+3VS

I_DDCDATA

1
Q2A

2N7002DW-7-F_SOT363-6
3

D_DDCCLK

I_DDCDATA 13

R269 1

5
1

CRT_VSYNC

+CRTVDD

U5
SN74AHCT1G125GW_SOT353-5
HSYNC_G_A
4

P
OE#

CRT_VSYNC

Place close to
JCRT1

+CRTVDD

SUYIN_070546FR015S263ZR
CONN@

1 10K_0402_5%

D8

16
17

5
1
13

CRT_HSYNC

P
OE#

CRT_HSYNC

13

BLUE

D_VSYNC

C268
0.1U_0402_16V4Z
1
2
R815 2

GREEN

C267
0.1U_0402_16V4Z
1
2

GREEN
D_HSYNC
BLUE

+5VS

26
26
26

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

RED

RED

1
0.1U_0402_16V4Z
C266
JCRT1

26

W=40mils

1.1A_6VDC_FUSE

1
RB491D_SC59-3

CRT Connector

F1
1

D7

D9

D6

+CRTVDD

DAN217T146_SC59-3

+RCRT_VCC

+5VS

DAN217T146_SC59-3

I_DDCCLK

I_DDCCLK 13

Q2B
2N7002DW-7-F_SOT363-6
D_DDCDATA 26
D_DDCCLK 26

CRT Termination/EMI Filter

M_BLU

L10 1

2 HLC0603CSCCR11JT_0603

BLUE

C276
10P_0402_50V8J

GREEN

C275
10P_0402_50V8J

RED

2 HLC0603CSCCR11JT_0603

C274
10P_0402_50V8J

2 HLC0603CSCCR11JT_0603

L9 1

C273
22P_0402_50V8J

L8 1

M_GRN

C272
22P_0402_50V8J

M_BLUE

M_RED

C271
22P_0402_50V8J

13

R277
150_0402_1%

M_GREEN

13

R276
150_0402_1%
2
1

M_RED

R275
150_0402_1%
2
1

13

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
A

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

Compal Electronics, Inc.

CRT Connector

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
E

20

of

45

LVDS CONN & USB Camera +

Dig Mic
D

+LCDVDD
+5VALW

0.1U_0402_16V4Z

C280
4.7U_0805_10V4Z

R279
1M_0402_5%

6 2

R278
22_0603_5%
C282

2
2

RF
request.
LVDS_A2LVDS_A2+
LVDS_A1LVDS_A1+
LVDS_A0LVDS_A0+
LVDS_ACLKLVDS_ACLK+

LVDS_A2LVDS_A2+
LVDS_A1LVDS_A1+
LVDS_A0LVDS_A0+

0.047U_0402_16V7K
C302
5P_0402_50V8C
@

Limited Current < 1A

LVDS_ACLK- 13
LVDS_ACLK+ 13

13

I_ENAVDD

C303

R281
1
100_0805_5%

LVDS_EDID_CLK
LVDS_EDID_DATA

DMIC_DAT 27
DMIC_CLK 27
+5VS
LVDS_INV_PWM 13,31
BKOFF# 31
DAC_BRIG 31

I_ENAVDD

R283
100K_0402_5%

@
DMIC_DAT
DMIC_CLK
+3V_LOGO
LVDS_INV_PWM
BKOFF#
DAC_BRIG

C284

13
13
13
13
13
13

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42

100K_0402_5%

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
GND

C283
4.7U_0805_10V4Z

5P_0402_50V8C

Q3B
2N7002DW-7-F_SOT363-6

+3VS
C

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
GND

2N7002DW-7-F_SOT363-6
Q3A

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41

R280
2

JLVDS1

USB20_P4
USB20_N4

USB20_P4
USB20_N4

C279
680P_0402_50V7K

0.1U_0402_16V4Z

14
14

C281

C318
47P_0402_50V8J
2
1

C319
47P_0402_50V8J

C278
680P_0402_50V7K

INVPWR_B+

RF
request.

2
G

+LCDVDD

RF
request.

+3VS
Q13
SI2301BDS-T1-E3_SOT23-3

+LCDVDD
1

+LCDVDD

+USB_CAM
LVDS_EDID_CLK 13
LVDS_EDID_DATA 13
LVDS_INV_PWM

ACES_88242-4001
CONN@

VIN

IO1

IO2 GND

USB20_P4

2
+3VS

RF
request.

B+

INVPWR_B+

L12 1
2
FBMA-L11-201209-221LMA30T_0805

RF
request.
B

R285
2.2K_0402_5%
1

R284
2.2K_0402_5%
LVDS_EDID_CLK
LVDS_EDID_DATA

@ R282
10K_0402_5%

1 @

EMI request.

PRTR5V0U2X_SOT143-4

@ R202
2.2_0402_5%~D
1

C286

USB20_N4

2 680P_0402_50V7K

D22
+5VALW

C294
680P_0402_50V7K

C321
12P_0402_50V8J

BKOFF#
1

USB Camera

+USB_CAM
+5VS

GND

OUT

BYP

R286
215K_0603_1%

SHDN

G916-390T1UF_SOT23-5

2
R287
100K_0402_1%

C981
47P_0402_50V8J

IN

C289
10U_0805_6.3V6M

2
R288
0_0402_5%
C290
10U_0805_6.3V6M

C320
47P_0402_50V8J

U7

RF
request.

+USB_CAM is +3.9VS, R286:215K; R287:100Kohm

+USB_CAM=1.25(1+R1091/R1093)

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
5

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

LCD CONN.

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
1

21

of

45

C667
C

X
0.1uF

4.7K ohm

0 ohm
X
0 ohm
X
0 ohm

0 ohm

13 HDMID_CTRLDATA

0 ohm

13 HDMID_CTRLCLK

R850 1

0 ohm

4.7K ohm

1uF

1uF

0.1uF

1uF

R862

R867

X
HDMICLK-

EQUALIZATION SETTING:
[PC1,PC0]=00,8dB
[PC1,PC0]=01,4dB (Recommanded)
[PC1,PC0]=10,12dB
[PC1,PC0]=11,0dB

TMDS_B_HPD

2 0_0402_5%

1
2
@C1052
@C1052
2.2U_0603_6.3V4Z

+3VS_LS

2 0_0402_5%

R853 1
@ R855 1

+3VS_LS
R859

@ R857 1

WCM-2012-900T_0805
1 1
2 2
4 4
@
L28
R866
1

32

GND

31

GND

ANALOG1(REXT)

HPD_SOURCE

HPD_SINK

30

HDMI_DETECT

SDA_SOURCE

SDA_SINK

29

HDMIDAT

SCL_SOURCE

SCL_SINK

28

HDMICLK

R843
@ R844
R845
@ R846

10

ANALOG2

2 0_0402_5%

11

VCC3V

2 4.7K_0402_5%

12

GND

49

thm_pad

2 0_0402_5%

GND

27

VCC3V

26

OE*

25

2
2
2
2

1
1
1
1

0_0402_5%
0_0402_5%
4.7K_0402_5%
0_0402_5%

HDMI_TX_0HDMI_TX_0+

HDMI_R_CLK+

@ R851 2
+3VS_LS

14.7K_0402_5%

R854 1

HDMICLK-

2 0_0402_5%

10U_0805_6.3V6M

R852
10K_0402_5%

+3VS_LS

2 0_0402_5%

R856 2

1 0_0402_5%

HDMI_DETECT

2
G

ASM1442 QFN 48P HDMI SHIFTER

S
Q31
2N7002_SOT23-3

@C1053
@
C1053

HDMICLK+

@R860
@
R860
1
2
68_0402_5%
0.5P_0402_50V8B

@ R861
1
+3VS_LS

+3VS_LS

@C1054
@
C1054
HDMI_TX_0+

2
68_0402_5%

@
R862
20K_0402_5%

0.5P_0402_50V8B

+3VS_LS

HDMI_TX_1@ R864
@C1056
@
C1056
HDMI_TX_1+
1
2
68_0402_5%
0.5P_0402_50V8B

@C1055
@
C1055

HDMI_TX_2+

HDMI_R_TX0-

HDMI_TX_2-

@R863
@
R863
1
2
68_0402_5%
0.5P_0402_50V8B

R865

R870

2 0_0402_5%

1 TMDS_B_HPD

13 TMDS_B_HPD#

0_0402_5%
@
R867
7.5K_0402_1%

HDMI_R_TX0+

4 4
@
L29
R869
1

+3VS_LS

HDMI_R_CLK-

WCM-2012-900T_0805
1 1
2 2

+3VS_LS

+3VS_LS

0_0402_5%
R868

C1051

C1050

DDC_EN

PC1

HDMI_TX_0HDMICLK+

0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_16V7K
C1049

33

FUCNTION2

2 4.7K_0402_5%

R858 1

C1048

37

38
IN_D1-

40

39

VCC3V

IN_D1+

42

43

44

46

45

41
IN_D2-

IN_D2+

GND

IN_D3-

GND

1 0_0402_5%

VCC3V

4.7K ohm

R848
@R801
@
R801
2.2K_0402_5% 10K_0402_5%

R841 2

R835

X
0 ohm

R847
2.2K_0402_5%

34

FUNCTION1

R841

0 ohm

0 ohm

0 ohm

R849
3.9K_0402_1%
2
1

1 0_0402_5%

FUNCTION3

R834

0 ohm

+3VS_LS

R839 2

FUNCTION4

PC0

1 4.7K_0402_5% +3VS_LS

36
35

R839

0 ohm

VCC3V

1 4.7K_0402_5% +3VS_LS

@ R835 2

R844

0 ohm

+3VS_LS

R843

0 ohm

R854

2
0_0402_5%

@ R834 2

GND

R840
1
2
4.7K_0402_5%

GND

OUT_D1-

0 ohm

@ R842

GND

24

4.7K ohm

+3VS_LS

23

0 ohm

1
2
0_0402_5%
+3VS_LS

OUT_D1+

@ R836
4.7K_0402_5%

@ R838
@R838
4.7K_0402_5%

VCC3V

0 ohm

R837

22

4.7K ohm

0 ohm

OUT_D2-

+3VS_LS

20

4.7K ohm

+3VS_LS

OUT_D2+

0 ohm

19

GND

0 ohm

0 ohm

0 ohm

R851

2.2uF

OUT_D3-

R858

U47

18

R857

0 ohm

@ R833
4.7K_0402_5%

17

R855

TMDS_DATA2
TMDS_DATA2#

2 0.1U_0402_10V6K
2 0.1U_0402_10V6K

VCC3V

R853

0 ohm

1
1

+3VS_LS

13

R850
C1052

C10
C11

13 TMDSD_DATA2
13 TMDSD_DATA2#

3.9K ohm4.3K ohm

TMDS_DATA2
TMDS_DATA2#

IN_D3+

TMDS_CLK#
TMDS_CLK

OUT_D3+

TMDS_DATA1
TMDS_DATA1#

VCC3V

2 0.1U_0402_10V6K
2 0.1U_0402_10V6K

16

1
1

15

C8
C9

48

R842

13 TMDSD_DATA1
13 TMDSD_DATA1#

TMDS_DATA1
TMDS_DATA1#

47

4.7K ohm

TMDS_DATA0#
TMDS_DATA0

IN_D4-

4.7K ohm

+3VS

+3VS_LS

0_0603_5%

IN_D4+

4.7K ohm

2 0.1U_0402_10V6K
2 0.1U_0402_10V6K

OUT_D4-

4.7K ohm

1
1

OUT_D4+

C6
C7

14

R840 4.7K ohm

R849 3.9K ohm499 ohm 499 ohm

13 TMDSD_DATA0
13 TMDSD_DATA0#

4.7K ohm

R838

R832

TMDS_DATA0
TMDS_DATA0#

TMDS_CLK
TMDS_CLK#

2 0.1U_0402_10V6K
2 0.1U_0402_10V6K

+3VS_LS

0 ohm

0 ohm

1
1

4.7K ohm

C2
C4

13 TMDSD_CLK
13 TMDSD_CLK#

0 ohm 4.7K ohm

TI

0 ohm

8171

R836

R837

ST

R833

Asmedia
1442
X

21

Parade
8101T

0_0402_5%
+5VS

+5VS_HDMI

HDMI Connector

HDMI_R_TX1-

HDMI_R_TX1+
D34
RB411DT146_SOT23-3

HDMI_TX_2HDMI_TX_2+

2 0_0402_5%

WCM-2012-900T_0805
1 1
2 2
4 4
@
L31
R873
1

+5VS_HDMI

HDMI_R_TX2R577
1
2
1.5K_0402_5%
R578
1
2
1.5K_0402_5%

R872

0_0402_5%

C665

HDMI_R_TX2+

2
0_0402_5%

C666
22N_0402_16V7K

4 4
@
L30
R871
1

HDMI_TX_1+

C667
0.1U_0402_16V4Z

WCM-2012-900T_0805
1 1
2 2

22N_0402_16V7K

HDMI_TX_1-

JHDMI1

HDMI_DETECT

10K_0402_1%
R580
100K_0402_1%

C668
330P_0402_50V7K

HDMI_R_CLKHDMI_R_CLK+
HDMI_R_TX0HDMI_R_TX0+
HDMI_R_TX1HDMI_R_TX1+
HDMI_R_TX2HDMI_R_TX2+

D35
SKS10-04AT_TSMA
2

18
16
15
19

HDMIDAT
L32
R579 FBML10160808121LMT_0603HDMICLK
HDMI_HPD
1
2
1
2

12
10
9
7
6
4
3
1

+5V
SDA
SCL
HP_DET
CKCK+
D0D0+
D1D1+
D2D2+

13
14

CEC
Reserved

2
5
8
11
20
21
22
23
17

GND
GND
GND
GND
GND
GND
GND
GND
DDC/CEC_GND

SUYIN_100042MR019S153ZL
CONN@

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
5

2006/03/10

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

HDMI LS & Conn.

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Rev
1.0

Thursday, November 12, 2009

Sheet
1

22

of

45

HDD Connector
JP3

SATA_RXN0_C 11
SATA_RXP0_C 11

+3VS

PA@
R364

D10

+3VS

C465
0.1U_0402_16V4Z

C464
0.1U_0402_16V4Z

C463
0.1U_0402_16V4Z

+5VS

SMB_CLK_S3
PA@
U15

VDDIO absolute man

rating is VDD+0.1
+3VS_ACL_IO

Vdd_IO

GND

Reserved

GND

5
6

PA@
R366
1

0_0402_5%

CD-ROM Connector
+3VS_ACL

SMB_CLK_S3 12,17,18,19

SMB_DATA_S3
PA@

13

SDO

12

Reserved

11

GND

10

0_0402_5%

GND

INT 2

Vdd

INT 1

SMB_DATA_S3 12,17,18,19

R367
2

CS

ACCEL_INT 14

HP302DLTR8_LGA14_3x5

SATA_TXP1
SATA_TXN1
SATA_RXN1_C
SATA_RXP1_C

R368 2 PA@

SATA_RXN1_C 11
SATA_RXP1_C 11
+5VS

Near CONN side.

6
5
4
3
2
1

+5VS
1

2
SUYIN_127382FR013GX09ZR
CONN@

1
10K_0402_5%

Must be placed in the center of the system.

Placea caps. near ODD

CONN.

OPP@

OPP@

OPP@

C478
10U_0805_10V4Z

1 0.01U_0402_50V7K
1 0.01U_0402_50V7K

SATA_TXP1 11
SATA_TXN1 11

C477
10U_0805_10V4Z

SATA_RXN1
SATA_RXP1

OPP@
C473 2
C474 2
OPP@

C476
1U_0603_10V4Z

13
12
11
10
9
8
7

C475
0.1U_0402_16V4Z

DP
V5
V5
MD
GND
GND

PA@

0011101b

SDA / SDI / SDO

JP5
GND
A+
AGND
BB+
GND

2
0_0603_5%

0.4mA

RB751V_SOD323

Pleace near HDD CONN (JP3)

+5VS

SUYIN_127072FR022G523_RV
CONN@

+3VS_ACL_IO
PA@

Near CONN side.

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12

+3VS_ACL

PA@

C469
10U_0805_6.3V6M

SATA_RXN0_C
SATA_RXP0_C

C468
0.1U_0402_16V4Z

1 0.01U_0402_50V7K
1 0.01U_0402_50V7K

14

SATA_RXN0 C466 2
SATA_RXP0 C467 2

+3VS_ACL

ACCELEROMETER (ST)

SATA_TXP0 11
SATA_TXN0 11

C462
10U_0805_10V4Z

SATA_TXP0
SATA_TXN0

SCL / SPC

1
2
3
4
5
6
7

GND
A+
AGND
BB+
GND

OPP@

Multi Bay
+5VS

17
19

SATA_TXP5 11
SATA_TXN5 11
1
1

SATA_RXN5_C
SATA_RXP5_C

PA@
SATA_RXN5_C 11
SATA_RXP5_C 11

C261

0.01U_0402_16V7K
0.01U_0402_16V7K

PA@
C262

PA@ 1
C263
2

PA@ 1
C264
2

PA@
C265

1
+
2

1
+
2

C1432
220U_B_2.5VM_R15M

GND
G1

PA@
SATA_RXN5 C255 2
SATA_RXP5 C256 2
PA@

150U_B_6.3VM_R40M

GND
G2

SATA_TXP5
SATA_TXN5

10U_0805_10V4Z

GND
TX+
TXGND
RXRX+
GND
GND

10U_0805_10V4Z

18
20

VCC5
VCC5
VCC5
VCC3
VCC3
VCC3
GND
GND

1
3
5
7
9
11
13
15

1U_0603_10V4Z

JP12
2
4
6
8
10
12
14
16

0.1U_0402_16V4Z

Placea caps. near Multi

Bay CONN.

+5VS

CONN@
TYCO_2023087-3

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
5

2006/03/10

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

HDD & CDROM

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Rev
1.0

Thursday, November 12, 2009

Sheet
1

23

of

45

+3VALW

SIM card Connector

0.1U_0402_16V4Z

UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

+3VS_WWAN

CW7
@

CW8

CW9

+1.5VS

RW26

+1.5VS_WWAN

2 0_0805_5%

CW14

CW12

RF
request.

1 0.1U_0402_16V4Z
CW13

+3VS_WWAN

CLKREQ_WWAN#
CLK_PCIE_WWAN#
CLK_PCIE_WWAN

12 CLK_PCIE_WWAN#
12 CLK_PCIE_WWAN

12
12

PCIE_RXN1
PCIE_RXP1
12
12

0_0402_5%
2 PCIE_C_RXN1
2 PCIE_C_RXP1
0_0402_5%

RW8 1
1
RW10

PCIE_TXN1
PCIE_TXP1

PCIE_TXN1
PCIE_TXP1

14 WWAN_DETECT#
+3VS_WWAN

WWAN_DETECT#
1
2
RW17
0_0603_5%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

+3VS_WLAN

8
9

G1
G2

+1.5VS_WLAN
0.01U_0402_16V7K

CW2

2
4.7U_0805_10V4Z

CW3

RF
request.

+3VS_WWAN

CW1

M_WXMIT_OFF#
PLT_RST#
@RW9
@
RW9 1
RW11 1

CW15

@
CW16

@
CW17

@
CW18

1
1

CW19

47P_0402_50V8J

RF
request.

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

CLKREQ_WLAN#

12 CLKREQ_WLAN#

CLK_PCIE_WLAN#
CLK_PCIE_WLAN

12 CLK_PCIE_WLAN#
12 CLK_PCIE_WLAN
14 CLK_DEBUG_PORT_1
12
12

RW12 1
RW14 1

PCIE_RXN2
PCIE_RXP2
12
12

USB20_N8 14
USB20_P8 14

PCIE_C_RXN2
PCIE_C_RXP2

2 0_0402_5%
2 0_0402_5%
PCIE_TXN2
PCIE_TXP2

PCIE_TXN2
PCIE_TXP2

WW_LED# 32
+3VS_WLAN
+1.5VS_WWAN
+3VS_WWAN

31
31

RW25
1
RW27 1

EC_UTX
EC_URX

2 33_0402_5%
2 33_0402_5%

53

+3VALW

RB751V_SOD323

@ RW19
1
2 UIM_DATA
47K_0402_5%

0_0805_5%

+1.5VS_WLAN

+3VS

RW2 1

0_0805_5%

+3VS_WLAN

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

GND1

+3VS_WLAN
+1.5VS_WLAN
1
2
1
2
1
2
1
2
1
2

RW3
RW4
RW5
RW6
RW7

XMIT_OFF#
PLT_RST#
@RW13
@
RW13 1
RW15 1

0_0402_5% DEBUG@
0_0402_5% DEBUG@
0_0402_5% DEBUG@
0_0402_5% DEBUG@
0_0402_5% DEBUG@

2 0_0805_5%
2 0_0805_5%

LPC_FRAME# 11,31
LPC_AD3 11,31
LPC_AD2 11,31
LPC_AD1 11,31
LPC_AD0 11,31

+3VALW
+3VS_WLAN
+1.5VS_WLAN

SMBCLK
SMBDATA
USB20_N5 14
USB20_P5 14
WL_LED# 32
+1.5VS_WLAN

+3VS_WLAN

FOX_AS0B226-S40N-7F
CONN@

RF
request.

+3VS_WLAN

CW20
UIM_CLK
1

QW1
SI2305ADS-T1-GE3_SOT23-3

+3VS

@
RW23
1
2
0_1206_5%

M_WXMIT_OFF#
3

RW1 1

39P_0402_50V8J 39P_0402_50V8J
1
1
1
1

@ RW22
1
2
0_0603_5%
S

14 WXMIT_OFF#

+1.5VS

0.1U_0402_16V4Z

+3VS_WWAN

DW1

CW6

PLT_RST#

UIM_PWR

CW5

JP7

47P_0402_50V8J 39P_0402_50V8J

FOX_AS0B226-S40N-7F
CONN@

CW4

ICH_PCIE_WAKE#

2 0_0805_5%
+3VALW
2 0_0805_5%
+3VS_WWAN
+1.5VS_WWAN

SMBCLK
SMBDATA

4.7U_0805_10V4Z

39P_0402_50V8J 39P_0402_50V8J
1
1
1
1
+1.5VS_WWAN
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

+3VALW

0.1U_0402_16V4Z

ACES_88266-07001
CONN@

JP6
ICH_PCIE_WAKE#

1
2
3
4
5
6
7

2
0.01U_0402_16V7K

0.1U_0402_16V4Z

12 CLKREQ_WWAN#

1
2
3
4
5
6
7

CW10
47P_0402_50V8J

Mini Card
2---WLAN

JP4

0.01U_0402_16V7K 4.7U_0805_10V4Z

0.1U_0402_16V4Z

Mini Card 0--TV

tuner/WWAN/Robson

DW2

CW11 @
18P_0402_50V8J

14

XMIT_OFF

@
CW21

@
CW22

@
CW23

XMIT_OFF#
47P_0402_50V8J 39P_0402_50V8J

RB751V_SOD323

31 WWAN_POWER_OFF

PA@
C1308
1
2 0.1U_0402_16V4Z

12
14

2 0.1U_0402_16V4Z

2
4

2 0.1U_0402_16V4Z
17

+3VALW
PLT_RST#

14,25 PLT_RST#

14 EXP_CPPE#

1
2
0_0402_5%
PA@ R1210

20

SUSP#

27,31,33,35,38,39 SUSP#
+3VALW

SYSON

31,32,33,37 SYSON

R1111 1

14
14

U53
+3VS

PA@
C1311 1
PA@
C1312 1

Express Card
Power Switch

+1.5VS

1
2 100K_0402_5%

10

CPPE#

9
18

1.5Vin
1.5Vin

1.5Vout
1.5Vout

3.3Vin
3.3Vin

3.3Vout
3.3Vout

AUX_IN
SYSRST#
SHDN#

Near to Express Card slot.

Close to
JEXP

New Card

AUX_OUT
OC#
PERST#

STBY#

NC

CPPE#

GND

11
13

+1.5VS_PEC

3
5

+3VS_PEC

15

+3V_PEC

R1108
R1109

USB20_N9
USB20_P9

2 0_0402_5%
2 0_0402_5%

USB9USB9+
CPPE#
SMBCLK
SMBDATA

12 SMBCLK
12 SMBDATA
13,25 ICH_PCIE_WAKE#

R1110 PA@
1
2
0_0402_5%

19
8

PA@
1
1 PA@

+3VS_PEC

+1.5VS_PEC
+1.5VS_PEC
+3V_PEC

PCIE_PME#_R
PERST#

+3VS_PEC
PERST#

CLKREQ_EXP#
CPPE#

12 CLKREQ_EXP#

16

12 CLK_PCIE_EXP#
12 CLK_PCIE_EXP

CPUSB#
RCLKEN

12
12

PCIE_RXN4
PCIE_RXP4

12
12

PCIE_TXN4
PCIE_TXP4

CLK_PCIE_EXP#
CLK_PCIE_EXP
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4

G577NSR91U_TQFN 20P

GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND
GND

PA@
C1309
0.1U_0402_16V4Z

PA@
C1313
0.1U_0402_16V4Z

http://mycomp.su/x/

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

PA@
C1310
4.7U_0805_10V4Z

PA@
C1314
4.7U_0805_10V4Z

+3V_PEC

GND
GND

Compal Secret Data

2007/08/28

Issued Date

+1.5VS_PEC

PA@
C1315
0.1U_0402_16V4Z

29
30

SANTA_130801-5_LT
CONN@

Security Classification

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

PA@

internal pull high to 3.3Vaux-in

EC need setting at Hi-Z & output Low

JEXP1

Title

1 PA@
C1316
4.7U_0805_10V4Z

Compal Electronics, Inc.

WLAN, WWAN, New Card

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
E

24

of

45

RTL8401 Combo(LAN + Card reader)

LAN Conn.

+HV33

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_PTX_IRX_P3_R
PCIE_PTX_IRX_N3_R
PLT_RST#
CLKREQ_LAN#

14,24
PLT_RST#
12 CLKREQ_LAN#

LAN_ACTIVITY#
LAN_SK_LAN_LINK#
LED2/EEDI
CR_LED#
EECS

43
42
41
40
39

LEDPIN0
LEDPIN1/EESK
LEDPIN2/EEDI
LEDPIN3/EEDO
EECSPIN

28
29
31
32

MDIP0
MDIN0
MDIP1
MDIN1

34

8401

+3VS

LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-

25

RSET/AVDD

XD_CE#/SD_D1
XD_CLE/SD_D0/MS_D7
XD_ALE/SD_D7/MS_D3
XD_WE#/SD_CD#
XD_WP#/SD_D6/MS_D6
XD_D0/SD_CLK/MS_D2
XD_D1/SD_D5/MS_D0
XD_D2/SD_CMD
XD_D3/SD_D4/MS_D4
XD_D4/SD_D3/MS_D1
XD_D5/SD_D2/MS_D5
XD_D6/MS_BS
XD_D7
XD_CD#
XD_RDY/SD_WP#/MS_CLK
XD_RE#/MS_INS#

1
2
3
4
5
6
7
8
9
10
11
12
13
46
47
48

EVDD3
CARD_3V3
VDD3_IN
VDDTX
CTRL12D
CTRL12A

14
44
45
19
33
26

25MHz_20pF_6X25000017

26

C1260 1

2 27P_0402_50V8J

1
R1044
2.49K_0402_1%

XDCE#_SDD1
XDCLE_SDD0
XDALE_SDD7_MSD3
XDWE#_SDCD#
XDWP#_SDD6
SD_CLK
1 R1179 20_0402_5% XDD0_SDCLK_MSD2
XDD1_SDD5_MSD0
XDD2_SDCMD
XDD3_SDD4_MSD4
XDD4_SDD3_MSD1
XDD5_SDD2_MS_D5
XDD6_MSBS
XD_D7
XD_CD#
MS_CLK
1 R1178 2 0_0402_5% XDDRY_SDWP_MSCLK
XDRE#_MSINS#

GND(GPO)

GNDTX

CL14
0.1U_0402_16V4Z

PR2+

26

RJ45_MIDI0-

PR1-

26 RJ45_MIDI0+

RJ45_MIDI0+

PR1+

+3V_LAN

11

LAN_SK_LAN_LINK#

LANLED_LINK#

C1272
C1258

1
1

1 0_0603_5%
2 0.1U_0402_16V4Z

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

+D3V3

0_0402_5%
1

2 0_0805_5%

80 mils

R382 1

2 0_0402_5%

+3V_LAN

CR_LED#
2

HT-F196BP5_WHITE

White

close pin 45
1

+3V_LAN

0_0402_5%

Q15
SI2301BDS-T1-E3_SOT23-3

LANLED_ACT#

R369
300_0402_5%
1
2
1

C480
0.1U_0402_16V4Z

+DVDD33
1

close pin 34
1

Card Reader Connector

10/100 Transformer

JREAD1

11
31

41
42

7 IN 1 CONN

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
7IN1 GND
7IN1 GND

21
28

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
SD-CMD
SD-CD-SW

20
14
12
30
29
27
23
18
16
25
1

XDD0_SDCLK_MSD2
XDCLE_SDD0
XDCE#_SDD1
XDD5_SDD2_MS_D5
XDD4_SDD3_MSD1
XDD3_SDD4_MSD4
XDD1_SDD5_MSD0
XDWP#_SDD6
XDALE_SDD7_MSD3
XDD2_SDCMD
XDWE#_SDCD#

SD-WP-SW

XDDRY_SDWP_MSCLK

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS

26
17
15
19
24
22
13

XDDRY_SDWP_MSCLK
XDD1_SDD5_MSD0
XDD4_SDD3_MSD1
XDD0_SDCLK_MSD2
XDALE_SDD7_MSD3
XDRE#_MSINS#
XDD6_MSBS

U17

+VCC_4IN1

C325
0.1U_0402_16V4Z

XDWE#_SDCD#
34
XDWP#_SDD6
33
XDALE_SDD7_MSD3 35
XD_CD#
40
XDDRY_SDWP_MSCLK39
XDRE#_MSINS#
38
XDCE#_SDD1
37
XDCLE_SDD0
36

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

SD-VCC
MS-VCC

C324
0.1U_0402_16V4Z

32
10
9
8
7
6
5
4

XD-VCC

C323
0.1U_0402_16V4Z

XDD0_SDCLK_MSD2
XDD1_SDD5_MSD0
XDD2_SDCMD
XDD3_SDD4_MSD4
XDD4_SDD3_MSD1
XDD5_SDD2_MS_D5
XDD6_MSBS
XD_D7

C1062
10U_0805_6.3V6M

+VCC_4IN1

C1263
0.1U_0402_16V4Z

2 1.2K_0402_5%

4.7U_0805_10V4Z

C1262
0.1U_0402_16V4Z

RL16 1

C1254
1U_0402_6.3V6K

+5VS

R1045

C1253
0.1U_0402_16V4Z

+3V_LAN

0.1U_0402_16V4Z

CL18

close pin 14

0_0402_5%

R1036

DL2

+EVDD

@ R823 1

+3VALW

31 LAN_POWER_OFF
1

Green LED-

CL17

15

D59
@ PACDN042_SOT23~D

+VCC_4IN1

C1259
0.1U_0402_16V4Z

+3V_LAN

C1251
0.1U_0402_16V4Z

0_0402_5%

close pin 27

10

SHLD1

LANGND
LANLED_LINK#

2
R1033
2
C322 1

DETCET PIN2
Green LED+

FOX_JM36113-P1122-7F
CONN@

+EVDD
+D3V3
+EVDD12_8401
CTRL12
CTRL12A

LANLED_ACT#

R1043
+HV33

C1250
0.1U_0402_16V4Z

C1274
1U_0402_6.3V6K

C1273
0.1U_0402_16V4Z

12

RL4
300_0402_5%

RTL8401-GR_QFN48_6X6

R1034

+3V_LAN
1

PR3+

RJ45_MIDI0-

+3V_LAN

close pin 19
1

PR3-

4
RJ45_MIDI1+

+EVDD12_8401

PR2-

26 RJ45_MIDI1+

R824
100K_0402_5%
1
2

1 3.6K_0402_5%

30

EPAD
R1049 2

PR4+

DETECT PIN1

LED2/EEDI

2 1K_0402_5%

RJ45_MIDI1-

RJ45_MIDI1-

16

SHLD1
PR4-

@ R1046 1

Yellow LED-

EECS

49

R1048
15K_0402_5%
1

IBREF(REST)

Y8

+VCC_4IN1_R

ISOLATEB

22

2 2

R1047
1K_0402_5%

XTAL1
XTAL2

Yellow LED+

14

1
1

23
24

13

C485
0.1U_0402_16V4Z

C1265
C1264

CKXTAL1
CKXTAL2

LANLED_ACT#

CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_RXP3
PCIE_RXN3
PCIE_TXP3
PCIE_TXN3

CL13
0.1U_0402_16V4Z

12 CLK_PCIE_LAN
12 CLK_PCIE_LAN#
12
PCIE_RXP3
12
PCIE_RXN3
12
PCIE_TXP3
12
PCIE_TXN3

LANWAKEBPIN
ISOLATEBPIN
REFCLK_P
REFCLK_M
HSOP
HSON
HSIP
HSIN
PERSTBPIN
CLKREQBPIN

2 27P_0402_50V8J

+3V_LAN

35
36
17
18
20
21
15
16
37
38

ICH_PCIE_WAKE#
ISOLATEB

13,24 ICH_PCIE_WAKE#

C1261 1
2

HV33

U9

JRJ45
RL2
300_0402_5%
2
1

LAN_ACTIVITY#

DVDD3

27

+DVDD33

C1042 1
C1046 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

RD+
RDCT
NC
NC
CT
TD+
TD-

RX+
RXCT
NC
NC
CT
TX+
TX-

16
15
14
13
12
11
10
9

RJ45_MIDI0+
RJ45_MIDI0RJ45_CT0
RJ45_CT1
RJ45_MIDI1+
RJ45_MIDI1-

C1041 1
C1039 1

2 0.01U_0603_100V7-M RJ45_CT0_C
2 0.01U_0603_100V7-M RJ45_CT1_C

1
1

R822
75_0402_1%
2
2

RJ45_GND

R821
75_0402_1%

C1045

NS681680

Compal Secret Data

Security Classification

7IN1 GND
7IN1 GND

http://mycomp.su/x/

LAN_CT1
LAN_MDI1+
LAN_MDI1-

1
2
3
4
5
6
7
8

1000P_1206_2KV7K

Issued Date

TAITW_R015-B10-LM
CONN@

LAN_MDI0+
LAN_MDI0LAN_CT0

2007/08/28

Deciphered Date

2006/10/06

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

USB CardReader&CONN

Size Document Number

Custom
Date:

Rev
1.0

Calpella_UMA_LA4106P

Thursday, November 12, 2009

1

Sheet

25

of

45

Atlas/ Saturn Dock

+3VALW

R1093 1 PA@

PA@
D45
2 1K_0402_5%

2
1

R1094 1

2 1K_0402_5%

DOCK_PWRON

PA@

25
25
25
25

RJ45_MIDI1RJ45_MIDI1+
RJ45_MIDI0RJ45_MIDI0+

RJ45_MIDI1RJ45_MIDI1+
RJ45_MIDI0RJ45_MIDI0+

+V_BATTERY

PA@
R1095
10K_0402_5%
B+

2
G
PA@Q89
2N7002_SOT23-3

SYSON#

DAN202U_SC70

33,39

@
1

45
46

GND
GND

Digital gnd
TV Luma
TV chroma
TV composite
TV ground
CIR input
PWR_ON
Mute_LED
Sleep Botton
Jack Detect
VOL_up
VOL_down
SPDIF
Audio Output gnd
Right headphone
Left headphone
Mic_Right
Mic_Left
Mic gnd
Dock_present

39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

GND
GND
GND
GND

41
42
43
44

PJP902
2
PAD-OPEN 2x2m

R1185
10K_0402_5%
VGA_GND
CIR_IN
CIR_IN 28,31
DOCK_PWRON
D_MUTE_LED
R1089 1 PA@
2 33_0402_5%
D_DOCK_SLP_BTN#
R1090 1 PA@
2 33_0402_5%
JACK_DET#
R_VOL_UP#
R1091 1 PA@
2 200_0402_5%
R_VOL_DWN#
R1092 1 PA@
2 200_0402_5%
SPDIFO_L
AUDIO_OGND
GNDA
DOCK_LOUT_C_R
DOCK_LOUT_C_R 27
DOCK_LOUT_C_L
DOCK_LOUT_C_L 27
DOCK_MIC_R_C
DOCK_MIC_L_C
AUDIO_IGND
GNDA
DOCK_PRESENT
R1096 1
2 2K_0402_5%
@
+DOCKVIN

CRT_Red
CRT_Green
CRT_Blue
DDC_DATA
DDC_Clock
Hsync
Vsync
USBUSB+
Digital gnd
MDI3MDI3+
MD2IMDI2+
MDI1MDI1+
MDI0MDI0+
Battery out
Battery out

38
40
34
36
30
32
26
28
22
24
18
20
14
16
10
12
6
8
2
4

MUTE_LED 31
DOCK_SLP_BTN# 31
JACK_DET#
27
DOCK_VOL_UP#

DOCK_VOL_UP# 31
DOCK_VOL_DWN# 31

DOCK_VOL_DWN#

+DOCKVIN

CONN@ FOX_QL1122L-H212AR-7F

C1296 1
@

2
1000P_0402_50V7K

C1297 1
@

2
1000P_0402_50V7K

Dock
PRESENT

MIC_Dock

1
2
L65 PA@
FBM-11-160808-601-T_0603
PA@
C1303
220P_0402_50V7K

27 DOCK_MIC_L

DOCK_MIC_L_C
1

2
1

1
2
B

2
B

GNDA

Q91
2N7002_SOT23-3

SPDIFO_L

GNDA

Q92
MMBT3904_NL_SOT23-3

C1305 PA@

1
2
0_0603_5%

GNDA

R1103
1
2
220_0402_5%

SPDIF_OUT 27

0.1U_0402_16V7K
1
PA@
C1307
220P_0402_25V8J

1
1U_0603_10V6K

Compal Secret Data

Security Classification

http://mycomp.su/x/

C1300

PA@
PA@
R1106

E
2
PA@
C1306

Issued Date

PA@

PA@
E

PA@
R1105
47K_0402_5%

SENSE_B# 27

2
G

1
1

C1299

C1302

R1104
1
2
10K_0402_5%

DOCK_MIC_L_C

PA@
PA@

PA@
C1304
220P_0402_50V7K

PA@
R1100
10K_0402_5%

PA@
Q94
MMBT3904_NL_SOT23-3

DOCK_LOUT_C_R
DOCK_LOUT_C_L
1
PA@

GNDA GNDA

+3VS

PA@
R1101
10K_0402_5%

PA@
C1301

0.01U_0402_16V7K

27 DOCK_MIC_R

PA@

L64 PA@
FBM-11-160808-601-T_0603
DOCK_MIC_R_C
1
2

2007/08/28

Deciphered Date

2006/03/10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

PA@
R1107
110_0402_5%
2

Q90
DMN5L06K-7_SOT23-3

PA@
R1099
2K_0402_5%

22_0402_5%

PA@
2
G

R1098 PA@
2

Need 600 Ohm 500 mA

1000P_0402_50V7K

R_VOL_UP#
R_VOL_DWN#

CONA#

1000P_0402_50V7K

R1097
10K_0402_5%

DOCK_PRESENT

PA@
C1298
1000P_0402_50V7K

GNDA

+3VL

31

R1186
10K_0402_5%

RED
GREEN
BLUE
D_DDCDATA
D_DDCCLK
D_HSYNC
D_VSYNC
USB20_N3
USB20_P3

RED
GREEN
BLUE
D_DDCDATA
D_DDCCLK
D_HSYNC
D_VSYNC
USB20_N3
USB20_P3

0.01U_0402_16V7K

+5VS

20
20
20
20
20
20
20
14
14

+3VS

JDOCK1

DOCK_PWR_ON Spec
0V = Notebook S4/S5,
Dock off
2.5V = Notebook S3,
Dock on
4V = Notebook S0,
Dock on

Compal Electronics, Inc.

DOCK CONN.

Size Document Number

Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Rev
1.0
Sheet

26

of

45

DMIC_CLK
DMIC_DAT
31 EAPD_CODEC
SPDIF_OUT

HDA_SYNC

HDA_RST#_CODEC

11

HDA_RST#

R679 1
R446 1

2 100_0603_5%
2 0_0603_5%

R910 1

2 0_0402_5%

2
4
46
48

R908 1

2 10K_0402_5% 47

DMIC_CLK/GPIO1
DMIC0/GPIO2

C1069
4.7U_0603_6.3V6M

36

CAP+

7
33
30
26

1
C1434
100P_0402_50V8J

1
2
2

HP_OUT_L
HP_OUT_R

PORT_C_L
PORT_C_R
VREFOUT_C

19
20
24

MIC_INL
MIC_INR
+VREFOUT_INMIC

SPKR_PORT_D_L+
SPKR_PORT_D_L-

40
41

SPKL+
SPKL-

SPKR_PORT_D_RSPKR_PORT_D_R+

43
44

SPKRSPKR+

PORT_E_L
PORT_E_R

15
16

DOCK_MICL
DOCK_MICR

PORT_F_L
PORT_F_R

17
18

PC_BEEP

12

MONO_OUT

25

CAP2

22

VREFFILT

21

42

PVSS

V-

34

49

DAP

VREG

37

+VDDA_CODEC

OPP@
C1328 1
C1329 1
OPP@

SPKRSPKR+

28
28

SPKR

Port E

DOCK MIC

Port F

EXT. MIC

DM0

Digital MIC

PA@R1116
PA@
R1116

PA@
R1117
1.21K_0402_1%

1/10*Vin
need close to
Codec

1.21K_0402_1%

Internal SPKR

DOCK_MIC_L 26
DOCK_MIC_R 26

MIC_EXT_L 28
MIC_EXT_R 28

92HD80 Resistor define

SENSE_B
Resistor SENSE_A

DOCK_MIC

Ext MIC

39.2K

Port A

HP1

20.2K

Port B

Port F

10.0K

Port C

DMIC0

5.11K

SPDIFOUT0

SPDIFOUT1

2.49K

PU to AVDD

Port E

PU to AVDD

+AVDD_CODEC

R909
10K_0402_5%

MONO_IN

R447 2

1 47K_0402_5%

C1070 1

2 0.1U_0402_16V4Z

SHDN

BYP

1
@
R1228
0_0402_5%

G9191-475T1U_SOT23-5

2.2U_0805_16V4Z

C1445

Q38
2N7002_SOT23-3 S

2
G

SB_SPKR

C1446

C983

2 0.1U_0402_16V4Z

0.1U_0402_16V4Z

C984

2 0.1U_0402_16V4Z

C985

2 0.1U_0402_16V4Z

C986

2 0.1U_0402_16V4Z

+3VS

13
14
15
16
17
18

H14
HOLEA

HDA_BITCLK_MDC 11
2
@ R1132
10_0402_5%

1
2
@C1335
@
C1335
10P_0402_25V8K

@
C1334

+3VS

+3VS

4.7U_0805_10V4Z

+1.5VS
C1333

2
0_0603_5%
2
0_0603_5%

0.1U_0402_16V4Z

2
4
6
8
10
12

GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
GND
GND
GND
GND
GND
GND

HDA_SYNC_MDC
2 HDA_SDIN1_MDC
33_0402_5%

1
3
5
7
9
11

C1332

@ 1
R475
1
R1130

1000P_0402_50V7K

HDA_SDOUT_MDC

SB_SPKR 11
3

R754 1

2 0_0603_5%

C1435

2 0.1U_0402_16V4Z

C1436

2 0.1U_0402_16V4Z

C1437

2 0.1U_0402_16V4Z

GND

GNDA

26,28

GNDA

ACES_88018-124G
4

Connector for MDC Rev1.5

Int. MIC

2 10K_0402_5%
2 10K_0402_5%

INT. MIC

Port D

OUT

CONN@
4

HP Jack

MIC_IN_L 28
MIC_IN_R 28
28
28

HP

Port C

GND

JP8

H12
HOLEA

HP_OUT_L 28
HP_OUT_R 28

SPKL+
SPKL-

Port B

DOCK_MICL_C
DOCK_MICR_C

+VREFOUT_INMIC 28

PA@1U_0603_10V6K
DOCK_MICL_C
C1317 1
PA@ R1114 1
2
DOCK_MICR_C
C1318 1
PA@ R1115 1
2
PA@
1U_0603_10V6K
MIC_EXTL
MIC_EXT_L
C1326 1
2 2.2U_0603_6.3V4Z
MIC_EXTR
MIC_EXT_R
C1327 1
2 2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
MONO_INR 2
MONO_IN
1
C561

MDC 1.5 Conn.

1
R1131

Dock HP
Jack

R449
10K_0402_5%

1102_Reserve CODEC LDO for Codec.

11 HDA_SYNC_MDC
11 HDA_SDIN1
11 HDA_RST#_MDC

DOCK_LOUT_C_L 26
DOCK_LOUT_C_R 26

MIC_IN_L
MIC_IN_R

IN

11 HDA_SDOUT_MDC

150U_Y_6.3VM
1
2
1
2

2 2.2U_0603_6.3V4Z
2 2.2U_0603_6.3V4Z

C562
0.1U_0402_16V4Z

SUSP#

2
0.1U_0402_16V4Z

CODEC POWER
(4.75V)
300mA

PA@
C1330
C1331
PA@

1
1
1
1

U59

24,31,33,35,38,39

SENSE_A
SENSE_B

92HD80 port define

Port A
DOCK HP

2.49K_0402_1%
+AVDD_CODEC
39.2K_0402_1% JACK_DET#
JACK_DET# 26
20K_0402_1% HP_DET#
HP_DET# 28
10K_0402_1% INTMIC_DET#
INTMIC_DET# 28
1000P_0402_50V7K
2
2 2.49K_0402_1%
+AVDD_CODEC
2 39.2K_0402_1% SENSE_B#
SENSE_B# 26
2 20K_0402_1% EXTMIC_DET#
EXTMIC_DET# 28
1000P_0402_50V7K
2
2
2
2
2

150U_Y_6.3VM

AVSS
AVSS
AVSS

+5VALW

W=40Mil

1
1
1
1

DVSS

92HD80B1X5NLGXYD38_QFN48_7X7~D

C1444

DOCK_LOUT_L
DOCK_LOUT_R
+VREFOUT_EXTMIC

31
32

EC_MUTE#
CAP-

SENSE_A
SENSE_B

13
14

HP1_PORT_B_L
HP1_PORT_B_R

EAPD

35

28
29
23

DMIC1/GPIO0/SPDIF_OUT_1
SPDIF_OUT_0

39
45

HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_or_F

+3VS

HDA_RST#_CODEC

C1433
0.01U_0402_25V7K

HDA_SDO

10

2
R1212
4.7K_0402_5%

HDA_SDI

HDA_SYNC_CODEC

SPDIF_OUT
+3VS

28,31 EC_MUTE#

HDA_BITCLK

R438
PA@R439
PA@
R439
R598
R440
C556
R254
PA@R257
PA@
R257
R256
C555

SENSE_A
SENSE_B

R435
4.7K_0402_5%

MIC_EXT_L

R444
1
2 HDA_SDIN0_CODEC
33_0402_5%
HDA_SDOUT_CODEC

PVDD
PVDD

27
38

MIC_EXT_R

1105_Reserve 1230.

11,31 HDA_RST#_CODEC

+3VS

DVDD_IO

AVDD
AVDD

R434
4.7K_0402_5%

11 HDA_SDOUT_CODEC

3
HDA_BITCLK_CODEC

11 HDA_SYNC_CODEC

+5VS

+VREFOUT_INMIC

1U_0603_10V4Z

11 HDA_SDIN0

26

+ +

11 HDA_BITCLK_CODEC

DVDD

C1068
10U_0805_10V4Z

@R441
@
R441
2
1
47_0402_5%

DVDD_CORE

C1067
1U_0402_6.3V6K

1 10U_0805_10V4Z
1

C1066
0.1U_0402_16V4Z

@ C554
2
1
33P_0402_50V8K

21
21

+VDDA_CODEC

C546 1

R1227
MCK2012102YZF_0805

C564
1U_0603_10V6K

C1065

1 0_0805_5%

C1064
1U_0402_6.3V6K

1
U22

C1063
0.1U_0402_16V4Z

C563
10U_0805_10V4Z
1
2

1102_Reserve 4.7uF.

R904 2

C1072
10U_0805_10V4Z

2 0_0603_5%

C1443
4.7U_0805_10V4Z
2
1

C1071
4.7U_0603_6.3V6M

R907 1

C551
0.1U_0402_16V4Z

+3VS_HDA

+AVDD_CODEC

@ R1226
@R1226
0_0805_5%
2
1

+AVDD_CODEC

C976
0.1U_0402_16V4Z

+3VS

+VREFOUT_EXTMIC

@ R1229
0_0805_5%

+3VS_DVDD

R437
BLM18BD601SN1D_0603
2
1

C553
1U_0402_6.3V6K

+3VS

+5VS

1105_Reserve the others +5VS power for Codec.

@ R431
2
1
1K_0402_5%
R1225
2
1
1K_0402_5%
@ R1230
2
1
1K_0402_5%

1102_Reserve LDO power for Codec.

MDC Standoff
Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
A

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

Codec_IDT92HD80
Size Document Number
Custom
Date:

Rev
1.0

Calpella_UMA_LA4106P
Sheet

Thursday, November 12, 2009

E

27

of

45

1103_Reserve 0.1uF between GND and GNDA.

@ C1447
0.1U_0402_16V4Z
1
2

SPEAKER
1

INTMIC IN

R1125

2 OPP@ 1
R1129 10K_0402_5%

MIC_IN_L
2

MIC_IN_R
2

Audio connector

OPP@
D60
PACDN042_SOT23~D

GND1
GND2
ACES_88231-04001
CONN@
2

5
MIC_EXT_R
MIC_EXT_L

1
6
1
4

OPP@
D62
PACDN042_SOT23~D
1

Q32A
2N7002DW-7-F_SOT363-6

Q28A
2N7002DW-7-F_SOT363-6
1
6

5
6
OPP@
Q20B

@
D61
PACDN042_SOT23~D

Audio/B & CIR

JP49

27
27

Q32B
2N7002DW-7-F_SOT363-6

6
27,31 EC_MUTE#

2N7002DW-7-F_SOT363-6
Q39A

R76
10K_0402_5%
@

Q28B
2N7002DW-7-F_SOT363-6
3
4

+5VALW

HP_OUT_R

OPP@
Q20A

1
2
3
4

2N7002DW-7-F_SOT363-6
1
6

INTMIC_DET#

JP51
1
2
3
4

MIC_IN_L
MIC_IN_R

0_0402_5%

MIC_IN_L
MIC_IN_R

27

R401
OPP@1

27
27

1K_0402_5%
R1127
4.7K_0402_5%
OPP@

D16 @
PSOT24C_SOT23-3

HP_OUT_L

27 +VREFOUT_INMIC

+3VS

HP de pop circuit

OPP@ +AVDD_CODEC
C1323
1U_0603_10V4Z
1
2
OPP@
OPP@
R1126
R1128
10K_0402_5%
4.7K_0402_5%

OPP@
+VREFOUT_INMIC

ACES_88231-04001
CONN@

4
3
2
1

D15 @
PSOT24C_SOT23-3

GND2
GND1

4
3
2
1

2N7002DW-7-F_SOT363-6
4
3

2
2

SPK_RSPK_R+
SPK_LSPK_L+

1
1

C572
330P_0402_50V7K

0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%

2
2
2
2

1
1
1
1

R454
R455
R456
R457

C571
330P_0402_50V7K

SPKRSPKR+
SPKLSPKL+

SPKRSPKR+
SPKLSPKL+

C569
330P_0402_50V7K

27
27
27
27

C570
330P_0402_50V7K

JP60
6
5

MIC_EXT_R
MIC_EXT_L

27 HP_OUT_R
27 HP_OUT_L
27
27

EXTMIC_DET#
HP_DET#

26,31

MIC_EXT_R
MIC_EXT_L
HP_OUT_R
HP_OUT_L
EXTMIC_DET#
HP_DET#
CIR_IN

CIR_IN
+5VL

1
2
3
4
5
6
7
8
9
10
11
12
13
14

1
2
3
4
5
6
7
8 G1
9 G2
10
11
12
13
14

15
16
3

ACES_87213-1400G
CONN@

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
A

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

AMP & Audio Jack

Size Document Number
Custom
Date:

Rev
1.0

Calpella_UMA_LA4106P

Thursday, November 12, 2009

Sheet
E

28

of

45

Left\ side ESATA/USB combination

Connector
+USB_VCCC

+5VALW

Left side USB Power

Switch
W=100mils

14
14

8
7
6
5

G547F2P81U_MSOP8
2

1
+
2

C600
0.1U_0402_16V4Z

USB_EN#

OUT
OUT
OUT
OC#

C598
150U_B_6.3VM_R40M

C599
4.7U_0805_10V4Z

GND
IN
IN
EN#

JP53
1
2
3
4

USB20_N0_R
USB20_P0_R

2 0_0402_5%
2 0_0402_5%

+USB_VCCC

U24

1
2
3
4

R479 1
R480 1

USB20_N0
USB20_P0

11
11
1

5
6
7
8
9
10
11

SATA_TXP4
SATA_TXN4

SATA_TXP4
SATA_TXN4

1 0.01U_0402_16V7K SATA_RXN4
1 0.01U_0402_16V7K SATA_RXP4

C602 2
C603 2

11 SATA_RXN4_C
11 SATA_RXP4_C
C601
1000P_0402_50V7K

USB

VBUS
DD+
GND

GND
A+
ESATA
AGND
BB+
GND

12
13
14
15

GND
GND
GND
GND
TYCO_1759576-1
CONN@

R481

2 10K_0402_5%

+5VALW
D21
+5VALW

WCM-2012-900T_0805
1 1
2 2

USB20_N0
USB20_P0

4
@ L11

SATA_TXN4
USB20_N0_R
USB20_P0_R

VIN

IO1

IO2 GND

SATA_TXP4

PRTR5V0U2X_SOT143-4

D20
4

+5VALW

USB20_N0_R 3

IO1

IO2 GND

VIN

USB20_P0_R

PRTR5V0U2X_SOT143-4

Finger printer
EMI request

ESD request

+3VS

BT
Connector

R1113
1
1

2
0_0603_5%

JP24

R248
USB20_N11_R
USB20_P11_R

2 0_0402_5%
2 0_0402_5%

R599

1
1

USB20_N11
USB20_P11

14
14

CONN@
ACES_87213-0800G
GND 1 1
2 2
USB20_P12_R
3 3
USB20_N12_R
4 4
5 5
6 6
7
7
10 GND 8 8

C301 <BOM Structure>

0.1U_0402_16V4Z

@ R548
1
2
0_0402_5%

@D46
@
D46
PACDN042_SOT23-3~D

1
2
3
4
5
6
7
8

1
2
3
4
5
6
GND
GND

+3VAUX_BT
R250
R249

1 0_0402_5%
1 0_0402_5%

2
2

32

0911_Change Fingerprinter to port11.

JP57
@ D47
4

+5VALW

ACES_85201-06051
CONN@

USB20_P12 14
USB20_N12 14
BT_LED

USB20_N12_R
+3VS

VIN

IO1

IO2 GND

USB20_P12_R

PRTR5V0U2X_SOT143-4
R1121
1

2
Q40

0_0603_5%

+3VAUX_BT

SI2301BDS-T1-E3_SOT23-3
S

JP55

31
14
14

USB_EN#
USB20_N2
USB20_P2

14
14

USB20_N1
USB20_P1

USB_EN#

1
2
3
4
5
6
7
8
9
10

11
12

@
R1123
100K_0402_5%

C293

1
2
3
4
5
6
7
8
9
10

1U_0603_10V4Z 2

C298

+5VALW

USB cable connector for Right

side

0.1U_0402_16V4Z

0.01U_0402_16V7K

14

BT_OFF

R1124 1

2 10K_0402_5%

C299

C300

2
4.7U_0805_10V4Z

C292
1
2
0.1U_0402_16V4Z

GND1
GND2
ACES_87213-1000G
CONN@

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
5

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

USB, BT, eSATA

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
1

29

of

45

SPI ROM => 256K (EC code)

D

+3VL

&U25
U25
20mils

C610
0.1U_0402_16V4Z

Close to EC

1
2
R495 0_0402_5%
1
2
R496 0_0402_5%
1
2
R497 0_0402_5%

FSEL#

31

SPI_CLK

31

FWR#

VCC

VSS

HOLD

SPI_FSEL#

SPI_CLK_R

SPI_FWR#

2
31

MX25L8005M2C-15G SOP 8P
@

SPI_SO 1
R498

FRD#
2
33_0402_5%

FRD#

31

MX25L2005CMI-12G SOP 8P

SP07000F500 S SOCKET WIESON G6179-100000 8P

SPIFLASH
WIESO_G6179-100000_8P

S IC FL 2M MX25L2005CMI-12G SOP 8P
SA00003GM00S IC FL 2M W25X20AVSNIG SOIC 8P

R233

SA00003GK00
(MXIC)

SPI_CLK_R 1

C391
2

33_0402_5%

(WINBOND)

2
22P_0402_50V8J

SPI ROM on PCH => 4M (ME code + System

BIOS)
+3VS
+3VS

&U31
1

R658 1

2 SPI_WP#
3.3K_0402_5%

R659 1

2 SPI_HOLD#
3.3K_0402_5%

C773
0.1U_0402_16V4Z

Close to PCH

SPI_WP#

SPI_HOLD#

R661
11

SPI_SB_CS#

11 SPI_CLK_PCH
11

SPI_SB_CS#

SPI_CLK_PCH 15_0402_5%

SPI_SI

32M AT25DF321-SU SOIC 8P

U31
8

SPI_SI

VCC

@
VSS

W
HOLD
S
C
D

R662
Q

SPI_SO_L 1

AT25DF321-SU SOIC 8P

SPI_SO_R

SPI_SO_R 11

15_0402_5%

S IC FL 32M AT25DF321-SU SOIC 8P

SA000021A00 S IC FL 32M MX25L3205DM2I-12G SOP 8P

SA000031Q00
(ATMEL)
(MXIC)

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
5

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

BIOS ROM

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
1

30

of

45

+3VL_EC

1
+3VL

+3VL_EC
R511
1

+EC_AVCC

R1223
100K_0402_5%

2
0_0805_5%

BDID
PA@
R386
0_0402_5%

2
33_0402_5%

15P_0402_50V8J
14 CLK_PCI_EC
R517

1
0.1U_0402_16V4Z

PCI_RST#

14
EC_SCI#
11,27 HDA_RST#_CODEC

+3VALW

JOPEN

1
R526
10K_0402_5%

PCI_RST#

R525
10K_0402_5%

R523
100K_0402_5%

R522
8.2K_0402_5%

LID_SW#

33

1.05VS_ON 1 @
@R385
R385 2
0_0402_5%

1.05VS_ON
32

+3VL_EC

TP_BTN#
+3VALW

R537 1
OPP@

32 WL_BLUE_BTN

2
0_0402_5%

PA@
R595 1
2
0_0402_5%

26 DOCK_SLP_BTN#

R532
10K_0402_5%

ON/OFFBTN

SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
ESB_CLK_R
ESB_DAT_R
EC_PME#

SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#

EC_ACIN

EC_ACIN

WWAN_POWER_OFF
EC_UTX
EC_URX
ON/OFFBTN
DIM_LED
33
DIM_LED
NUM_LED#
2 4.7K_0402_5%32
NUM_LED#

24 WWAN_POWER_OFF
24 EC_UTX
24 EC_URX
R538 1

PCI_RST#

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2

13
13
14
32

C647
15P_0402_50V8J
1
2

1
C645
0.1U_0402_16V4Z

32,34
32,34
12
12

EC_PME#

13

+3VL_EC

AD

77
78
79
80

C646
0.1U_0402_16V4Z

CRY2

Y6
3

OSC

NC

OSC

122
123

DAC_BRIG
VCTRL
IREF
AC_SET

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F

83
84
85
86
87
88

EC_MUTE#
USB_EN#
I2C_INT
MUTE_LED
TP_CLK
TP_DATA

PS2 Interface

SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0

SPI Flash ROM

97
98
99
109

SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#

CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11

GPI

R527
R528
R529

73
74
89
90
91
92
93
95
121
127

1
2

1
2

http://mycomp.su/x/

PA@

ESB_CLK_R
ESB_DAT_R

0.538V

0.819V

0.875V

R13
LVDS_INV_PWM 13,21

INV_PWM

35
1

2
2
2

110
112
114
115
116
117
118

V18R

124

KB926QFB0_LQFP128_14X14

1020_Add R13 for ATE test.

R519 1
R520 1

SUS_PWR_ACK 13

2 4.7K_0402_5%
2 4.7K_0402_5%

AC_LED# 34

2
0.1U_0402_16V4Z

@C618
@
C618 1

2 100P_0402_50V8J

KSO10

@C619
@
C619 1

2 100P_0402_50V8J

KSO11

@C620
@
C620 1

2 100P_0402_50V8J

KSO14

@C621
@
C621 1

2 100P_0402_50V8J

KSO13

@C622
@
C622 1

2 100P_0402_50V8J

KSO12

@C625
@
C625 1

2 100P_0402_50V8J

KSO3

@C626
@
C626 1

2 100P_0402_50V8J

KSO6

@C627
@
C627 1

2 100P_0402_50V8J

KSO8

@C628
@
C628 1

2 100P_0402_50V8J

KSO7

@C629
@
C629 1

2 100P_0402_50V8J

KSO4

@C631
@
C631 1

2 100P_0402_50V8J

KSO2

@C632
@
C632 1

2 100P_0402_50V8J

KSI0

@C633
@
C633 1

2 100P_0402_50V8J

KSO1

@C634
@
C634 1

2 10K_0402_5%

FRD#
FWR#
SPI_CLK
FSEL#

30
30
30
30

2 100P_0402_50V8J

KSO5

@C635
@
C635 1

2 100P_0402_50V8J

KSI3

@C636
@
C636 1

+5VL

2 100P_0402_50V8J

KSI2

@C637
@
C637 1

CIR_IN
26,28
PCH_TEMP_ALERT# 14
FSTCHG 35
STD_ADP 35
CAPS_LED# 32
BAT_LED# 32
ON/OFFBTN_LED# 32
SYSON
24,32,33,37
VR_ON
40

2 100P_0402_50V8J

KSO0

@C638
@
C638 1

2 100P_0402_50V8J

KSI5

@C639
@
C639 1

C612

2 100P_0402_50V8J

KSI4

@C640
@
C640 1

BATT_OVP

2 100P_0402_50V8J

KSO9

@C641
@
C641 1

100P_0402_50V8J

1
10K_0402_5%

2 100P_0402_50V8J

KSI6

@C642
@
C642 1

2 100P_0402_50V8J

KSI7

@C643
@
C643 1

2 100P_0402_50V8J

KSI1

@C644
@
C644 1

2 100P_0402_50V8J

ADP_ID

For EMI

14" INT_KBD
CON
JP19

LAN_POWER_OFF 25
+3VL_EC

D24
2

1
C648
4.7U_0603_6.3V6K

RB751V_SOD323

R540
10K_0402_5%
D25
2 PCI_SERR#

PCI_SERR# 14

RB751V_SOD323

R541
150K_0402_5%
D26

L27
1
2
0_0603_5%

AC_IN

C651

Issued Date

FRD#
FWR#
SPI_CLK
FSEL#

+3VL_EC

ECAGND

L26
0_0603_5%

KSO15

0_0402_5%

SLP_S4#
SLP_S4# 13
ENBKL
ENBKL
13
EAPD_CODEC
R543
EAPD_CODEC 27
R_LAN_POWER_OFF
2
1
SUSP#
0_0402_5%
SUSP#
24,27,33,35,38,39
PWRBTN_OUT#
PWRBTN_OUT# 13
NMI_DBG#

ACIN

RB751V_SOD323

2
100P_0402_50V8J

35

KSO2

R388 1

2 47K_0402_5%

KSO1

R389 1

2 47K_0402_5%

Deciphered Date

2006/07/26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1

+3VL_EC

ACIN

Compal Secret Data

2007/08/28

1
100K_0402_5%

BDID

33_0402_5%
33_0402_5%
33_0402_5%

11

0.01U_0402_16V7K
ECAGND
2

DOCK_VOL_UP# 26
DOCK_VOL_DWN# 26

+3VL_EC

1
2 0_0402_5%
2 0_0402_5%

0.503V

0.712V

R534
EC_RSMRST#
100
EC_RSMRST# 13
101 R535 1
2
EC_LID_OUT# 12
EC_ON
0_0402_5%
102
EC_ON
36
R536
WL_BLUE_LED#
103
WL_BLUE_LED# 32
PM_PWROK_R
104
1
2
PM_PWROK 13
100_0402_5%
105 BKOFF_R# 2
1 BKOFF#
BKOFF#
21
M_PWROK R504 22_0402_5%
106
M_PWROK 13
TP_LED#
107
PV PWROK sequence issue
TP_LED# 32
108

Security Classification

PA@
1
1

0.436V

33K+/-5%

2 0_0402_5%

1103_Move C652 to near JP59.

R546
R547

18K+/-5%

TP_CLK
32
TP_DATA 32

CIR_IN
PCH_TEMP_ALERT#
FSTCHG
STD_ADP
CAPS_LED#
BAT_LED#
ON/OFFBTN_LED#
SYSON
VR_ON
AC_IN

1
2

ESB_CLK
ESB_DAT

Bee. DIS

EC_MUTE# 27,28
USB_EN# 29
I2C_INT
32
MUTE_LED 26

1
1
1

+3VL_EC

@
R545
4.7K_0402_5%

Bee. UMA

DAC_BRIG 21
VCTRL
35
IREF
35
AC_SET
35

DOCK_VOL_UP#
DOCK_VOL_DWN#

119
120
126
128

PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

2
32
32

PA@
@
R1220
R544
4.7K_0402_5% 4.7K_0402_5%

0.289V

BATT_TEMP 34
BATT_OVP 34
ADP_I
35
ADP_ID
34

R524

+3VL_EC

PA@
R1219
4.7K_0402_5%

0.250V

ME_EN
ACOFF

R530

SM Bus

1
C650
+3VS

0.216V

FAN_PWM 6

NMI_DBG#

+EC_AVCC

+3VS

8.2K+/-5%

SPI Device Interface

XCLK1
XCLK0

C649
15P_0402_50V8J

+5V_TP

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

CRY1

0V

Blade SG

AVCC
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F

68
70
71
72

32.768KHZ_12.5PF_Q13MC14610002
1

V AD_BID max

0V

LVDS_INV_PWM

C624
BATT_TEMP
BATT_OVP
ADP_I
ADP_ID

GPIO

@
R539
20M_0402_5%

@ 22_0402_5%
2 R505
1

INV_PWM
FAN_PWM
ME_EN
ACOFF

63
64
65
66
75
76

DA Output

NC

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

V AD_BID typ

0V

R1224

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

21
23
26
27

BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43

EC_PME#

32 ON/OFFBTN

EC_PME#

PWM Output
MISC

14 PCI_PME#

2
0_0402_5%

CONA#

@ R531
10K_0402_5%

R533 1
@

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

V AD_BID min

+3VL_EC

INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13

26

TP_BTN#

2
1

R521
8.2K_0402_5%

12
13
37
20
38

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
TP_BTN#
CONA#

+3VS

SUSP#

CLK_PCI_EC
PCI_RST#
ECRST#
2
R518
0_0402_5%

1
SYSON

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC &

J1

2
C630

14

2
47K_0402_5%
1

+3VL_EC

1
2
3
4
5
7
8
10

AGND

@ R516

GATEA20
KB_RST#
SIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

69

14
GATEA20
14
KB_RST#
11
SIRQ
11,24 LPC_FRAME#
11,24
LPC_AD3
11,24
LPC_AD2
11,24
LPC_AD1
11,24
LPC_AD0

GND
GND
GND
GND
GND

@ C623
1

VCC
VCC
VCC
VCC
VCC
VCC

2 2.2K_0402_5%
2 2.2K_0402_5%

1
1

11
24
35
94
113

R512
R513

R386

U27
SMB_EC_DA1
SMB_EC_CK1

67

9
22
33
96
111
125

18K_0402_1%
+3VL_EC

Board ID
Blade UMA

Title

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
G1
G2

C617
2

3.3V+/-5%
100K+/-5%

25
26

C616

VCC
R1223

C615
2
2
1000P_0402_50V7K

C614

OPP@
R386

C613

2
2
0.1U_0402_16V4Z

1000P_0402_50V7K

0.1U_0402_16V4Z
1

0.1U_0402_16V4Z
1
1

+3VL_EC

CONN@
ACES_85201-2405

Compal Electronics, Inc.

EC KB926/KB Conn.

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet

31

of

45

System & Caps-Lock LED

D53

White

R1150

System
Power LED

+5VALW_LED

200_0402_5%

ESB_DAT

@ R1158
2

C1344
2

1
5
6

White

QSMF-C16E_AMBER-WHITE
TP_LED#

2
G
Q98
S
2N7002_SOT23-3

+3VL +3VS

TP_LED#

31

On (TP_LED#=L)-> White
Off (TP_LED#=H)-> Amber

TP_DATA
TP_CLK

T/P Board Conn

33_0402_5%

1
2

2
2

15P_0402_50V8J
C652
33P_0402_50V8J

4.7U_0603_6.3V6K

Q100@
SI2301BDS-T1-E3_SOT23-3

2
2

ACES_85201-1005N
CONN@

C1343

5
6

I2C_INT
1

24,31,33,37 SYSON

1
2
3
4

1
2
3
4

TP_CLK
TP_DATA

TP_CLK
TP_DATA

ACES_85201-04051
CONN@

SYSON 2
G

G1
G2

C1347
0.1U_0402_16V4Z

JP23

@ Q101
2N7002_SOT23-3

@ C1348
100P_0402_50V8J

31
31

@ C1349
100P_0402_50V8J

Mini card LED

Keyboard backlight
Conn

ON/OFF Button Connector

+3VS
3

@
1

C1341
15P_0402_50V8J

C1342
2

@ R1153
2

NUM_LED#

1
2

R1211
1

ESB_CLK

2 0_0402_5%
2 0_0402_5%

Cypress

+5V_TP

R1154
10K_0402_5%
2

1 PA@
1

@ R1160
10K_0402_5%

R1151
R1152

3
1
2
3
4
5
6
7
8
9
10
GND
GND

SMB_EC_DA1
OPP@

2 0_0603_5%

JP59
1
2
3
4
5
6
7
8
9
10
11
12

C1340
0.1U_0402_16V4Z

31
NUM_LED#
31,34 SMB_EC_DA1
31 ON/OFFBTN

0_0402_5%
0_0402_5%
FBMA-10-100505-301T 0402
0_0402_5%

+5V_TP
R1159 1

C1339
15P_0402_50V8J

31 ON/OFFBTN_LED#
31,34 SMB_EC_CK1
31
ESB_CLK
31
ESB_DAT
31
I2C_INT

2
2
2
2

+5VALW

R1141
0_0805_5%
OPP@

2 0_0402_5%
2 0_0402_5%

1
1
1
1

D58
PSOT24C_SOT23-3

15P_0402_50V8J

1
1

R1146
R1147
R1148
R1149

33_0402_5%

R1144
R1145

OPP@
SMB_EC_CK1 PA@
ESB_CLK
PA@
ESB_DAT
PA@

0_0805_5%

ENE

OPP@
OPP@

WL_BLUE_LED#

0_0805_5%

31 WL_BLUE_BTN

OPP@ R1175
10K_0402_5%

1103_Change R1448 from 0 ohm to bead.

Move C652 to near JP59.

R1140
1

PA@
2

+5VS_LED
+5VALW_LED

Capacitor Sensor Conn

OPP
AMBER
White D55
OPP@

TP_BTN# 31

AMBER

10K_0402_5%

R1138

HT-F196BP5_WHITE

HDD LED

+3VS

R1137
200_0402_5%
Amber
QSMF-C16E_AMBER-WHITE

AMBER

ON/OFFBTN_LED#

+5VS_LED D54
PA@

+5VS_LED

R1139 @
10K_0402_5%

White

PA

R1136
200_0402_5%
2

Amber

White

Amber

14 HDDHALT_LED#

R1143
200_0402_5%

SATA_LED#

R1142
200_0402_5%

11

SW1
TJG-533-V-T/R_6P
3
1

D52
White

White

Battery
Charge LED

+5VALW_LED

2
200_0402_5%

HT-F196BP5_WHITE

+5VS_LED

BAT_LED#

R1134

+5V_TP

TouchPAD ON/OFF LED

Cap lock

+5VS_LED

470_0402_5%

White

D51
31

HT-F196BP5_WHITE

R1133
1

31 CAPS_LED#

TP ON/OFF

T/P Board (Inculde T/P_ON/OFF)

QSMF-C16E_AMBER-WHITE

White
D50

+5VALW_LED
@ R1155
1

0_0805_5%
G1
G2

5
6

WL_BLUE_LED# 31

JP9
2

1
2
3
4

1
2
3
4

Q99
2N7002_SOT23-3
G1
G2

5
6

29

BT_LED

ACES_85201-04051
CONN@

R1156
100K_0402_5%

2
G

ACES_85201-04051
CONN@

+5VS_LED

ON/OFFBTN
ON/OFFBTN_LED#

1
2
3
4

JP10
1
2
3
4

Lid Switch
Connector
2

24

WW_LED#

RB751V_SOD323
2
WL_BLUE_LED#

2
RB751V_SOD323

JP11

1
2
3
4

1
2
3
4

G1
G2

5
6

ACES_85201-04051
CONN@

Compal Secret Data

Security Classification
2007/08/28

Issued Date

http://mycomp.su/x/
A

D56
1

+3VALW

LID_SW#
1

WL_LED#

D57

C1346
0.1U_0402_16V4Z

31

C1345
10P_0402_50V8J

24

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

Compal Electronics, Inc.

KBD, ON/OFF, SW, CIR

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
E

32

of

45

Q8A
2

R650
1K_0402_5%@

C676
0.1U_0402_16V4Z

C770
0.1U_0402_16V4Z
@

+1.05V to +1.05VS
Transfer @

+VCCP
+1.5VS

2
+1.5VS_CPU

+1.8VS

PJ3 PAD-OPEN 3x3m

1
2

Q103A

1.05VS_ON 2
1

31 1.05VS_ON

2 @
RUNON_1.05VS
1

@
R1164
330K_0402_5%

2 @

@
R1165
1K_0402_5%

PJ2 PAD-OPEN 3x3m

1
2

C1351
10U_0805_10V4Z

+1.5VS_CPU
C

+1.05VS

SI7326DN-T1-E3_PAK1212-8
U54
1
2
5
3

2N7002DW-7-F_SOT363-6

B+

C1353
10U_0805_10V4Z

@
SUSP

R584
470_0402_5%
1

C680
10U_0805_10V4Z

2
RUNON_1.5VS

C679
0.1U_0402_16V4Z

C681
10U_0805_10V4Z

C674
10U_0805_10V4Z

C1352
0.1U_0402_16V4Z

2N7002DW-7-F_SOT363-6

C677
4700P_0402_25V7K

R596
330K_0402_5%

SUSP

2
1

2N7002DW-7-F_SOT363-6

Q9A

10U_0805_10V4Z

6
Q10A
2N7002DW-7-F_SOT363-6

C669

RUNON_3VS

+1.5VS

SI7326DN-T1-E3_PAK1212-8
U30
1
2
5
3

RUNON_5VS

B+

C673
0.1U_0402_16V4Z

1
2

330K_0402_5%

R585
470_0402_5%
SUSP

+1.5V

1
2
3

5
R581

C672
10U_0805_10V4Z

C671
0.1U_0402_16V4Z

C675
330K_0402_5%

+1.5V to +1.5VS
Transfer

+3VS

U29

R583

10U_0805_10V4Z

B+

1
2
3

B+

+3VALW to +3VS
+3VALW
Transfer
SI7326DN-T1-E3_PAK1212-8

+5VS

+5VALW to +5VS
+5VALW
SI7326DN-T1-E3_PAK1212-8
Transfer
U28

@
C1354
0.1U_0402_16V4Z

1021_Change R593 from 470 ohm to 22 ohm.

1105_Change R592 from 470 ohm to 22 ohm.

R591

R593
22_0402_5%

@ R1166
B

SYSON#
S

2N7002_SOT23-3

2
3

2
3
Q7B
SUSP

Q103B

1.05VS_ON 5
4

Q7A

2
G

2N7002DW-7-F_SOT363-6

SUSP

2
6

2
Q11
1

2
3
5

470_0402_5%

Q10B
2N7002DW-7-F_SOT363-6

@ Q8B
SUSP

SUSP

Q9B
SUSP

R592
22_0402_5%

470_0402_5%
2N7002DW-7-F_SOT363-6

470_0402_5%
2N7002DW-7-F_SOT363-6

470_0402_5%

+1.05VS

2N7002DW-7-F_SOT363-6

@ R590

470_0402_5%

+0.75VS

2N7002DW-7-F_SOT363-6

R589

+1.5V

R588

+VCCP

+1.5VS

+3VS

+5VS

Discharge circuit

DIM LED

+5VS

+5VS_LED
@ Q26
SI2301BDS-T1-E3_SOT23-3

+5VS

@ J2
D

1
3

+5VALW

@ J3
3

2
1

1
PAD-OPEN 2x2m

C1350
0.1U_0402_16V4Z

2
DIM_LED#
H17
HOLEA

H18
HOLEA

H19
HOLEC

H20
H11
HOLEC HOLEA
1
1

H16
HOLEA

H15
HOLEA

H10
HOLEA

H9
HOLEA

http://mycomp.su/x/

+5VALW_LED

Q102

24,27,31,35,38,39

H6
HOLEA

SUSP#

H5
HOLEA

2N7002DW-7-F_SOT363-6
4
3
2

H4
HOLEA

DIM_LED

SI2301BDS-T1-E3_SOT23-3

Q6B

H3
HOLEA

2
6
1
H2
HOLEA

31

@
Q27
2N7002_SOT23-3

H1
HOLEA

9,39

2
G

+5VALW

H8
HOLEA

24,31,32,37 SYSON

SUSP

DIM_LED

DIM_LED#

H7
HOLEA

Q6A

100K_0402_5%
2N7002DW-7-F_SOT363-6

100K_0402_5%

PAD-OPEN 2x2m
C670
0.1U_0402_16V4Z

R587

SYSON#

1
R586

26,39

@
R582
10K_0402_5%

+3VL

+3VL

FM1
1

FM2

FM3
1

FM4

Compal Secret Data

Security Classification
2007/08/28

Issued Date

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Title

Compal Electronics, Inc.

DC/DC Interface

Size

Document Number

Rev
1.0

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
1

33

of

45

+3VALW
3

PQ3
TP0610K-T1-E3_SOT23-3
+3VL

BATT

connect to KBC pin97

AC_LED# 31

340K_0402_1%
PR1 1
2

PC5
1000P_0402_50V7K
2
1

PC3
1000P_0402_50V7K

PC4
100P_0402_50V8J
2
1

PD1
PJSOT24CW _SOT323

2
1
PC2
100P_0402_50V8J

PJP1

0
-

PU1A
LM358ADT_SO8

PR5
10K_0402_5%
2
1

BATT_OVP 31

2
1

ADPIN

PL2
SMB3025500YA_2P
2
1

105K_0402_1%
PR6 1
2

PL1
SMB3025500YA_2P
1
2

+DOCKVIN

5
4
3
2
1

VIN

RLZ3.6B_LL34

1
2
PR3
10K_0402_5%

0.01U_0402_25V7K
PC6

5
4
3
2
1

2
ADP_SIGNAL

@1000P_0402_50V7K

499K_0402_1%
PR4 1
2

PD4
PR2
10K_0402_5%

ACES_88334-057N

PR8
2K_0402_5%

2 1

ADP_ID 31
PC12

+5VALW

0.01U_0402_25V7K
PC1

1 PR9
2
100K_0402_5%

VMB
PL3
HCB2012KF-121T50_0805
2
PL4
HCB2012KF-121T50_0805
1
2

PJP2

PJSOT24CW _SOT323

SUYIN_200275MR008GXOLZR

PC8
1000P_0402_50V7K

2
3

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C

PD2

EC_SMD
EC_SMC

PC9
0.01U_0402_50V4Z

PD3
PJSOT24CW _SOT323
1

PR7
604K_0402_1%
1
2

+5VS

CPU

BATT

8
7
6
5
4
3
2
1
GND
GND

8
7
6
5
4
3
2
1
9
10

PH1
10K_TH11-3H103FT_0603_1%

PR14
100_0402_5%

PC10
0.22U_0603_10V7K

PR15
150K_0402_1%

8
-

PR11
150K_0402_1%
PR12
2.37K_0402_1%

+3VL

PR16
6.49K_0402_1%
1
2

35

0
G

+5VALW

BAT_ID

SMB_EC_CK1 31,32

SMB_EC_CK1

EN0_TRIP 36

PR10
200K_0402_1%
1
2

SMB_EC_DA1 31,32

PQ1
SSM3K7002FU_SC70-3

2
G

PU1B
LM358ADT_SO8

PC11
1000P_0402_50V7K

SMB_EC_DA1

PR13
100_0402_5%

PR17
1K_0402_5%

BATT_TEMP 31

Compal Secret Data

Security Classification
Issued Date

http://mycomp.su/x/
A

2007/05/29

Deciphered Date

2008/05/29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

Compal Electronics, Inc.

DC Connector/CPU_OTP

Size

Document Number

Rev
0.3

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

D

Sheet

34

of

45

P4

B+

BATT
VIN

P2

26

DH_CHG

25

LX_CHG

24

REGN

23

PC130
270P_0402_50V7K

DPMDET

3
2
1

CELLS

20

19

18

17

16

21

47K_0402_5%
PR119
BAT_ID

2
G

34

BATT

S
SRP

1
2

PC122
@0.1U_0603_25V7K

31

PR121
200K_0402_1%

IREF

PR120
2
1
133K_0402_1%

PC124
0.1U_0603_25V7K

SRN

PR122
681K_0402_1%
1
2

1VIN_1

PR124
1K_0402_5%
1
2

VIN

PACIN

LM393DG_SO8

PR134
10K_0402_5%

PD103
RLZ4.3B_LL34

FSTCHG#
PR136
60.4K_0402_1%
1
2

2N7002KDW-2N_SOT363-6

PU102A
LM393DG_SO8

PR133
10K_0603_0.1%

PU102B

8
P

PC126
0.047U_0402_16V7K

31

PR127
10K_0402_1%

PR132
100K_0402_5%
2
1

P
G

PR130
2.15K_0402_1%
1
2

PR128
10K_0402_5%
2
1

PR129
10K_0402_1%
2
1

1
2

CHGEN#

PC125
0.1U_0603_25V7K

PR126
100K_0402_1%
+3VL

ACIN

+3VL

PQ112A
O

PC118
0.1U_0402_10V7K

BQ24740VREF

D
PQ111
SSM3K7002FU_SC70-3

1
2

PQ110
AO4468L_SO8

VIN

1
PR135
10K_0603_0.1%

1U_0603_10V6K

+3VL

PR131
133K_0402_1%

PC135
470P_0603_50V8J

PR123
1M_0402_5%
1
2

PR125
47_1206_5%

PC119

PR117
100K_0402_5%
1
2

PC121
100P_0402_50V8J
2
1

PC120
0.22U_0603_10V7K
2
1
2

PC123
0.1U_0402_10V7K

PD104
1SS355_SOD323-2

SRP

SRN

BAT

IADAPT

PR118
10K_0402_5%
1
2

ADP_I

22

IADAPT

15

PR116
15K_0402_1%

PGND
SRSET

ISYNSET

14
PR115
100K_0402_1%

VIN

5
6
7
8

DL_CHG

LODRV

3
0.015_1206_1%

31

VIN

PR141
4.7_1206_5%

2 2

EXTPWR

REGN

PR112
1

VADJ

BATT

PL102
10U_LF919AS-100M-P3_5.3A_20%
1
2

PC114
4.7U_0805_25V6-K

PH

VDAC

PQ106
DTC115EUA_SC70-3

PQ108
AO4466L_SO8

PC113
4.7U_0805_25V6-K
2
1

HIDRV

1
2

13

Charge Detector

2
1
PC129
470P_0402_50V7K
2
1

3
2

0.1U_0402_10V7K

PU101
BQ24740RHDR_QFN28_5X5

31

5
6
7
8
PC111
1

RLS4148_LL34-2

PC117
0.1U_0603_16V7K

1000P_0402_50V7K

1
2

PC105
4.7U_0805_25V6-K
PC134
2
1

1
2

1
BST_CHG

ACOFF

PC131
@1000P_0402_50V7K

27

PC136
4.7U_0805_25V6-K
2
1

28

PC116
4.7U_0805_25V6-K
2
1

BTST

PC110
1U_0805_25V6K
1
2

PC115
4.7U_0805_25V6-K
2
1

PVCC

29

VCTRL

PC104
4.7U_0805_25V6-K

1
2

CHG_B+

+3VL

12

VIN

PR105
10K_0402_5%
ACOFF#

ACN

TP

AGND
VREF

PR103
47K_0402_5%
1
2

PR108
10_1206_5%
1
2

CHGEN

3
ACP

5
ACDET

LPREF
10

PC103
4.7U_0805_25V6-K

2
1

PC109
@0.1U_0603_25V7K

3
2
1

3
4

1SS355_SOD323-231

PC102
1U_0603_6.3V6M

IADSLP

BQ24740VREF

VADJ

PR113
140K_0402_1%

PR114
43.2K_0402_1%
1
2

CHG_B+

PD102

5
2N7002KDW-2N_SOT363-6

8
7
6
5

1
PC112
1
2

11

PD101
ACOFF#

8
9

1U_0603_6.3V6M
PQ109B

1
2
3

PL101
HCB2012KF-121T50_0805
2

CHGEN#
7

1
PACIN

PC128
1
2

@180P_0402_50V8J

PACIN_1
PR111
3K_0402_1%
1
2

PR110
0_0402_5%
1
2

SUSP#

PR109
150K_0402_5%

2N7002KDW-2N_SOT363-6

24,27,31,33,38,39

PQ109A

PR140
100K_0402_5%

PC107
@0.01U_0402_16V7K

ACSET

1
3

PQ105
DTC115EUA_SC70-3

0.012_2512_1%
1
2

PC108
0.1U_0603_25V7K

ACSET
1

AC_SET

2
PR106
200K_0402_5%

PQ104
DTA144EUA_SC70-3

PC133
@470P_0402_50V7K
ACDET

PR104
0_0402_5%
1
2

PC106
0.1U_0603_25V7K
2
1

PR102
8
7
6
5

31

PQ103
SI4459ADY
1
2
3

PR101
47K_0402_5%
1
2

PC101
47P_0402_50V8J
PR107
47K_0402_1%
1
2

PQ101
SI4835DDY-T1-E3_SO8
1
2
3

LPMD

8
7
6
5

PC132
@1000P_0402_50V7K

PQ102
FDS6675BZ_SO8

VIN_1

PQ112B

1.24VREF

FSTCHG

2N7002KDW-2N_SOT363-6
4

STD_ADP 31

PU104
4

ACDET

PC127

1.24VREF

ANODE

NC

2
4

LMV431ACM5X_SOT23-5

Compal Secret Data

Security Classification

Issued Date

http://mycomp.su/x/

2007/05/29

Deciphered Date

2008/05/29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Compal Electronics, Inc.

Charger

Size

Document Number

Rev
0.3

Calpella_UMA_LA4106P
Date:

CATHODE
NC

22P_0402_50V8J

1
2

100K_0402_1%
PR138

PR137
20K_0402_1%

REF

31

Thursday, November 12, 2009

D

Sheet

35

of

45

UG_5V

20

LX_5V

12

DRVL2

DRVL1

19

LG_5V

5
6
7
8

PC313
4.7U_0805_25V6-K
PC317
0.1U_0402_25V6
2
1

1
2

PC305
4.7U_0805_25V6-K
2
1

1
2

5
6
7
8
PR316
4.7_1206_5%
2
1

VCLK
18

VREG5

VIN

EN0
13

PL303
10U_LF919AS-100M-P3_5.3A_20%
1
2

RT8205AGQW

+5VALWP
1
+

PC310
150U_D_6.3VM

21

LL1

PR308
PC308
2.2_0402_5% 0.1U_0402_10V7K
BST_5V 1
2 1
2

3
2
1

DRVH1

LL2

UG1_5V

DRVH2

11

1
2

1
2

2VREF_51125

3
2
1

PQ304
AO4712L_SO8

PR318
1
2
0_0805_5%

2
PC312
0.1U_0603_25V7K

B++

PC315
680P_0603_50V8J

VL
PC311
10U_0805_10V6K

EN0_TRIP

+3_5V PWR_OK 13

2N7002KDW -2N_SOT363-6

PC304
2200P_0402_50V7K

10

PQ305B

22

PR309
1
2
1M_0402_1%

3ENTRIP2

6 ENTRIP1
PQ305A
2N7002KDW -2N_SOT363-6

ENTRIP1

VFB1

VREF

VFB2

23

VBST1

PR311
191K_0402_1%
2

34

PGOOD

VBST2

B++

PC314
@680P_0603_50V7K

1
2

PC309
220U_6.3VM_R15

VREG3

PQ302
AO4466L_SO8

PR315
@4.7_1206_5%
2
1

LG_3V

17

UG_3V

24

VO1

16

PL302
3.3UH_SIQB74B-4R7PF_5.9A_20%
2
1

BST_3V

PR306
140K_0402_1%
2

VO2

GND

PR307
2 1
2
0_0402_5%
PC307
0.1U_0402_10V7K
LX_3V

B++

SKIPSEL

AO4932_2N_SO8

+3VALWP

P PAD

TONSEL

25

PU301

UG1_3V

8
7
6
5

1G
1S/2D
1S/2D
1S/2D

15

D1
D1
G2
S2

PC306
10U_0805_6.3V6M

1
2

PC303
4.7U_0805_25V6-K

1
2

PC301
2200P_0402_50V7K
2
1

PQ301

1
2
3
4

PR305
100K_0402_1%
1
2

ENTRIP1

PR304
20K_0402_1%
1
2

ENTRIP2

PR303
20K_0402_1%
1
2

+3VLP

2
PC316
0.1U_0402_25V6

PR302
30.9K_0402_1%
1
2

ENTRIP2

PL301
HCB2012KF-121T50_0805

PR301
13.7K_0402_1%
1
2

14

B++

B+

PC302
1U_0603_16V7

2VREF_51125

+5VL

VL
PJP304

2
PJP302

VL

PR313
100K_0402_5%
PQ307
2
G
SSM3K7002FU_SC70-3

+5VALW P

PAD-OPEN 2x2m

+5VALW

(4.5A,180mils ,Via NO.= 9)

+3VALW P

EC_ON

31

+3VL

+3VLP

PAD-OPEN 4x4m
PJP303

PJP301

2
+3VALW

(3A,120mils ,Via NO.= 6)

1
PAD-OPEN 2x2m

PAD-OPEN 4x4m

100K_0402_5%
PR314

Compal Secret Data

Security Classification
2007/05/29

Issued Date

2008/05/29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://mycomp.su/x/
A

Deciphered Date

Title

Compal Electronics, Inc.

3.3VALWP/5VALWP

Size

Document Number

Rev
0.3

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
E

36

of

45

1.5V_B+

B+

PL402
HCB1608KF-121T30_0603
2
1

PR404

24,31,32,33 SYSON

1
PC406
@0.1U_0402_10V7K

14

+5VALW
LG_1.5V

VBST

3
2
1

+5VALW

PC408
0.1U_0402_25V6

1
2

2200P_0402_50V7K
PC407

1
2

1
2

PQ402
AO4712L_SO8

PC410
4.7U_0805_10V6K

PR410
4.7_1206_5%

PC401

DRVL

PC405
4.7U_0805_6.3V6K

TPS51117RGYR_QFN14_3.5x3.5

3
2
1

PC412
220P_0603_50V8J

220U_B2_2.5VM_R25M

PR402
10K_0603_0.1%

10

PGOOD

11

TRIP
V5DRV

14.3K_0402_1%

VFB

PR403

+1.5VP

PL401
2.2UH_PCMC063T-2R2MN_8A_20%
1
2

5
6
7
8

15
TP

V5FILT

LL

LX_1.5V

PQ401
AON7408L_DFN8-5

1 2

10.2K_0603_0.1%

UG_1.5V

12

FB_1.5V

13

PR401

DRVH

PR407
0_0402_5%
1
2

PC411
1U_0603_10V6K

VOUT

+1.5VP

TON

PGND

PR409
316_0402_1%

+5VALW 1

2
0_0402_5%

+5VALW

1
PR408

GND

EN_PSV

PU401
PR406
255K_0402_1%
1
2 2

UG1_1.5V

PC403
4.7U_0805_25V6-K

PR405
PC409
2.2_0402_5% 0.1U_0402_10V7K
BST_1.5V 1
2
1
2

+1.5VP

PC402
4.7U_0805_25V6-K

0_0402_5%

PJP401

+1.5VP

+1.5V

(8A,320mils ,Via NO.= 16)

PAD-OPEN 4x4m

Compal Secret Data

Security Classification
2007/05/29

Issued Date

2008/05/29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://mycomp.su/x/
5

Deciphered Date

Title

Compal Electronics, Inc.

+1.5VP

Size

Document Number

Rev
0.3

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Sheet
1

37

of

45

+VCCP

1
2

BOOT

PR710
2.2_0603_5%
1
2

+6269_VCC

5
6
7
8

BST_VCCP

13

PQ701
AO4474L_SO8

4
PVCC

12

LG

11

DL_VCCP

PGND

10

PC710
2.2U_0603_6.3V6K
PL701
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2

ISL6269ACRZ-T_QFN16_4X4

2
PR704
10.5K_0402_1%

PQ702

2
PR701
35.7K_0402_1%

2
1
PC714
0.01U_0402_16V7K

3
2
1

7
1
PR715
49.9K_0402_1%
2

FB_VCCP

S TR AON6718L 1N DFN

PC713
680P_0603_50V7K

1
+

PJP701
+1.05V_VCCP

+VCCP

(18A,720mils ,Via NO.= 36)

PJP702

2
PR702
1.58K_0402_1%

2+1.05V_VCCP
PR716
10_0402_5%

2
PAD-OPEN 4x4m

+1.05V_VCCP

PAD-OPEN 4x4m

9 VTT_SELECT

2
1
PC716
6800P_0603_50V7K

PR714
22.6K_0402_1%
2
1

PC715
22P_0402_50V8J

PC712
@0.1U_0402_10V7K

COMP

PR713
0_0402_5%

SE_VCCP 1

ISEN

EN

1
PR712
4.7_1206_5%

VO

FSET

FB

24,27,31,33,35,39 SUSP#

PC719
220U_B2_2.5VM_R25M

FCCM

+1.05V_VCCP

+VCCP
330U 2V Y D2 LESR9M
PC701

PC703
330U 2V Y D2 LESR9M

DH_VCCP

UG

14

15

PR709
0_0402_5%

PC702

VCC

PC709
0.22U_0603_16V7K

+5VALW

330U 2V Y D2 LESR9M

1
2
PR707
2 0_0603_5%

PR711
0_0402_5%
1
2

PC711
2.2U_0603_6.3V6K

2
PR708
2.2_0603_5%

3
2
1

VIN

PHASE

1
+6269_VCC

PGOOD

GND

PU701

16

VCCP_POK

17

PR706
@1K_0402_5%

PR705
1K_0402_5%

DH_VCCP1

+3VS

LX_VCCP

2
1
PC718
4.7U_0805_25V6-K

2
1
PC706
4.7U_0805_25V6-K

2
1
PC705
4.7U_0805_25V6-K

2
1
PC704
4.7U_0805_25V6-K

VCCP_B+
PC708
2200P_0402_50V7K

PL702
HCB2012KF-121T50_0805
1
2
PC707
0.1U_0402_25V6

B+

1
2

VTT_SELECT= Low, 1.1V

VTT_SELECT= High, 1.05V

PR703
PC717
1.96K_0402_1%

2
PR717
0_0402_5%

VTT_SENSE 9
PJP703

@0.1U_0402_10V7K
+1.05V_VCCP

+1.05VS

(8A,320mils ,Via NO.= 16)

PAD-OPEN 4x4m

Compal Secret Data

Security Classification
Issued Date

http://mycomp.su/x/
A

2008/09/15

Deciphered Date

2009/09/15

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

Compal Electronics, Inc.

1.05V_VCCP

Size

Document Number

Rev
0.3

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

D

Sheet

38

of

45

+1.5V

VREF

NC

VOUT

NC

TP

+5VALW

+5VALW
+3VS

PC603
1U_0603_10V6K

26,33

SUSP

2
2

TP

+1.8VSP
1

FB

EN

VOUT

PC608
10U_0805_10V6K

PC610
22U_0805_6.3V6M

PC609
@0.1U_0402_10V7K

GND

VOUT

PR605
0_0402_5%

PR606
15K_0402_1%
2

PC606

PC611
150P_0402_50V8J

PR607
12K_0402_1%
2

9,33
SYSON#

PC605
10U_0805_6.3V6M

SUSP#

VIN

@0.1U_0402_10V7K

PR604
1
@0_0402_5%

PC612
@0.1U_0402_10V7K

PR603
1

PR608
0_0402_5%

2
G

@0_0402_5%

SSM3K7002FU_SC70-3

6 1.5VSCPU_DRAM_PWRGD

24,27,31,33,35,38 SUSP#

2
G

2
PQ602

+0.75VSP

PR602
1K_0402_1%

2
1
PC604
0.1U_0402_16V7K

D
2

PQ601
SSM3K7002FU_SC70-3

PR609
10K_0402_1%

+3VALW

PU602
APL5930KAI-TRG SOP 8P
7 POK

G2992F1U_SO8

VCNTL

PR601
1K_0402_1%

PC607
1U_0603_10V6K
1

NC

VCNTL

GND

VIN

2
1

1
2

1
2

PC601
10U_0805_10V6K

PC602
@10U_0805_10V6K

PU601
D

PJP601
+0.75VSP

+0.75VS

(2A,80mils ,Via NO.= 4)

PAD-OPEN 3x3m

PJP602
+1.8VSP

+1.8VS

(1.5A,60mils ,Via NO.= 3)

PAD-OPEN 3x3m
B

Compal Secret Data

Security Classification
Issued Date

2006/11/23

Deciphered Date

2007/11/23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

http://mycomp.su/x/

Title

Compal Electronics, Inc.

0.75VP/1.8VSP

Size

Document Number

Rev
0.3

Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

1

Sheet

39

of

45

PR228 @1K_0402_5%
1
2

+VCCP

PR229
9

V2N

PC212
0.1U_0402_25V6
2
1

1
2

10K_0402_1%

PR225
1_0402_5%

ISEN2
VSUM+

ISL62883HRZ-T_QFN40_5X5
1

PR238
1

PR241

1_0402_5%
2
+5VALW

2
PR240
412K_0402_1%

9
D

PC223
0.22U_0603_25V7K

1
2

0.22U_0603_10V7K

0.22U_0603_10V7K
PC226
2
1

IMVP_IMON

PR242
10.5K_0402_1%

CPU_B+

VSSSENSE

BOOST_CPU1

VSUM-

PC225
2
1

ISEN1

PC222
1U_0603_10V6K
2
1

ISEN2

0_0402_5%
2

0_0402_5%
2
CPU_B+

PQ201
AO4406AL 1N SO8
PR243
0_0603_5%
2
1

UGATE_CPU1
PR244
2.2_0603_5%
2<BOM Structure>
1

VSUM+

PC229
0.22U_0603_10V7K
1
2

PC228
0.1U_0402_25V6
2
1

PR239

5
6
7
8

PR237
3.01K_0402_1%

1
2
PC220
10P_0402_50V8J

PC204
4.7U_0805_25V6-K
2
1

390P_0402_50V7K
1 PR236 2
1
2
562_0402_1%
PC219

0_0402_5%
PR234

PC203
4.7U_0805_25V6-K
2
1

AGND

PC201
4.7U_0805_25V6-K
2
1

41

11
12
13
14
15
16
17
18
19
20

1
2

PC216
22P_0402_50V8J

PC217
1000P_0402_50V7K

+5VALW

PC227
2200P_0402_50V7K
2
1

30
29
28
27
26
25
24
23
22
21

BOOT2
UGATE2
PHASE2
VSSP2
LGATE2
VCCP
PWM3
LGATE1
VSSP1
PHASE1

PGOOD
PSI#
RBIAS
VR_TT#
NTC
VW
COMP
FB
ISEN3
ISEN2

3
2
1

PR235
8.06K_0402_1%
1

+VCC_CORE

VSUM-

PC224
0.22U_0603_25V7K

1
2
3
4
5
6
7
8
9
10

1U_0603_10V6K

PR233 0_0402_5%

PC215
1U_0603_10V6K
1
2

PC218
2
1

6 H_PROCHOT#

PU201

40
39
38
37
36
35
34
33
32
31

PR232
2
68_0402_5%

CLK_EN#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0

+VCCP

1
PC221
150P_0402_50V8J

2
PR231 147K_0402_1%

ISEN1
VSEN
RTN
ISUMISUM+
VDD
VIN
IMON
BOOT1
UGATE1

0_0402_5%
1
2
PR230
2
1
1K_0402_1%

H_PSI#

PR224
2

PR226
1.91K_0402_1%

VGATE

PR223
3.65K_0603_1%
2
1

LGATE_CPU2

PC208
4.7U_0805_25V6-K
2
1

PR221
4.7_1206_5%

PC202
4.7U_0805_25V6-K
2
1

13,19

PR227
0_0402_5%
1

PC207
4.7U_0805_25V6-K
2
1

5
6
7
8

PL202

LF2

CLK_EN#

0.36UH +-20% MPO104F-R36H1

PQ204
TPCA8036-H_SOP-ADV8-5

PR222
1.91K_0402_1%
1

3
2
1
PR218
0_0603_5%
2
1

PHASE_CPU2

3
2
1

CLK_EN#

19

PC206
4.7U_0805_25V6-K
2
1

1PR207
2
@1K_0402_1%

1 PR204 2
@1K_0402_1%

1PR205
1K_0402_1%

1PR206
2
@1K_0402_1%

1 PR210 2
1K_0402_1%

PC213
0.22U_0603_10V7K
1
2

UGATE_CPU2

2 PR220 1
@1K_0402_1%
+3VS

9 H_DPRSLPVR

2
1
1K_0402_1% PR219 0_0402_5%
1
2

PR215
2.2_0603_5%
2<BOM Structure>
1

BOOST_CPU2

+VCCP

0_0402_5%
1
2
PR217

B+

PC214
680P_0603_50V7K
2
1

VR_ON

1 PR209
1K_0402_1%

PR211
31

1PR202
2
1K_0402_1%

H_VID5
H_VID6

H_VID6

1 PR208
@1K_0402_1%

H_VID5

1PR203
2
@1K_0402_1%

PL203
HCB2012KF-121T50_0805
2
1
PL204
HCB2012KF-121T50_0805
2
1

PQ202
AO4406AL 1N SO8

H_VID4

H_VID4

1PR216
1K_0402_1%

H_VID2
H_VID3

H_VID3

1 PR214
1K_0402_1%

H_VID2

1 PR201 2
@1K_0402_1%

H_VID0
H_VID1

H_VID1

H_VID0

1 PR213
@1K_0402_1%

1 PR212
1K_0402_1%

CPU_B+

PC210
100U_25V_M

+VCCP

PC209
@100U_25V_M

PC205
4.7U_0805_25V6-K
2
1

PC211
2200P_0402_50V7K
2
1

0.36UH +-20% MPO104F-R36H1 30A

3
2
1

PC235
680P_0603_50V7K
2
1

PH201
10KB_0603_5%_ERTJ1VR103J

21

+VCC_CORE
V1N
PR251
1_0402_5%

VSUMB

ISEN1
VSUM+

VSUM-

Compal Secret Data

Security Classification

2007/05/29

Issued Date

http://mycomp.su/x/

Deciphered Date

2008/05/29

Title
Size

Document Number

Rev
0.3

Calpella_UMA_LA4106P
Date:

Compal Electronics, Inc.

+CPU_CORE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
7

@100_0402_1%

10K_0402_1%

LGATE_CPU1

PR250
2

PQ203
TPCA8036-H_SOP-ADV8-5

PR248
3.65K_0603_1%
2

PR246
2.61K_0402_1%
2
1

PR247
4.7_1206_5%

PR255
11K_0402_1%
2
1

LF1

PR256

@1200P_0402_50V7K

0.047U_0603_16V7K

1
2
PC232

1
2
PC231

PC237
330P_0402_50V7K

1
2

PR253
1.3K_0402_1%
1
2

PC238
1

PHASE_CPU1

PC239
0.1U_0402_16V7K

VSSSENSE

0_0402_5%
2

PC230
0.022U_0402_16V7K

1
9

PR252
1

PC236
1000P_0402_50V7K

PC234

1
PC233
330P_0402_50V7K

0_0402_5%

0.01U_0402_25V7K

PR249

VCCSENSE

0.22U_0603_10V7K

PL201
PR245
82.5_0402_1%

Thursday, November 12, 2009

Sheet

40
1

of

45

PR833
0_0402_5%
2
1
PC809
0.22U_0402_6.3V6K

PC807
1U_0603_6.3V6M

GFXVR_IMON

VSS_AXG_SENSE

5
6
7
8

ISUM+
ISUM-

PR807
0_0603_5%
1
2 DH_GFX1

AON6718L 1N DFN

.56UH +-20% ETQP4LR56 W FC 21A

PR811
3.65K_0805_1%

2
PC816
2.2U_0603_6.3V6K

21

3
2
1

VID1

20

VID0

PR810
2.2_1206_5%

PR809
1
2 +5VALW
4
0_0603_5%

VID2

VID3

VID4

VID5

18 DL_GFX
19

17

VCCP

+GFX_CORE

PL801

16 LX_GFX

PR812
0_0402_5%

PH801

2 1
PR815
PC817
2.61K_0402_1%
680P_0603_50V7K

15 DH_GFX

3
2
1

14
BOOT

12

11

13
IMON

VIN

VDD

10
ISUM+

8
RTN

22

1
PR817
8.06K_0402_1%

PC811
0.22U_0603_16V7K

PQ802

23

2
10KB_0603_5%_ERTJ1VR103J

PR818
1
2
11K_0402_1%
PC820
.1U_0402_16V7K
1
2

1
1
1
1
1
1
1
1
1

PR821
PR822
PR824
PR826
PR827
PR828
PR830
PR831
PR832

GFXVR_VID_0 9
GFXVR_VID_1 9
GFXVR_VID_2 9
GFXVR_VID_3 9
GFXVR_VID_4 9
GFXVR_VID_5 9
GFXVR_VID_6 9
GFXVR_EN 9
GFXVR_DPRSLPVR 9

PR823
@100_0402_1%

2
2
2
2
2
2
2
2
2

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

GFXVR_CLKEN#

1
2
PC821
0.1U_0603_16V7K
PR825
3.01K_0402_1%
PR829
82.5_0402_1%
1
2
1
2

GFXVR_PW RGD

PQ801
AO4474L_SO8

PC822
0.01U_0402_16V7K

PC823
@180P 50V J NPO 0402

CLK_EN#

24

PR816
17.8K_0402_1%

25

1 2

PGOOD

+GFX_CORE

2
1
PR819
@1.91K_0402_1%

2
PC818
150P_0402_50V8J

RBIAS

2
1

PC814
100P_0402_50V8J
PC819
22P_0402_50V8J
1
2

1 3

VSSP
LGATE

VID6

VW

26

COMP

VR_ON

2 1

UGATE
PU801
ISL62881HRZ-T_QFN28_4X4 PHASE

28

PR808
47K_0402_1%

FB

1
PR820
@10K_0402_1%

PC815
1000P_0402_50V7K

VSEN

PR814
825K_0402_1%

DPRSLPVR

ISUM

AGND

PC812
330P_0402_50V7K

PR813
10.2K +-1% 0402

PR805
2.2_0603_5%

PC813
330P_0402_50V7K

27

PR806
+GFX_CORE 10_0402_5%
1
2

29

9 VCC_AXG_SENSE

BST_GFX 1

1
2
PC810
1000P_0402_50V7K

9 VSS_AXG_SENSE

PR804
10_0402_5%
1
2

2
1
PR803
22.6K_0402_1%

1 1

PR801
1
+5VALW 2
1_0603_5%

PC808
0.22U_0603_25V7K

PR802
0_0603_5%

1
2

PC806
0.1U_0402_25V6

2
1
PC804
4.7U_0805_25V6-K

2
1
PC803
4.7U_0805_25V6-K

2
1
PC802
4.7U_0805_25V6-K

1
2

GFX_B+

2
1
PC801
4.7U_0805_25V6-K

PL802
HCB2012KF-121T50_0805
1
2
PL803
HCB2012KF-121T50_0805
1
2

B+

PC805
2200P_0402_50V7K

ISUM+
ISUM-

Compal Secret Data

Security Classification
2008/10/31

Issued Date

2009/10/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://mycomp.su/x/
5

Deciphered Date

Title

Compal Electronics, Inc.

VCCGFX

Size
Document Number
Custom Calpella_UMA_LA4106P
Date:

Thursday, November 12, 2009

Rev
Sheet
1

41

of

45

Version Change List ( P. I. R. List ) for Power Circuit

Item Page#
1

Title

Date Request Issue Description

Owner

36

PWR-3.3VALWP/5VALWP

8/12

PWR

40

PWR-CPU_CORE

8/13

40

PWR-CPU_CORE

8/17

39

PWR-0.75VP/1.8VSP

8/20

35

PWR-Charger

8/20

Note

Solution Description
Add PC313,PC305 from 1206 to 0805 and parallel PC313
Change PR253 from 1.1K to 1.3K,Change PR242 from 8.25K to 10.5K
Change PR237 from 2.43K to 3.01K

DB to PV1

PWR

all cap no more than 0805

OCP & IMON ajustment and
Fixed LL to match INTEL Spec

PWR

RF Solution

Change PQ201 PQ202 from AO4474L to AO4406AL

DB to PV1

PWR

Cost Down plan

Change PU602 from APL5915 to APL5930

DB to PV1

PWR

Smart Charger

Change PR113 from 143K to 140K, Change PC117 from 1u to 0.1u, Add PR114

DB to PV1

DB to PV1

38

PWR-1.05V_VCCP

8/24

PWR

Follow HW Suggestion Pull-up

resistor connect to 3VS

Add PR705 connect to 3VS, remove PR706

DB to PV1

37

PWR-1.5VP

8/24

PWR

PU401 second source solution

PR403 from 8.45K to 14.3K

DB to PV1

38

PWR-1.05V_VCCP

8/24

PWR

PU701 second source solution

PR703 from 8.25K to 10.5K

DB to PV1

40

PWR-CPU-CORE

8/28

PWR

Improve transient response

Add PC230

DB to PV1

10

38

PWR-1.05V_VCCP

9/2

PWR

Cost down plan

PQ702 from TPCA8028-H to AON6718L

DB to PV1

11

38

PWR-1.05V_VCCP

9/3

PWR

Improve VCCP Ripple

Delet PC717

DB to PV1

12

41

GFX_CORE

9/11

PWR

Let GFX IMON measure easily

Add PR833 connet to GFXVR_IMON and PU801 13pin

PV1 to PV2

PWR

For HW requirement add

1.5VSCPU_DRAM_PWRGD

Add 1.5VSCPU_DRAM_PWRGD add PR608 connect to PQ601 pin 2 and Delet PR604

13

39

PWR-0.75VP/1.8VSP

9/11

PV1 to PV2

Compal Secret Data

Security Classification
2007/08/02

Issued Date

http://mycomp.su/x/
A

2008/08/02

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Title

Compal Electronics, Inc.

Power Changed-List History-1

Size Document Number

Custom
Date:

Rev
0.3

Calpella_UMA_LA4106P

Thursday, November 12, 2009

Sheet
E

42

of

45

Item

PAGE

01

22

Fixed Issue

Request by
HW

Modify List

Date

Note

Add R801

7/20.

DB --> PV-1

02

26

Fix Volum up/down cannot work on Docking.

HW

Add R1185, R1186 and pull high to +3VS.

7/20.

DB --> PV-1

03

31

Remove double pull high resistor.

HW

Delete R660.

7/20.

DB --> PV-1

04

13

Per EMI request.

EMI

Change R679 from 33 ohm to 100 ohm.

7/20

DB --> PV-1

05

31

Modify correct pull high resistor value.

HW

Change R512 and R513 from 4.7K to 2.2K ohm.

7/20

DB --> PV-1

06

32

Modify LVDS PWM connection.

HW

Connect R890 to PCH and R505(reserve) to EC.

7/24

DB --> PV-1

07

22

Fix cannot hot plug if use Asmedia level shifter.

HW

Remove R862 and R867.

8/13

DB --> PV-1

08

22

Add R1210

8/13

DB --> PV-1

31

Add series for Express card delete signal

between Express card power swtich and PCH
For Board ID.

HW

09

HW

Add R386 and pull low to GND.

8/13

DB --> PV-1

10

31

Change LAN power off control pin to U27 pin115.

HW

Connect U27 pin115 and add series resistor R543 to LAN power control circuit.

8/13

DB --> PV-1

11

31

Change LID switch power rail from +3VL to +3VALW.

HW

Pull high R526 to +3VALW.

8/13

DB --> PV-1

12

31

Delete useless parts.

HW

Delete R542 because already connect EC_UTX to MINI PCIE connector

8/13

DB --> PV-1

13

32

Change LID switch power rail from +3VL to +3VALW.

HW

Change JP11 pin 1 to +3VLALW.

8/13

DB --> PV-1

14

33

For Cost down.

HW

8/13

DB --> PV-1

15

33

Try to use +1.5VS to replace +1.8VS power rail.

HW

Reserve U30, R596, R650, R590, C681, C770, C679, C680, Q8;
add PJ2 to connect +1.5VS_CPU and +1.5VS power plan.
Add and reserve PJ3 to short +1.8VS and +1.5VS_CPU power plan.

8/13

DB --> PV-1

16

14

Modify prevent S3 leakage issue circuit.

HW

Connect PCH_DDR_RST from EC GPIO48 to PCH GPIO46.

8/13

DB --> PV-1

17

31

Modify prevent S3 leakage issue circuit.

HW

Delete R386

8/13

DB --> PV-1

18

21

Fix LCD panel no display issue.

HW

Connect JLVDS1 pin27 to +3VS.

8/13

DB --> PV-1

19

32

Change Cap. board power rail from +3VL to +3VS.

HW

Reserve R1211 and connect to +3VS.

8/13

DB --> PV-1

20

27

Swap Audio port A and F.

HW

Swap port A and port F. Detail please see audio circuit.

8/17

DB --> PV-1

21

Delete XDP connector

HW

Delete JP1, R13, R17, R18, R19, R22, R25, C1

8/17

DB --> PV-1

22

25

Conecto Q15 to +3V_LAN.

HW

Delete R1031 and connect Q15 pin1 to +3V_LAN directly.

8/17

DB --> PV-1

23

26

Modify Audio circuit near docking side.

HW

Connect Q91 pin3 to GNDA and move it near Codec.

8/17

DB --> PV-1

24

27

Per EMI/ESD request.

25

Modify prevent S3 leakage issue circuit.

HW

26

25

Follow DIS.

27

28

28

EMI/ESD

Add R1212/C1433 for HDA_RST#_CODEC. Add C1434. Change R132/R135/R139 to C1435/C1436/C1437.

8/17

DB --> PV-1

8/19

DB --> PV-1

HW

Change U57 from reset IC to AND gate; add R1218 and reserve R383;
add voltage divider(R1216/R1217) for VTTPWRGOOD.
Change Y8 material.

8/19

DB --> PV-1

Per ESD request.

ESD

Add D61, D62 for OPP sku.

8/19

DB --> PV-1

32

Change cap. board power rail from +3VL to +3VS.

HW

Pull high R544 and R545 to +3VS power rail.

8/20

DB --> PV-1

29

14

Make sure PLT_RST# level is stable.

HW

Stuff R185.

8/20

DB --> PV-1

30

32

Reserve +3VL power rail for cap. board.

HW

Add and reserve R1219/R1220 to +3VL.

8/21

DB --> PV-1

Compal Secret Data

Security Classification
2006/02/13

Issued Date

http://mycomp.su/x/
5

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

PIR

Size

Document Number

Rev
1.0

Montevina Consumer Discrete

Date:

Thursday, November 12, 2009

Sheet
1

43

of

45

Item

PAGE

01

Make sure +1.5VS can ramp up early than +0.75VS.

Fixed Issue

Request by

Modify List

Date

Note

HW

Connect 1.5VSCPU_DRAM_PWRGD to enable PU601.

9/11

PV-1 --> PV-2

02

11

ME fuction control enable/disable.

SW/EC

Add Q106, R1221, R1222 and connect to EC pin26.

9/11

PV-1 --> PV-2

03

13

For support ME function.

SW/EC

Connect SUS_PWR_ACK to EC pin76.

9/11

PV-1 --> PV-2

04

14

HM55 disable USB port6/port7.

INTEL

Change Bluetooth port6 to port12, change Fingerprinter port7 to port11.

9/11

PV-1 --> PV-2

05

27

To solve no Vref out when external MIC change from port A to port F.

HW

Reserve R431, add R and connect to +AVDD_CODEC.

9/11

PV-1 --> PV-2

06

27

Delete EC_BEEP from EC because useless.

HW

Delete EC_BEEP to EC.

07

28

Delete ANA_MIC_DET net to EC.because useless.

HW

Delete ANA_MIC_DET to EC.

9/11

PV-1 --> PV-2

08

29

HM55 disable USB port6/port7.

INTEL

Change Bluetooth port6 to port12, change Fingerprinter port7 to port11.

9/11

PV-1 --> PV-2

09

31

Board ID is not enough when use pin81.

EC

Swap TP_BTN# and BDID, then add pull high resistor R1223 for BDID.

9/11

PV-1 --> PV-2

10

31

ME fuction control enable/disable.

SW/EC

Remove EC_BEEP and change to ME_EN, then connect ME_EN to Q106.

9/11

PV-1 --> PV-2

11

31

For support ME function.

SW/EC

Remove ANA_MIC_DET and change to SUS_PWR_ACK, then connect SUS_PWR_ACK to PCH.

9/11

PV-1 --> PV-2

12

31

Chagne ENE cap. board ESB bus power rail from +3VS to +3VL.

HW

Reserve R544/R545 and stuff R1219/R1220.

9/11

PV-1 --> PV-2

13

32

Chagnge Cap. board power rail from +3VS to +3VL.

HW

Reserve R1211 and stuff R1140.

9/11

PV-1 --> PV-2

9/11

PV-1 --> PV-2

14

Compal Secret Data

Security Classification
2006/02/13

Issued Date

http://mycomp.su/x/
5

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

PIR

Size

Document Number

Rev
1.0

Montevina Consumer Discrete

Date:

Thursday, November 12, 2009

Sheet
1

44

of

45

Fixed Issue

Request by

Item

PAGE

01

12

To solve RTL8401 cause BSOD 0xD1 issue.

HW

Change RTL8401 PCIE port from port3 to port5 (follow Rhett2.0), new add series resistor R506/0 ohm.

Modify List

10/19

Date

Delete this item in 10/26.

Note
PV-2 --> MV

02

12

To solve HDMI signal jitter fail issue.

Intel

Add Y2, R131, C141. Change C142 from 0 ohm to 18pF.

10/19

03

19

To solve time too fast in DOS mode.

HW

Change R259 and R260 from 18pF to 22pF.

10/19

PV-2 --> MV

04

25

To solve RTL8401 cause BSOD 0xD1 issue.

HW

Change RTL8401 PCIE port from port3 to port5 (follow Rhett2.0)

10/19

Delete this item in 10/26.

05

31

To solve cannot power on when no CPU insert in ATE test.

HW

Add pull high resistro R13 to +3VL_EC for EC pin21.

10/20

PV-2 --> MV

06

33

To meet Intel power down sequence spec.

HW

Change R593 from 470 ohm to 22 ohm.

10/21

PV-2 --> MV

07

09

To meet Intel power down sequence spec.

HW

Change R1182 from 470 ohm to 220 ohm.

10/21

PV-2 --> MV

08

13

Follow Intel schematic checklist rev2.0 change.

HW

Change R137 from 1K ohm to 10K ohm.

10/21

PV-2 --> MV

09

27

To solve audio noise issue.

HW

Add and reserve U59, R1228, C1443, C1444, C1445, C1446, R1226, R1227.

11/02

PV-2 --> MV

10

04

To solve ESD test fail.

ESD

Add and reserve C1438, C1439, C1440 near Q104.

11/03

PV-2 --> MV

11

17

To solve ESD test fail.

ESD

Add and reserve C1441 near JDIMM1.

11/03

PV-2 --> MV

12

18

To solve ESD test fail.

ESD

Add and reserve C1442 near JDIMM2.

11/03

PV-2 --> MV

13

28

To solve ESD test fail.

ESD

Add and reserve C1447 between GND and GNDA near internal MIC connector.

11/03

PV-2 --> MV

14

32

To solve EMI test fail.

EMI

Change R1148 from 0 ohm to bead (SM01000CY00), move C652 to near JP59.

11/03

PV-2 --> MV

15

32

To solve EMI test fail.

EMI

Move C652 to near JP59.

11/03

PV-2 --> MV

16

27

To solve audio noise issue.

EMI

Move C652 to near JP59.

11/03

PV-2 --> MV

17

27

Reserve ref. power for external MIC.

HW

Reserve R1230 to connect +VREFOUT_INMIC.

11/05

PV-2 --> MV

18

27

To solve GFX power spike when S0 to S3/S5.

Intel

Change R43 from 4.7K ohm to 249 ohm.

11/05

PV-2 --> MV

19

33

To meet Intel power down sequence spec.

HW

Change R592 from 470 ohm to 22 ohm.

11/05

PV-2 --> MV

20

To reduce powr noise from FAN.

HW

Add R597.

11/05

PV-2 --> MV

Compal Secret Data

Security Classification
2006/02/13

Issued Date

http://mycomp.su/x/
5

2006/07/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

PIR

Size

Document Number

Rev
1.0

Montevina Consumer Discrete

Date:

Thursday, November 12, 2009

Sheet
1

45

of

45