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Digital
Digital
Combinational Circuit
When logic gates are connected together to produce a specified output for certain specified combinations of input variables, with no storage involved, the resulting circuit is called combinational logic.
The output variables at all times depend on the combination of input variables.
Example: ~(A*B) and ~(C*D) with an OR gate
Inputs Combinational circuit Outputs
Combinational Circuits
Applications:
Derive the boolean expression for some binary calculation (e.g., addition) Then build the circuit using the various logic gates
Half Adder
Notice that sum computes the same as XOR and carry computes the same as AND We build an Adder using just one XOR and one AND gate
Block diagram
Logic Diagram
Half Adder
Truth table
K-Map
Full Adder
The half adder really only does half the work adds 2 bits, but only 2 bits If we want to add 2 n-bit numbers, we need to also include the carry in from the previous half adder which is possible using full adder circuit. The sum is 1 only if one of x, y and carry in are 1, or if all three are 1, the sum is 0 otherwise The carry out is 1 if two or three of x, y and carry in were 1, 0 otherwise
Full Adder
Full Adder
or
Subtractors
A half-subtractor is a combinational circuit that subtracts two bits and produces their difference.
Half subtractor
Truth table
K-Map
Subtractors
Limitations of half subtractor In multidigit subtraction ,we have to subtract two bits along with the borrow of the previous digit subtraction. Effectively such subtraction requires subtraction of three bits, This is not possible with half-subtractor.
Full Subtractor
A full subtractor is a combinational circuit that performs a subtraction between three bits taking into account borrow of the lower significant stage.
Truth table
K-Map
Full Subtractor
Full Subtractor
Logic diagram
Full Subtractor
Implementation using two half-subtractors and an OR gate
Serial Adder/Subtractor
Two numbers stored in right shift registers A and B can be added serially.
Serial Adder
Parallel Adder
A single full adder is capable of adding two one-bit numbers and an carry.
In order to add binary numbers with more than one bit, additional full adders must be employed. A n-bit, parallel adders can be constructed using number of full adder circuits connected in parallel i.e. the carry output of each adder is connected to the carry input of the next higher-order adder.
Parallel Adder
n-bit parallel adder
Parallel Adder
4-bit binary parallel adder(IC74LS83)
Parallel Subtractor
Subtraction of binary numbers can be done most conveniently by means of complements. Subtaction A-B can be done by taking 2s complement of B and adding it to A. Take 1s complement of B (using an inverter)and add one to LSB pair of bits
Parallel Subtractor
Parallel Adder/Subtractor
The addition and subtraction operations can combined into one ciruit with one
common binary adder using an XOR gate with each full adder. Mode M controls the operation of the circuit. M=0; Adder M=1; Subtractor
When M=0,
When M=1,we have
the input carry being zero, it performs the function of A+B. complemented and a 1 is added through input carry.The circuit performs the operation A plus the 2s Complement of b,i.e., A-B.
Parallel Adder/Subtractor
Comparison-Serial/Parallel Adder
BCD Adder
It is a circuit that adds two BCD digits and produces a sum digit also in BCD. To implement the BCD Adder we require:
4-bit binary adder for initial addition Logic circuit to detect sum greater than 9 One more 4-bit adder to add six in the sum if the sum is greater than 9 or carry is 1. The logic circuit to detect sum >9 can be determined by simplifying the boolean expression of given truth table.
BCD Adder
Y=S3S2+S3S1
Truth table
BCD Adder
Magnitude Comparator
A comparator is a special combinational circuit designed primarily to compare the relative magnitude of two binary numbers. i.e.,(A<B,A=B,A>B).
Depending upon the relative magnitudes of the two number, one of the outputs will be high.
Logic diagram-(Binary-BCD)
Decoders
A binary decoder has n bit binary input and a one activated exactly one of 2n outputs.
one,and only one , of the outputs Y0 to Y3 is active for the given input. If the enable input is 0, then all the outputs are 0.
Encoder
An encoder is a digital circuit that performs the inverse operation of a decoder. An encoder has 2n input lines and n output lines.
In encoder the output lines generate the binary code corresponding to the input value.
Priority Encoder
It is an encoder circuit that includes priority function.
If two or more inputs are equal to 1 at the same time, the input having the highest priority will take precedence. D3-higest priority , D0- lowest priority.
Multiplexers
It is a digital switch. It allows digital information from several sources to be routed onto a single output line.
Normally it has 2n input lines and n output lines. Selection lines are decoded to select a particular AND gate. Multiplexers means many to one. It is also called as data selector because the output bit depends on the input data bit that is selected.
Multiplexers
74xx151 8 to 1 multiplexer
Design of 32x1 MUX using four 8x1 MUX AND 2X4 DECODER
Truth table
MUX implementation
Implementation table
Implementation table
MUX Implementation
Demultiplexers (DEMUX)
It is a circuit that receives information on a single line and transmits this information on one of 2n possible output lines.
The selection of specific output line is controlled by the values of n selection lines. The single input variable Din has a path to all four outputs, but the input information is directed to only one of the output lines.
Demultiplexers (DEMUX)
Function table
Logic diagram