Vi 0v (Logic 0) Vdd (Logic1)

T2 On
Off

T1 Off
On

Output Vdd (Logic 1) 0v (Logic 0)

Inputs A
0 0 1 1

Transistors B
0 1 0 1

Output T1
OFF ON OFF ON 1 0 0 0

T3
ON ON OFF OFF

T4
ON OFF ON OFF

T2
OFF OFF ON ON

Inputs A
0 0 1 1

Transistors B
0 1 0 1

Output T2
OFF ON OFF ON 1 0 0 0

T4
ON ON OFF OFF

T3
ON OFF ON OFF

T1
OFF OFF ON ON

VOHmin: The minimum output voltage in the HIGH state. VIHmin: The minimum input voltage guaranteed to be recognized as a HIGH. VOLmax: The maximum output voltage in the LOW state. VILmax: The maximum input voltage guaranteed to be recognized as a LOW.

CMOS gate can drive large number of gates of other CMOS gates. So fan out of CMOS is very large as compared to TTL. Typically CMOS have fan out 50.

1.

2.
3. 4. 5.

Low power dissipation. High density of fabrication. Higher fan out. Capable of working over wide range of supply voltage. higher noise margin for higher value of Vdd.

1.

Propagation delay longer than those of TTL. Slower than TTL.

2.

It means connecting output of one system to input of another system. If electrical characteristics of two circuits are different then it requires an interface circuit between them.

Parameter
Component Used

TTL
Transis tor, Resisto r and Diode

CMOS
MOSFETS

ECL
Resistors and Transistors

RTL
Resistors and Transistors

I2L
Transistors

DCTL
Resistors and Transistors

Fan Out
Propagation delay Noise margin Power dissipation Basic gate

Modera te
10ns moder ate 10mw NAND

Highest
70ns high 0.1mw NAND/NOR

High
2ns low 40-50mw OR/NOR

low
12 poor 30mw NOR

low
25-100 high 5-20mw NAND

low
10 poor 30mw NOR