Journal of Electronics and Communication Engineering & Journal of Electronics and Communication Engineering & Technology (JECET)ISSN Technology

(JECET)
23474181 (Print), ISSN 2347 419X(Online), Volume 1, Issue 1, July-December(2013)

ISSN 2347-4181 (Print) ISSN 2347-419X (Online) Volume 1, Issue 1, July-December (2013), pp. 01-09 IAEME: http://www.iaeme.com/JECET.asp

JECET

IAEME

FULL-DUPLEX UART APPROACH OVER POWER LINE USING FAMPLC TECHNIQUE

Alireza Nazem1, Mohd Rizal Arshad2
1&2

(Underwater Robotics Research Group (URRG), School of Electrical and Electronic Engineering, Universiti Sains Malaysia, NibongTebal, Pulau Pinang, Malaysia)

ABSTRACT FAMPLC is an approach to real time bidirectional Power Line Communication in remotely controlled applications combining the voltages frequency and the currents amplitude modulations [1]. The square-wave frequency modulated AC Power in one end called the server, supplies the receiver node in another end using a bridge inverter. Data in this mode is carried by the pulse-width and the frequency values. Data transmission from the receiver node to the server is by use of an active resistor as a dummy load. A Thevenin Equivalent Converter (TEC) circuit is embedded in the server to derive the equivalent voltage from the current means. An UART port was successfully established over a dedicated power supply and a remote application as an extended I/O port in ROV application. The result of a full duplex transmission for the remote I/O is also presented. KEYWORDS: FAMPLC, UART over power-line, full-duplex transmission, Frequency and Amplitude combined Modulations 1. INTRODUCTION

FAMPLC is a non-superimposing method in which the power-line is utilized as a communication platform using its parametric values such as Voltage, Current, frequency and duty cycle. A DC to AC inverter is used as the server module to transmit the data over the power line [2].Since the consumer draining current in the regulated DC line is not proportional to the unregulated incoming AC voltage, a full duplex communication may be established between the power supply and the consumer based on each specific layer.Despite the Frequency Modulated Power Supply (FMPS) used in this research to transmit data from the server module to the consumer node, current mode circuitthat is employedto transmit vice versa are described as the circuit whose input and output signals are currents rather than voltage signals [3].Fig. 1 illustrates the genericconcept of this technique for a UART communication. In 2009, Industrial Power Line Communication (IPLC) was presented [4]. This technique uses the power cables of the DC link as transmission medium and thus does not
1

Journal of Electronics and nd Communication Engineering & Technology (JECET)ISSN 23474181 (Print), ISSN 2347 419X(Online), 419X Volume 1, Issue 1, July-December(2013) December(2013)

require any other cable. It was achieved by a coupling unit that couples the data onto the power cables, resulting in reduction of the cabling effort considerably. In comparison to other power line communication methods such as the Frequency Shift Keying (FSK) as a robust modulation technique [5], ], the maximum copper length is limited to typically not longer than 500 meters. In medium voltage power system, multiple multip repeaters peaters with dedicated IDs ID are required to compensate the signal nal drop for longer distances [6]. [6]. In this research, full duplex power line transmission over 1500 meters of copper cable was successfully achieved.

Fig. 1: The fundamental concept of FAMPLC communication. communication

2. 2.1

APPROACH AND METHODS

FM transmission approach In FAM, a DC to low frequency (<1 (< KHz) ) AC inverter embeds the means of transmitting data by changes in the Frequency and the duty cycle of the inverted AC power. The linear characteristics of a multiply conductor cable in base frequencies allows longer distance data transmission [7]. ]. The supplying source source is called, FAM server. Fig.2 Fig. shows the components for FM transmission over the supplying power.

Fig. 2: DC to frequency modulated AC inverter block. block

Journal of Electronics and Communication Engineering & Technology (JECET)ISSN 23474181 (Print), ISSN 2347 419X(Online), Volume 1, Issue 1, July-December(2013)

To extract the data means from the modulated AC power, a pulse-width reading process is performed using an embedded counter in the receivers circuitry. This is also done for the extraction of the data from the current means by the receiver nodes circuitry. The resolution of counts is dependent to the clock speed of the counter. In higher frequencies since the pulse-width interval is reduced, clock gating process may be applied in order of maintaining the accuracy [8]. 2.2 AM transmission approach A dummy active resistance circuitry as shown in the fig. 3 is considered to overlay the data as a current layer besides existing consumers. The Mayer-Norton circuit by use of a bipolar or a uni-junction transistor is considered for this model. The Norton equivalent circuitry [9-10] provides a rail to rail signal conversion from the desired signal that is amplified and shifted over the zero crossing level.Since the value of the variant resistant may drop too low, the transistor is chosen from medium power family thus the bandwidth, and the pulse responds in common collector/drain configuration is considerably crucial.Notable that for an errorless AM transmission using the abovementioned dummy load, a regulatory circuit to stabilize the voltage for other consumers is required right after the active resistance in order to prevent from capacitive damping distortion to the sharp rising and falling pulses edges.

Fig.3: Active resistance as the dummy load. Notable that for an errorless AM transmission using the abovementioned dummy load, a regulatory circuit to stabilize the voltage for other consumers is required right after the active resistance in order to prevent from capacitive damping distortion to the sharp rising and falling pulses edges. A Thevenin Equivalent Converter (TEC) in the server circuitry as illustrated in fig.4 is employed to generate the substitutable voltage means of the draining current [11].

Journal of Electronics and nd Communication Engineering & Technology (JECET)ISSN 23474181 (Print), ISSN 2347 419X(Online), 419X Volume 1, Issue 1, July-December(2013) December(2013)

Fig.4: The embedded TEC circuit in the server unit. To overcome the pulse-width width losses due to sharp rising and falling edges the TEC circuitry can be designed using either fast operational amplifiers or differential current sensing comparators [12]. 2.3 Two-Port Network analysis In TL theory [13], ], a common way to present a Two-Port Port Network (2PN (2PN) as shown in fig. 5, , is to use the transmission matrix, also known as the ABCD matrix.

Fig.5 .5: The concept of a 2PN model.

(V2 , I 2 ) as functions of (V1 , I1 ) , can be expressed as in equation 1. Tb in (1) ) is referred to the backward transmission matrix.

V2

V A B V1 D B V1 1 = = = Tb 1 (1) I 2 C D I1 AD BC C A I1 I1

Journal of Electronics and Communication Engineering & Technology (JECET)ISSN 23474181 (Print), ISSN 2347 419X(Online), Volume 1, Issue 1, July-December(2013)

2.4The Transfer Functions Given 2PN in Fig. 5, the ABCD parameters allow us to calculate the transfer functions as in equation (2) and (3) [14-15-16]:
H S ( f ) = V2 / VS = Z L /( AZL + B + CZS Z L + DZS ) (2) (3) H R ( f ) = (B + CZS Z L + DZS ) / Z S

H S ( f ) and H R ( f ) are the FM and AM transfer functions respectively. Z S is proportional to the dynamic characteristics of the cable such as its umbilical form and/or its released length. Since both Z L and Z S are independently variables, therefore, a sustainable data transmission is obvious to be only proportional to BCD current dependent coefficients in AM mode from the receiver node to the server.
3. UART OVER POWER-LINE

According to fig. 2, the bridge driver is influenced by the processors control pin to generate proportional switching sequences for a square-wave AC. This can be any kind of data such as ASCII codes for an asynchronous serial communication. Since FAMPLC has been initially introduced for bass frequencies, in order to achieve high baud rates, a compensation block has to be added to each layer of transmissions. The Total Harmonic Distortion (THD) [17] in higher frequencies depends on the dynamic characteristics of the transmission layer. The distortion analysis for transmission model shown in fig. 6(a) for an FM transmission can be expressed as in equation 4. 1 (4) VC 2 (t ) = s2 K1e s1t + s1K 2e s 2 t 2 C 0 Where:

s1 = ( s 0 0 s2 1 )

s2 = ( s0 + 0 s 1)

(5)

And:

rL C (6) 2 L is called the exponential damping ratio for the servers transmission line. K1 and K 2 are achievable from two equations of the initial conditions of iC (0) and its time base derivative. Fig. 6(b) demonstrates the consequent effect to the sharp rise and fall edges of the power pulses.

s =

Journal of Electronics and nd Communication Engineering & Technology (JECET)ISSN 23474181 (Print), ISSN 2347 419X(Online), 419X Volume 1, Issue 1, July-December(2013) December(2013)

(a)

(b) Fig. 6: a) The transmission model for UART b) The consequent pulse edge distortion
On the other hand, the AM distortion analysis for current mode transmission results in the expression 7.
iS = LC d 2 iv (t ) rL C div (t ) + + iRn + i AM 2 dt 2 2 dt

(7)

The first and second terms in (7) ( present the distortion interval of the AM transmission. iRn And i AM are the system draining current and the dummy load current respectively. i AM is used to carry y the data means over AM. Fig. 7 shows the TEC output of a test signal in 1000 0 meters of copper cable. VS is the amplified voltage drop across RS . Understanding the edge distortions leads to an overcoming compensation thus, an errorless transmission. Fig. 8 demonstrates a real time full duplex transmission concept in an ROV application.

Journal of Electronics and nd Communication Engineering & Technology (JECET)ISSN 23474181 (Print), ISSN 2347 419X(Online), 419X Volume 1, Issue 1, July-December(2013) December(2013)

Fig. 7: The TEC output illustrating the equivalent voltage means of the total current distortions, system current consumption and the active resistance overlaid current.

Fig. 8: The result of a real time full duplex transmission transmission over the power line.

4.

CALIBRATION

A calibration sequence may be needed to overcome the consequential errors due to the cabling distortion. This is done using a specific pulse-width pulse width once or in ahead of every transmission and depends on the importance of commands. For example, pulse-width pulse Pw with the frequency f and the duty cycle D is defined in boot up sequence of each sequential processor as the reference. reference Comparing the received pulses with Pw by each party enables the CPU for a calibration process to determine the width loss.

Journal of Electronics and Communication Engineering & Technology (JECET)ISSN 23474181 (Print), ISSN 2347 419X(Online), Volume 1, Issue 1, July-December(2013)

5.

CONCLUSION

Understanding the generic concept of the novel technique of FAMPLC theory yields to establish a real time full duplex UART communication over a dedicated power line for control and monitoring of a remote application.It thus eliminate the need of fiber-optic materials and transducers that require serious maintenance and high cost in applications such as Remotely Operated vehicle (ROV).Table 1demonstrates some economical comparison between the herewith discussed technique using a copper cable and the conventional optical method known as a hybrid cable (Copper & fiber-optic).

Table1. Economical comparison of the fibre optic and copper cables

Cable (100 meters) Cost (USD) Winch radius (cm) Weight (Kg) Hybrid >700 >40 >30 Copper <400 <30 <20

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Journal of Electronics and Communication Engineering & Technology (JECET)ISSN 23474181 (Print), ISSN 2347 419X(Online), Volume 1, Issue 1, July-December(2013)

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