Professional Documents
Culture Documents
SP1
D D
100nF C3 VCC
PF[7..0]
C2 100nF AREF VCC
AREF C4
PA[7..0] DECOUPLING CAPACITORS C6
PA[7..0]
100nF AGND CLOSED TO THE DEVICE 100nF
MCU Pin21
PA0
PA1
PA2
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
AVCC
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
D+ D- RESISTORS VCC
Closed to the MCU
AVCC
GND
AREF
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
GND
VCC
PA0
PA1
PA2
UVCON DECOUPLING CAPACITORS
1 48 PA3 CLOSED TO THE DEVICE C5
J1 VCC UVCON PE7 PE6 PA3 PA4 100nF
2 PE7 PA4 47 MCU Pin3
VBUS VBUS R1 22 UVCC 3 46 PA5
1-V_BUS D- UVcc PA5 PA6
2-D- 4 D- PA6 45
D+ 5 44 PA7
3-D+ UGND UGND D+ PA7 PE2
5-GND 6 UGND PE2 43
C R2 22 UCAP 7 42 PC7 C
UCAP VBUS UCAP PC7 PC6
VBUS 8 41
4-ID UID PE3 9
VBUS AT90USB128 PC6
40 PC5 Force Bootloader Execution
SHIELD PB0 PE3 PC5 PC4
10 PB0 PC4 39
USB_MiniABF C7 PB1 11 38 PC3 VCC
1uF PB2 PB1 PC3 PC2
12 PB2 PC2 37
CR1 CR2 PB3 13 36 PC1
PB4 PB3 PC1 PC0 R3
14 PB4 PC0 35
PGB0010603 PGB0010603 PB5 15 34 PE1 47k C8
PB6 PB5 PE1 PE0 220nF
16 33
RESET
XTAL2
XTAL1
PB6 PE0 PE2
GND
VCC
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PB7
PE4
PE5
UGND
R4 0 PC[7..0]
PC[7..0]
SW1
UCAP Capacitor U1 HWB
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Closed to the MCU
PB7
XTAL2
XTAL1
RESET
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE4
PE5
PE0
PE1
PE2
PE3
PE7
PB[7..0]
PB[7..0] PD[7..0]
PD[7..0]
B PE[7..0] B
VCC Reset Circuit VCC
XTAL2 XTAL1 D1
R5
Important Note: Y1 NC 47k C9
K 220nF
U1 is mounted through a TQFP64 ZIF socket NRST
A RESET RESET
C10 8MHz C11
15pF 15pF SW2
INT 0/2 Ext Reset
BAT54/SOT
SP2
Close Solder Pad
To use parallel prog mode
(12V on Reset Pin)
A A
D D
AREF VCC
AGND
PA0
PA1
PA2
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
AVCC
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
AREF
AVCC
GND
GND
VCC
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PA0
PA1
PA2
1 48 PA3
VCC UVCON PE7 PE6 PA3 PA4
2 PE7 PA4 47
UVCC 3 46 PA5
D- UVcc PA5 PA6
4 D- PA6 45
C D+ 5 44 PA7 C
UGND D+ PA7 PE2
6 UGND PE2 43
UCAP 7 42 PC7
VBUS UCAP PC7 PC6
8 VBUS PC6 41
UID PE3 9 AT90USB128 40 PC5
PB0 PE3 PC5 PC4
10 PB0 PC4 39
PB1 11 38 PC3
PB2 PB1 PC3 PC2
12 PB2 PC2 37
PB3 13 36 PC1
PB4 PB3 PC1 PC0
14 PB4 PC0 35
PB5 15 34 PE1
PB6 PB5 PE1 PE0
16 33
RESET
PB6 PE0
XTAL2
XTAL1
GND
VCC
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PB7
PE4
PE5
65 BT
U1b
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
PB7
B B
XTAL2
XTAL1
RESET
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE4
PE5
VCC
U1b is not mounted, it is used as a dual foot print for QFN64 Title
Cpub
R8
D 2k D
R9
JP1 JP2
Q1 C12
1 2 1 2 BC847B 1nF
XTAL1 XTAL2 NRST 10k
STK X1 STK X2
SP3
3.3V STKNC
Important:
Default configuration: open
reserved for future mass storage extension
A A
16
RESET 2 RESET VCC 6 Up 3 U3
3 6 PE4
D WP C15 Right PE5 C16 D
4 VCC
.
PB4 100nF Down VCC
11 CS GND 7 1 Com1 1 C1+ V+ 2
PB1 12 2 PE[7..0] C18
PB2 SCK Com2 100nF
13 SI 3 C1- 100nF
PB3 14 TPA511G 4 6 C20
SO C17 C2+ V- 100nF
AT45DB321C TSOP28 5 C19
Caution DataFlash C2- 100nF
PD[7..0] TTL RS 232
Fix 3V Power supply Only 100nF P1
PD2 RxD 12 13 RS-RxD
. .
1
PD3 TXD 11 14 6
. . RS-TxD SP7 2 11
SP4 RS-CTS 7
PD1 CTS 10 7 3
. .
LEDs RS-RTS 8
PD0 RTS 9 8 4 10
. . SP8
J7 9
In-line Grouped LEDs SP5 5
PF0 GND
.
1
C PF1 2 C
PD[7..0]
15
1k R12 LED 0 (green) PF2 3 MAX3232 SUB-D9 FEMALE
PD4 PF3 4 RS232 BUFFER RS232
TOPLED LP M676 D2
1k R13 LED 1 (green) PF Spare (Not mounted)
PD5
PF[7..0]
TOPLED LP M676 D3 VCC JTAG Interface
1k R14 LED 2 (green) VCC
PF0
PF1
PF2
PD6
R17 DECOUPLING CAPACITOR
TOPLED LP M676 D4 R16 0 CLOSE TO THE CONNECTOR
1k R15 LED 3 (green) 100k CP1 VCC CP2 CP3
PF[7..0] J4
PD7
PF4 1 2 VCC
TOPLED LP M676 D5 PF6
TCK GND
3 TDO VCC 4
R18 PF5 5 6
R19 TMS RESET C21
Temp Sensor 7 VCC n.c. 8
PF7 9 10 100nF
POT 100k TDI GND
B B
CON 2x5
JTAG CON
NCP18WF104J03RB
PB[7..0] Serial ISP
PB2
Microphone Preamplifier Interface Interface
3.3V J5
R23 100k VCC
TP4
PB3 1 2
PB1
PDO VCC
1 3 SCK PDI 4
R24 100k RESET 5 6 C23
R20 R21 C22 220pF R22 RESET GND 100nF
2.2k 100k Mic CON 2x3
100k
ISP CON
RESET
U4A
4
2 -
CLOSE TO THE CONNECTOR
1 6 - R27 0
3 + 7
A 5 +
A
8
100k +
3.3V Title
MIC1 C26
3.3V 100nF Interfaces
1uF
Size Document Number Rev
DECOUPLING CAPACITOR A4 <Doc> 1.0
MICROPHONE CLOSE TO THE DEVICE
Date: Tuesday, January 17, 2006 Sheet 3 of 4
5 4 3 2 1
5 4 3 2 1
JP not mounted,
reserved for future mass storage extension
D in stand alone mode D
VTG 1 2
R34
U5
1k
VBUS 2 IN1 OUT3 6
3 IN2 OUT2 7
R29 8
C27 OUT1 D6 VCC D8
5
GND
100nF OC C28
10k 4 EN LL4148 U6out=1.25*(1+R28/R29) JP6 TOPLED LP M676
4.7uF 3.3V
TPS2041A STK POWER LED(RED)
1 2
1
U6 VBUS VCC
3 4
2 1 3.3V 3.3V 5 6
IN OUT Ext
TPS2041A Vbus Icc limiter optionnal 7 SHDN OUT 4 7 8
1
When Not Mounted Close Solder Pad 8 R35 C30
FAULT 100k 1% JP5 4.7uF
CC 6 VCC Source -
C 3 5 C
D7 GND SET
JP Closed for 3.0<Vcc<3.3
2
LL4148
LP3982 33nF 100k 1% R30
C29 UCAP
R31
124k 1%
U7
3
J6 JP7
VTG
3 1 FDV304P/FAI
U8 STK
2 2 VBUS
1 2 - + 1 5V 3
IN OUT Ext R32 M1
CONNECTOR JACK PWR - 220nF 100nF VBUS gen 10k
Ext Power Supply C32 GND C33
C31
4.7uF LM340
R33
4
3.3V 5V VBUS
A A
STK525 MEZZANINE FOR STK500
Title
POWER