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  • Lab-9 Computer Architecture

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    Asif Hussain
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    This document provides information about a computer architecture lab on designing a FIFO queue. The lab objectives are to design an 8-location FIFO and test bench verification. Details include that FIFOs follow a first-in, first-out principle and are used as temporary storage to absorb timing differences in data transmission and reception. The tasks are to design an 8-location FIFO with inputs like enable, full, empty, read/write and outputs like data in and out, along with a reset signal. Verilog code for the FIFO and test bench are also included to test the design.

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    Digital Designing

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    This document provides information about a computer architecture lab on designing a FIFO queue. The lab objectives are to design an 8-location FIFO and test bench verification. Details include that FIFOs follow a first-in, first-out principle and are used as temporary storage to absorb timing differences in data transmission and reception. The tasks are to design an 8-location FIFO with inputs like enable, full, empty, read/write and outputs like data in and out, along with a reset signal. Verilog code for the FIFO and test bench are also included to test the design.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    39 views11 pages

    Lab-9 Computer Architecture

    Uploaded by

    Asif Hussain
    This document provides information about a computer architecture lab on designing a FIFO queue. The lab objectives are to design an 8-location FIFO and test bench verification. Details include that FIFOs follow a first-in, first-out principle and are used as temporary storage to absorb timing differences in data transmission and reception. The tasks are to design an 8-location FIFO with inputs like enable, full, empty, read/write and outputs like data in and out, along with a reset signal. Verilog code for the FIFO and test bench are also included to test the design.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 11

    Computer Architecture (CS-213)

    Lab Objective
    Lab Test Design of FIFO and its Test Bench Verification

    Solution to LIFO Assignment

    LIFO Waveform

    FIFO queue
    FIFO principle is FIRST IN FIRST OUT = FIFO
    FIFOs are used as temporary storage areas to absorb the time difference between the transmitting speed and the receiving speed In data structures known as queues or in the parts of devices that transmit and receive communication data.

    FIFO

    Lab Task
    Design a FIFO with 8 locations.

    Enable FIFO_Full Data_In ReadWrite FIFO_Empty Clock 8 8 Data_Out

    Reset

    FIFO Verilog Code

    FIFO Verilog Code (Cont)

    FIFO Test Bench

    FIFO Waveform

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