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BOOK: TAUB & SCHILLING

Section:1

Ch 4:
4.1 , 4.2 , 4.3 , 4.4(pull up resistors) , 4.5(fan out
from page) , 4.6(noise margin) , 4.7(RTL buffer from
page) , 4.11(definations) , 4.12(propagation delay
hazards) , 4.13(IIL from material),

Ch5:
5.1 , 5.2(fan out from page) , 5.6 , 5.7 , 5.8

Ch6:
6.1 , 6.2 , 6.3 + 6.7 , 6.4 (whole) , 6.5 , 6.10(only fan
out) , 6.12(i/p diodes & darlington ckts) , 6.13 , 6.14

Ch7:
7.2 , 7.4 , 7.7(fan out) , 7.8 , 7.10 , 7.11(MIMP)

Section:2

Ch8:
8.3 , 8.4 , 8.5 , 8.6 , 8.9(CMOS NAND & CMOS NOR GATE) ,
8.10 , BICMOS inverter (material)

Ch12:
12.1 , 12.3(page & book) , 12.7* , 12.9(last fig.) ,
ROM , PROM , EEPROM , EPROM (from material) , 12.12 ,
12.15(MIMP , 6 transistor , 4 transistor , 3
transistor):MIMP
12.16*

Ch : VLSI , PLA , PLD , FPGA (material)

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