You are on page 1of 6

Bi tp mn Kin trc my tnh

Chng 1. Nhp mn
1. Khi nim h - family sn phm l g?
2. Phn bit khi nim kin trc v t chc my tnh ?
3. Phn bit khi nim cu trc v chc nng cc thnh phn trong my tnh?
4. Chc nng chnh ca my tnh l g? Mi lin h gia cc chc nng ?
5. Nguyn l c bn ch to cc my tnh l g ? Tham s no thng c s dng
phn loi cc th h my tnh? Cc kiu my tnh?
6. Hiu nng my tnh ph thuc vo nhng tham s no? Lm th no nng cao
hiu nng my tnh?
7. Mt my tnh c tn s xung nhp chip l 5GHz thi hnh 1 chng trnh bao gm 5 t
lnh. S lnh ny gm 20% lnh r nhnh, 10% lnh store, 20% lnh load, v 50% lnh
s hc+logic (ALU). Ch s trung bnh IPC l 1 i vi lnh r nhnh, 0.5 vi lnh load,
1 vi lnh store, v 2 vi cc lnh ALU. Hy tnh thi gian thc thi chng trnh ny?
Chng 2. Kin thc c s
1. Thc hnh cc phng php biu din s nguyn (du, b 1, b 2, d) vi nhng s
nguyn t xut. Tin hnh vi c hai hnh thc : t s nguyn biu din nh phn v
t chui nh phn xc nh gi tr nguyn
2. Thc hnh cc phng php biu din s thc theo chun IEEE 754 vi nhng s
thc t xut, theo c hai hnh thc : xc nh gi tr thc t chui nh phn v ngc
li
3. Chng minh li cc nh l nu trong i s Bool (da vo cc tin c).
4. Thc hnh phng php xy dng biu thc logic theo phng php nhn tng v
tng nhn.
5. Thc hnh phng php ti u ho biu thc vi phng php karnaugh.
6. S khc nhau ca cc mch t hp v mch tun t ? Thc hnh phng php xy
dng mch t hp t bng gi tr hm logic cho.
7. Hy biu din s 2008 di cc dng sau:
a. Nh phn
b. C s 4, 8, 16
c. B 1
d. B 2
e. Chun n IEEE 754
f. D 1024

8. Cho hai chui bit sau
1001 1100 1010 1111 1001 1100 1010 1111
0110 1000 0111 0101 0110 1000 0111 0101
Hy thc hin php cng hai t nh trn vi gi thit kiu biu din:
a. B 1, b 2
b. D 2
31


9. Cho bng chn l sau:
A B c d F(a,b,c,d)
0 0 0 0 1
0 0 0 1 1
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0

a. Xc lp biu thc logic ca hm F(a,b,c,d) trn.
b. Gin lc hm trn bng hai cch khc nhau hc.
Chng 3. T chc c bn my tnh
1. Khi nim chng trnh cng/mm ; nguyn l von neuman ; cc chc nng c bn
ca my tnh.
2. c t cc trng thi trong chu trnh lnh y .
3. Trnh by c ch hot ng ca mt s thnh phn quan trng trong CPU khi thc thi
mt lnh.
4. Phn bit cc kiu bus thng dng ? Cc c im chnh ca h thng lin kt trong
my tnh ?
Chng 4. B nh v cc h thng lu tr
1. Nu nhng c im c bn ca b nh. Vic phn cp b nh ph thuc vo nhng
tiu ch chnh no ?
2. Gii thch khi nim DRAM. Vic ng b ho d liu theo xung nhp clock trong
qu trnh tng tc CPU Main Memory c u im g ?
3. u im ca vic t chc b nh chnh theo m hnh ma trn nh hng ct cc t
nh ?
4. Hy xy dng mt thnh phn nh c dung lng 2GB t nhng module c bn v
yu cu sau :
a. Module nh c dung lng 128MB, c t chc theo m hnh 4K x 4K x
64(bits)
b. Mi t nh c kch thc 64 bits
5. Vi b nh cache kt hp (associative cache) c phn thnh cc trng nh sau,
hy xc nh:
Tag Word

- di a ch, s n v c th nh a ch c, kch thc block, s lng block
trong b nh chnh, s dng trong b nh cache v kch thc ca trng tag

6. B nh cache kt hp theo tp (set-associative cache) cho php phn a ch b nh
t CPU nh minh ho hnh di y :
16 bits 10 bits 6 bits
Tag Index Offset

a. 16 bits u tin Tag s c s dng nh th no ?
b. Tnh s tp ca b nh cache ny.
c. Liu c th xc nh c ln ca b nh cache ny hay khng ? Gii
thch r cu tr

7. Cho on m lnh vit bng ngn ng C di y :
register int i,j ; //i, j c lu trong cc thanh ghi
int A[3][100] ; // int l kiu t nhin ln 32 bits
int B[101][3] ;

f or ( i =0 ; i <3 ; i ++)
f or ( j =0 ; j <100 ; j ++)
A[ i ] [ j ] = B[ j ] [ 0] *B[ j +1] [ 0] ;


on m ny s c thi hnh trn mt computer c b nh cache d liu s dng
phng php nh x kt hp vi dung lng 16 kilo-bytes v mi block l 16 bytes.
a. nh gi s ln tht bi - cache miss khi on m ny c thi hnh. Gii thch r
cc bc tnh ton trong qu trnh nh gi.
b. Trong s cc phng php di y, phng php no s hiu qu hn trong vic
gim t l cache miss i vi on chng trnh trn ? Gii thch r v s la
chn phng php .
1. hp nht cc vng lp
2. i th t vng lp
3. thm lnh np trc (prefetch)


8. Xt my in ton c mc cache L2 gia mc cache L1 v b nh chnh. T l
cache miss s c xc nh theo cng thc sau:

2 1 L L global
MissRate MissRate MissRate

V thi gian truy cp trung bnh c xc nh theo:
28 4


2 2 2
1 1
L L L
L L
ty MissPenali MissRate HitTime
MissRate HitTime AccessTime




c th nng cao hiu nng truy cp b nh, chng ta c th s dng thm mc cache
th 3 : L3. Trong trng hp h thng c 3 mc cache c c trng thng qua cc
tham s sau :
L1 :
MissRate : 30%,
HitTime = 1 cycle.
L2:
MissRate : 2%,
HitTime = 4 cycles
MissPenality = 3000 cycles.
L3
MissRate :0,5%,
HitTime = 35 cycles,
MissPenality = 5000 cycles.

(i) Hy xc nh t l miss ton cc ca h thng cache trn?

(ii) Xc nh thi gian truy cp trung bnh ca h thng cache ny?
Chng 5. Tp lnh - Kin trc b vi x l
1. Khi nim tp lnh trong CPU, nhng thnh phn ca mt lnh ?
2. Cc hnh thc biu din lnh trong my tnh ?
3. Vic thit k tp lnh ca my tnh ph thuc vo nhng vn g ?
4. Format lnh l g ? C bao nhiu format lnh ?
5. Trnh by nhng chin lc thao tc d liu khi xem xt lnh ?
6. Khi nim kiu nh a ch ? Vic phn bit cc kiu nh a ch da trn tiu ch
no ?
7. Gi s PC cha a ch A1, v ti a ch ny cha lnh I cn mt ton hng. a ch
ca ton hng ny l A3. truy cp n a ch ny, lnh I cha thm mt phn xc
nh a ch A2. Thanh ghi ch mc (index) ca CPU cha gi tr A4. Hy xc nh mi
quan h gia cc a ch trn nu tp lnh CPU s dng c ch nh a ch sau:
- trc tip?
- gin tip qua b nh?
- gin tip qua thanh ghi ?
- dch chuyn da trn thanh ghi ch mc?
- dch chuyn da trn thanh ghi PC

8. Gi s CPU ch c duy nht lnh mt lnh SUB X, thc hin php tr ni dung thanh
ghi ACCUMULATOR vi ni dung t nh ti a ch X v t kt qu vo c ACC v X.
Hy thc hin lnh ngn ng bc cao A = B+C vi computer ch c duy nht lnh trn
(cc t nh ti B v C phi c bo lu, c th s dng ti a mt t nh trung gian).

9. Tp lnh ca mt CPU vi kin trc kiu load-store s dng hai formats lnh sau :

- Kiu lnh A (store, load (fetch), branches v jumps) :
6 bits 4 bits 32 bits
OpCode Rs/Rd Immediate

- Kiu lnh B (ALU Operations):
6 bits 4 bits 4 bits
OpCode Rs Rd

a. Tnh s thanh ghi registers c th c ca kin trc ny.
b. Tnh s kt hp Lnh/kiu_nh_a_ch i vi kin trc ny.
c. Nu ch s dng mt format lnh c di c nh i vi tp lnh ca
bi ton ny, di ca format s l bao nhiu bits ?
Chng 6. T chc v chc nng ca CPU
1. Cu trc CPU bao gm nhng thnh phn no? Tp registers trong CPU chu nhng
nh hng no t cc thnh phn cn li ca my tnh ?
2. Phn bit cc kiu thanh ghi phc v ngi dng, thanh ghi iu khin, thanh ghi
trng thi ?
3. c t cc lung d liu c bn lin quan n chu trnh ti lnh (instruction fetch), ti
d liu (Data fetch) v chu trnh thi hnh (execute)
4. Trnh by k thut pipeline trong vic nng cao hiu nng thc thi lnh trong CPU ?
Mi quan h gia s tng trong pipeline v t l ci thin hiu nng ?
5. Vn x l r nhnh trong cc b pipeline c x l nh th no ? Vic d on
cc lnh r nhnh c th hin c th vi nhng phng php no ?
6. Phn bit cc kin trc CPU kiu RICS v CICS ?
7. Thanh ghi iu kin (flags) trong CPU gm nhng bit c bit sau (c xc lp gi
tr tu thuc vo kt qu thao tc cui cng ca ALU)
- Sign
- Zero
- Carry
- Even parity
- Overflow
Gi s ALU thao tc vi t nh ln 16bits v s dng kiu biu din b 2. Nhng bits
trn s c gi tr nh th no nu php ton cui cng ca ALU l :
- Php cng ca -1 v 1
- Php nhn 14 vi 13
- Php chia nguyn 14 cho 13

8. Gi s mt computer c kiu CISC v c kin trc pipeline 6 tng nh trong bi
ging. Xt chui lnh di y:
R1 =R2 +R3
R4 =R1 - R5
R6 =R1 AND R7
R8 =R1 OR R9
R10 =R1 XOR R11
Hy t chc li on m trn sao cho c th loi b nhng vn ph thuc d liu gia
cc lnh trn trong qu trnh thi hnh trn pipeline (c th s dng lnh NOP No
Operation nu cn thit).

9. Gi s c mt pipeline vi 4 tng [FI, DI, EI, WO]. Nhng php nhy v iu kin
(unconditional branches) c xc nh ti thi im kt thc tng DI, trong khi nhng
php nhy c iu kin (conditional branches) ch c xc nh khi kt thc tng EI.
Vic phn b cc php nhy c gi thit gm 35% s lnh l lnh nhy c iu kin
(trong s c 80% c thi hnh php nhy) v 5% l cc lnh nhy v iu kin hay
lnh gi n cc chng trnh con.
a. Tnh s NOOP i vi mt php nhy c iu kin? mt php nhy v iu kin ?

b. Xc nh s chu k (cycles) trung bnh i vi mt lnh (CPI) ca CPU ny nu
nh b qua cc ph thuc gia cc lnh.
c. Trong trng hp ph thuc d liu c b qua, hy tnh s chu ky trung bnh
CPI nu pipeline ny s dng phng php Predict always taken? phng php
Predict never taken?
10. Gi s my tnh RISC vi cc lnh thc thi qua 2 pha : Fetch v Execute, ngoi tr
nhng lnh load/store cn thm pha Memory (M). Xt on m sau:

LOAD A, M
LOAD B, M
ADD C, A, B
STORE C, M
BRANCH X

Xc nh s chu k cn thit thc thi on m trn trong trng hp CPU c thit
k vi c ch pipeline v khng c pipeline? Gi thit mi pha thi hnh cn 1 chu k.

You might also like