UNIVERSITY of PENNSYLVANIA

DEPARTMENT OF ELECTRICAL ENGINEERING

Example of SPICE simulation of a rst order lter (AC Analysis)
This is an example of a rst order lter and the use of the AC analysis to nd the frequency response
of the magnitude and phase of a transfer function.
The Spice input le is given below. The opamp has been modeled as a voltage controlled voltage
source (gain of 1E8), innite input resistance and zero output resistance (ideal opamp). The input
voltage V1 has a value of 1V so that the AC plot of the output voltage v(3) corresponds to the transfer
function T(jw)=Vo/V1
Example AC Analysis
v1 1 0 ac 1
r1 1 2 10k
r2 2 3 100k
c 2 3 10n
e1 3 0 0 2 1e8
.ac dec 10 1 1e4
.plot ac vdb(3)
.plot ac vp(3)
.end
Back to Spice Guidelines
Jan Van der Spiegel;
jan@ee.upenn.edu
Created Feb. 15, 1996; Updated Feb. 15, 1996
Example AC Analysis (Filter) http://www.seas.upenn.edu/~jan/spice/spice.lter.html
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