, " " 163-3-1213

" , '
21.31.32 :

2

3-state .3
.2 : , .E-T Flip flop , Master-Slave FF:
.1 : , .
Tri-state:
:3-State .3 Tri-state , .

:
In
0
1
0
1

Out
High Z
High Z
0
1

En
0
0
1
1

: High Z High Z . .
. :

?3 State
Tri-state .BUS BUS
. :

, " BUS" , 3-state

Bus
1
0

En2
0
1
1
3

En1
1
0
1
3

" , '

, " " 163-3-1213

En .
Mux 2-1 .Tri-state

Mux 2-1 s0

: 3 State

.2
( :)FF Flip Flop .
(' '1 ' )'3 (
).
FF ( )
( ) . ( )E=Enable
( .)Gate , Clk .Enable
D-latch .2.3 ,DFF
FF SET (Q=1) and RESET (Q=0):
. D type FF DFF D
.Data
:
:Clk=1 D- ( Q D-latch ).
:Clk=0 Q D Clk'.'1
: E D FF gated D
( latch " D").

 , " " 163-3-1213

" , '
:

Qn 1

Clk

Qn

Qn

1
3

1
3

3
3

.2.2 T ransition triggered FF

( ,triggering) : .
( ) .
( ,pulse) : . 1-3-
3-.1-
( :)Clk,Clock .
.
D-latch E (' '3)
.
( ) ( ) -
.
: ( ' '1' )'3 (
' '3' )'1 .

 , " " 163-3-1213

" , '
:
.
. -.

: < ,
( ).
( Edge Triggered FF )E-T FF
/ , /
D Q .
:
:

DFF

DFF
(.)

Edge Triggered FF :

* .
- ( Master-Slave FF )M-S FF
(
) .
E .
:

" , '

, " " 163-3-1213

: .D Master , Slave .

.
. ( )master
. ,
(.)slave
:

: ? ?
: ( ) .
( M-S-) ( E-T
).

" , '

, " " 163-3-1213

:
.2.1 Register
CPU , m :DFF

/ m m m
( ) . clk / m
.
.
:

FF clk ( ) -.

" , '

, " " 163-3-1213

R0

. R1

?
" "3 R0 out . R1 In
: R0 out R1 out " "3 !

, R1 R2 R2 Adder :

.
R1 in, R1 out, R2 in, R2 out, Y in ,Zin, Zout :

" , '

R1 out, Y in

, " " 163-3-1213

R1 Y

T0

R2 out , Zin

Y R2 Z

T1

Zout , R2 in

Z R2

T2

, 2 R1 R2 R2

R1 out, Y in
R2 out , Zin
Zout , Yin
Zin Zout
Zout , R2 in

R1 Y

T0

Y R2 Z
Z Y

T1

Z Y Z
Z R2

T2
T3
T4

:
D-FF SR FF
D SR . R S DD-FF
S SR ( R .) D
SR Flip Flop:
( SR S=R=1).

SR E :
( )E=1
SR ( E=0
).

" , '

, " " 163-3-1213

- D SR
. R S

.