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VLSI Digital Signal Processing System
VLSI Digital Signal Processing System
Keshab K. Parhi
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Chap. 2
DSP System
out
Non-terminating
Example:
for
n = 1
to
y ( n ) = a x ( n ) + b x ( n 1) + c x ( n 2 )
end
3T 2T T 0
nT
Algorithms
out
signals
Chap. 2
Area-Speed-Power Tradeoffs
3-Dimensional Optimization (Area, Speed, Power)
Achieve Required Speed, Area-Power Tradeoffs
Power Consumption
P = C V 2 f
Latency reduction Techniques => Increase in speed or
power reduction through lower supply voltage operation
Since the capacitance of the multiplier is usually dominant,
reduction of the number of multiplications is important
(this is possible through strength reduction)
Chap. 2
x(n-1)
D
b
x(n-2)
c
y(n)
Chap. 2
z1
x(n)
z1
b
c
y(n)
Chap. 2
x(n)
a
c
y(n)
Chap. 2
Examples of DFG
Nodes are complex blocks (in Coarse-Grain DFGs)
Adaptive
filtering
FFT
IFFT
Decimator
Expander
Chap. 2
N samples
N/2 samples
N/2 samples
N samples
2
9
Introduction
Loop Bound
Important Definitions and Examples
Iteration Bound
Important Definitions and Examples
Techniques to Compute Iteration Bound
Chap. 2
10
Introduction
Iteration: execution of all computations (or functions) in an algorithm
once
Example 1:
A
2 times
2
B
2 times
C
3 times
Chap. 2
x(n)
y(n-1)
a
11
Introduction (contd)
Assume the execution times of multiplier and adder are Tm & Ta, then the
iteration period for this example is Tm+ Ta (assume 10ns, see the red-color
box). so for the signal, the sample period (Ts ) must satisfy:
Ts Tm + Ta
Definitions:
Iteration rate: the number of iterations executed per second
Sample rate: the number of samples processed in the DSP system per
second (also called throughput)
Chap. 2
12
Iteration Bound
Definitions:
Loop: a directed path that begins and ends at the same node
Loop bound of the j-th loop: defined as Tj/Wj, where Tj is the loop
computation time & Wj is the number of delays in the loop
Example 1: a b c a is a loop (see the same example in Note 2,
PP2), its loop bound:
Tloopbound = Tm + Ta = 10 ns
x(n)
2D
+
y(n-2)
Tloopbound =
Tm + Ta
= 5 ns
2
a
Chap. 2
13
L3: 2D
10ns
2ns
L1: D
3ns
C
L2: 2D
5ns
Definitions (Important):
Critical Loop: the loop with the maximum loop bound
Iteration bound of a DSP program: the loop bound of the critical loop, it is
defined as
T
T = max j
j L W
j
T = max{12, 5, 7.5}
lL
Chap. 2
14
T = TL 0 =
B = A Z non causal
1
causal
A = B Z
Speed of the DSP system: depends on the critical path comp. time
Paths: do not contain delay elements (4 possible path locations)
Critical path of a DFG: the path with the longest computation time among
all paths that contain zero delays
Clock period is lower bounded by the critical path computation time
Chap. 2
15
D
b
26
c
26
d
22
18
14
y(n)
Chap. 2
16
Precedence Constraints
Each edge of DFG defines a precedence constraint
Precedence Constraints:
Intra-iteration edges with no delay elements
Inter-iteration edges with non-zero delay
elements
Acyclic Precedence Graph(APG) : Graph obtained
by deleting all edges with delay elements.
Chap. 2
17
y(n)=ay(n-1) + x(n)
+
A
x(n)
D
10
13
A
19
3
B
6
C
D
APG of this graph is
10
A
2D
Chap. 2
18
B
(3)
(3)
(6)
D
B
C
2D
(21)
D
Tloop = 13ut
19
Chap. 2
20
Chap. 2
21
Example :
(1) 1
D d1
(2)
(1) 2
D d4
-1
-1
-1
-1
-1
d2
D d3
(2)
5
(2)
6
(1) 3
L(3)
L(1)
L(2)
L(4)
-1
-1 -1
-1
-1
-1
-1
-1
-1 -1
-1
-1
-1
-1 -1
-1
-1 -1
-1
10
10
-1
T = max{4/2,4/2,5/3,5/3,5/3,8/4,8/4,5/4,5/4} = 2.
Chap. 2
22
23
Chap. 2
24
Example :
-4
2
Gd to Gd
-5
0
0
0
-5
m=0
m=1
m=2
i=1
-2
-2
-3
-2
i=2
-5/3
-1
-1
i=3
-2
-2
i=4
- -
25