Text LCD

I. Bn s i n u
Bi ny nm trong phn ng dng AVR thuc lot bi cng hc AVR. Trong bi ng dng
ny chng ta khng kho st nhiu cu trc AVR m ch yu l tm hiu Text LCD cch
iu khin bng AVR. Cng c chnh cng l 2 b phn mm quen thuc WinAVR v
Proteus.
Sau bi ny, ti hy vng bn c th hiu v thc hin c:
- Cu trc Text LCD
- Nguyn l hot ng Text LCD.
- Pht trin 1 th vin iu khin Text LCD bng AVR c 2 ch 8 bit v 4 bit.
- V d iu khin Text LCD bng AVR.
Text LCD l cc loi mn hnh tinh th lng nh dng hin th cc dng ch
hoc s trong bng m ASCII. Khng ging cc loi LCD ln, Text LCD c chia sn
thnh tng v ng vi mi ch c th hin th mt k t ASCII. Cng v l do ch hin
th c k t ASCII nn loi LCD ny c gi l Text LCD ( phn bit vi Graphic
LCD c th hin th hnh nh). Mi ca Text LCD bao gm cc chm tinh th lng,
vic kt hp n v hin cc chm ny s to thnh mt k t cn hin th. Trong cc
Text LCD, cc mu k t c nh ngha sn. Kch thc ca Text LCD c nh
ngha bng s k t c th hin th trn 1 dng v tng s dng m LCD c. V d LCD
16x2 l loi c 2 dng v mi dng c th hin th ti a 16 k t. Mt s kch thc Text
LCD thng thng gm 16x1, 16x2, 16x4, 20x2, 20x4Hnh 1 l mt v d Text LCD
16x2.

Hnh 1. Text LCD 16x2

Text LCD c 2 cch giao tip c bn l ni tip (nh I2C) v song song. Trong
phm vi bi hc ny ti ch gii thiu loi giao tip song song, c th l LCD 16x2 iu
khin bi chip HD44780U ca hng Hitachi. i vi cc LCD khc bn cn tham kho
datasheet ring ca tng loi. Tuy nhin, HD44780U cng c coi l chun chung cho
cc loi Text LCD, v th bn c th dng chng trnh v d trong bi ny test trn
cc LCD khc vi rt t hoc khng cn chnh sa.

HD44780U l b iu khin cho cc Text LCD dng ma trn im (dot-matrix),

chip ny c th c dng cho cc LCD c 1 hoc 2 dng hin th. HD44780U c 2
mode giao tip l 4 bit v 8 bit. N cha sn 208 k t mu kch thc font 5x8 v 32 k
t mu font 5x10 (tng cng l 240 k t mu khc nhau).
1. S chn.
Cc Text LCD theo chun HD44780U thng c 16 chn trong 14 chn kt ni
vi b iu khin v 2 chn ngun cho n LED nn. Th t cc chn thng c sp
xp nh sau:
Bng 1. S chn.

Trong mt s LCD 2 chn LED nn c nh s 15 v 16 nhng trong mt s

trng hp 2 chn ny c ghi l A (Anode) v K (Cathode). Hnh 2 m t cch kt ni
LCD vi ngun v mch iu khin.

Hnh 2. Kt ni Text LCD.

Chn 1 v chn 2 l cc chn ngun, c ni vi GND v ngun 5V. Chn 3 l
chn chnh tng phn (contrast), chn ny cn c ni vi 1 bin tr chia p nh
trong hnh 2.Trong khi hot ng, chnh thay i gi tr bin tr t c tng
phn cn thit, sau gi mc bin tr ny. Cc chn iu khin RS, R/W, EN v cc
ng d liu c ni trc tip vi vi iu khin. Ty theo ch hot ng 4 bit hay 8
bit m cc chn t D0 n D3 c th b qua hoc ni vi vi iu khin, chng ta s kho
st k cng hn trong cc phn sau.
2. Thanh ghi v t chc b nh.
HD44780U c 2 thanh ghi 8 bits l INSTRUCTION REGISTER (IR) v DATA
REGISTER (DR). Thanh ghi IR cha m lnh iu khin LCD v l thanh ghi ch ghi
(ch c th ghi vo thanh ghi ny m khng c c n). Thanh ghi DR cha cc cc
loi d liu nh k t cn hin th hoc d liu c ra t b nh LCDC 2 thanh ghi
u c ni vi cc ng d liu D0:7 ca Text LCD v c la chn ty theo cc
chn iu khin RS, RW. Thc t iu khin Text LCD chng ta khng cn quan tm
n cch thc hot ng ca 2 thanh ghi ny, v th cng khng cn kho st chi tit
chng.
HD44780U c 3 loi b nh, l b nh RAM d liu cn hin th DDRAM
(Didplay Data RAM), b nh cha ROM cha b font to ra k t CGROM (Character

Generator ROM) v b nh RAM cha b font to ra cc symbol ty chn CGRAM

(Character Generator RAM). iu khin hin th Text LCD chng ta cn hiu t chc
v cch thc hot ng ca cc b nh ny:
2.1 DDRAM.
DDRAM l b nh tm cha cc k t cn hin th ln LCD, b nh ny gm c
80 c chia thnh 2 hng, mi c rng 8 bit v c nh s t 0 n 39 cho
dng 1; t 64 n 103 cho dng 2. Mi nh tng ng vi 1 trn mn hnh LCD. Nh
chng ta bit LCD loi 16x2 c th hin th ti a 32 k t (c 32 hin th), v th c
mt s nh ca DDRAM khng c s dng lm cc hin th. hiu r hn chng
ta tham kho hnh 3 bn di

Hnh 3. T chc ca DDRAM.

Ch c 16 nh c a ch t 0 n 15 v 16 a ch t 64 n 79 l c hin
th trn LCD. V th mun hin th mt k t no trn LCD chng ta cn vit k t
vo DDRAM 1 trong 32 a ch trn. Cc k t nm ngoi 32 nh trn s khng c
hin th, tuy nhin vn khng b mt i, chng c th c dng cho cc mc ch khc
nu cn thit.
2.2 CGROM.
CGROM l vng nh c nh cha nh ngha font cho cc k t. Chng ta khng
trc tip truy xut vng nh ny m chip HD44780U s t thc hin khi c yu cu c
font hin th. Mt iu ng lu l a ch font ca mi k t vng nh CGROM
chnh l m ASCII ca k t . V d k t a c m ASCII l 97, tham kho t chc
ca vng nh CGROM trong hnh 4 bn s nhn thy a ch font ca a c 4 bit thp l
0001 v 4 bit cao l 0110, a ch tng hp l 01100001 = 97.
CGROM v DDRAM c t ng phi hp trong qu trnh hin th ca LCD.
Gi s chng ta mun hin th k t a ti v tr u tin, dng th 2 ca LCD th cc
bc thc hin s nh sau: trc ht chng ta bit rng v tr u tin ca dng 2 c a
ch l 64 trong b nh DDRAM (xem hnh 3), v th chng ta s ghi vo nh c a ch
64 mt gi tr l 97 (m ASCII ca k t a). Tip theo, chip HD44780U c gi tr 97
ny v coi nh l a ch ca vng nh CGROM, n s tm n vng nh CGROM c a
ch 97 v c bng font c nh ngha sn y, sau xut bn font ny ra cc
chm trn mn hnh LCD ti v tr u tin ca dng 2 trn LCD. y chnh l cch m
2 b nh DDRAM v CGROM phi hp vi nhau hin th cc k t. Nh m t, cng
vic ca ngi lp trnh iu khin LCD tng i n gin, l vit m ASCII vo b
nh DDRAM ti ng v tr c yu cu, bc tip theo s do HD44780U m nhim.

Hnh 4. Vng nh CGROM

2.3 CGRAM.
CGRAM l vng nh cha cc symbol do ngi dng t nh ngha, mi symbol
c c kch thc 5x8 v c dnh cho 8 nh 8 bit. Cc symbol thng c nh
ngha trc v c gi hin th khi cn thit. Vng ny c tt c 64 nh nn c ti a 8
symbol c th c nh ngha. Ti liu ny khng cp n s dng b nh CGRAM
nn ti s khng i chi tit phn ny, bn c th tham kho datasheet ca HD44780U
bit thm.
3. iu khin hin th Text LCD

3.1 Cc chn iu khin LCD

Cc chn iu khin vic c v ghi LCD bao gm RS, R/W v EN.
RS (chn s 3): Chn la chn thanh ghi (Select Register), chn ny cho php la
chn 1 trong 2 thanh ghi IR hoc DR lm vic. V c 2 thanh ghi ny u c kt ni
vi cc chn Data ca LCD nn cn 1 bit la chn gia chng. Nu RS=0, thanh ghi
IR c chn v nu RS=1 thanh ghi DR c chn. Chng ta u bit thanh ghi IR l
thanh ghi cha m lnh cho LCD, v th nu mun gi 1 m lnh n LCD th chn RS
phi c reset v 0. Ngc li, khi mun ghi m ASCII ca k t cn hin th ln LCD
th chng ta s set RS=1 chn thanh ghi DR. Hot ng ca chn RS c m t trong
hnh 5.

Hnh 5. Hot ng ca chn RS

R/W (chn s 4): Chn la chn gia vic c v ghi. Nu R/W=0 th d liu s
c ghi t b iu khin ngoi (vi iu khin AVR chng hn) vo LCD. Nu R/W=1
th d liu s c c t LCD ra ngoi. Tuy nhin, ch c duy nht 1 trng hp m d
liu c th c t LCD ra, l c trng thi LCD bit LCD c ang bn hay khng
(c Busy Flag - BF). Do LCD l mt thit b hot ng tng i chm (so vi vi iu
khin), v th mt c BF c dng bo LCD ang bn, nu BF=1 th chng ta phi
ch cho LCD x l xong nhim v hin ti, n khi no BF=0 mt thao tc mi s c
gn cho LCD. V th, khi lm vic vi Text LCD chng ta nht thit phi c mt chng
trnh con tm gi l wait_LCD ch cho n khi LCD rnh. C 2 cch vit chng
trnh wait_LCD.
Cch 1 l c bit BF v kim tra v ch BF=0, cch ny i hi lnh c t LCD
v b iu khin ngoi, do chn R/W cn c ni vi b iu khin ngoi.
Cch 2 l vit mt hm delay mt khong thi gian c nh no (tt nht l
trn 1ms). u im ca cch 2 l s n gin v khng cn c LCD, do chn R/W
khng cn s dng v lun c ni vi GND. Tuy nhin, nhc im ca cch 2 l
khong thi gian delay c nh nu qu ln s lm chm qu trnh thao tc LCD, nu qu
nh s gy ra li hin th. Trong bi ny ti hng dn bn cch tng qut l cch 1, s
dng cch 2 bn ch cn mt thay i nh trong chng trnh wait_LCD (s trnh by chi
tit sau) v kt ni chn R/W ca LCD xung GND.
EN (chn s 5): Chn cho php LCD hot ng (Enable), chn ny cn c kt
ni vi b iu khin cho php thao tc LCD. c v ghi data t LCD chng ta cn
to mt xung cnh xung trn chn EN, ni theo cch khc.
Mun ghi d liu vo LCD:

01- Trc ht cn m bo rng chn EN = 0,

02- Tip n xut d liu n cc chn D0:7,
03- Sau set chn EN ln 1 v,
04- Cui cng l xa EN v 0
=> to 1 xung cnh xung.
3.2 Tp lnh ca LCD
Bng 2 tm tt cc lnh c th ghi vo LCD

Danh sch lnh trn c ti t 2 mu khc nhau, cc lnh mu s c dng

thng xuyn trong lc hin th LCD v cc lnh mu xanh thng ch c dng 1 ln
trong lc khi ng LCD, ring lnh Read BF c th c dng hoc khng ty theo
cch vit chng trnh wait_LCD. Phn tip theo ti gii thch ngh ca cc lnh v
tham s km theo chng.
Trc ht l nhm lnh :
- Trc ht l nhm lnh : Clear display xa LCD: lnh ny xa ton b
ni dung DDRAM v v th xa ton b hin th trn LCD. V y l 1 lnh ghi
Instruction nn chn RS phi c reset v 0 trc khi ghi lnh ny ln LCD. M
lnh xa LCD l 0x01(ghi vo D0:D7).
- Cursor home a con tr v v tr u, dng 1 ca LCD: lnh ny thc hin
vic a con tr v v tr u tin ca b nh DDRAM, v th nu sau lnh ny mt bin

c ghi vo DDRAM th bin ny s nm v tr u tin (1;1). RS cng phi bng 0

trc khi ghi lnh. M lnh l 0x02 hoc 0x03(chn 1 trong 2 m lnh, ty ).
- Set DDRAM address nh v tr con tr cho DDRAM: di chuyn con tr n
mt v tr ty trong DDRAM v v th c th c dng chn v tr cn hin th trn
LCD. thc hin lnh ny cn reset RS=0. Bit MSB ca m lnh (D7) phi bng 1, 7
bit cn li ca m lnh chnh l a ch DDRAM mun di chuyn n. V d chng ta
mun di chuyn con tr n v tr th 3 trn dng 2 ca LCD (a ch 42) chng ta cn
ghi m lnh 0xAA v 0xAA=10101010 (binary) trong bit MSB bng 1, by bit cn li
l 0101010=42, a ch ca nh mun n.
- Write to CGRAM or DDRAM ghi d liu vo CGRAM hoc DDRAM: v
y khng phi l lnh ghi instruction m l 1 lnh ghi d liu nn chn RS cn c set
ln 1 trc khi ghi lnh vo LCD. Lnh ny cho php ghi m ASCII ca mt k t cn
hin
K n l nhm lnh mu xanh: nhm lnh ny thng ch thc hin 1 ln (t
nht l trong bi hc ny) v thng c vit chung trong 1 chng trnh con khi ng
LCD ( chng ta gi l init_LCD trong bi hc ny).
Entry mode set xc lp cc hin th lin tip cho LCD: ni mt cch d hiu,
lnh ny ch ra cch m bn mun hin th mt k t tip theo 1 k t trc . V d nu
bn mun hin th 2 k t lin tip AB, trc ht bn vit A ti v tr 5, dng 1. Sau
bn ghi B vo LCD, lc ny c 4 cch m LCD c th hin th B nh sau: hin th B bn
phi A ti v tr s 6 (cch 1); B cng c th c hin th bn tri A, ti v tr s 4 (cch
2); hoc LCD c th t dch chuyn A v bn tri n v tr 4 sau hin th B bn phi
A, ti v tr 5(cch 3); v kh nng cui cng l LCD dch chuyn A v bn phi n v tr
6 sau hin th B bn tri A, ti v tr 5(cch 4).
Chng ta c th chn 1 trong 4 cch hin th trn thng qua lnh Entry mode set.
y l lnh ghi Instruction nn RS=0, 5 bit cao D7:3=00000, bit D2=1, hai bit
cn li D1:0 cha m lnh la chn 1 trong 4 cch hin th. Xem li bng 2, bit D1
cha gi tr I/D v D0 cha S. Trong I/D ngha l tng hoc gim (Increment or
Decrement). I/D= 1 l hin th tng tc k t sau s hin th bn phi k t trc, nu
I/D=0 th hin th gim, tc k t sau hin th bn tri k t trc. S l gi tr Shift, nu
S=1 th cc k t trc s c y i, k t sau chim ch k t trc, ngc li
nu S=0 th v tr hin th ca cc k t trc khng thay i. C th tm tt 4 mode
hin th ng vi 4 m lnh nh sau:
+ D7:0 = 0x04 (00000100) : hin th gim v khng shift (nh cch 2 trong v d).
+ D7:0 = 0x05 (00000101) : hin th gim v shift (nh cch 4 trong v d).
+ D7:0 = 0x06 (00000110) : hin th tng v khng shift (nh cch 1, khuyn
khch)
+ D7:0 = 0x07 (00000111) : hin th tng v shift (nh cch 3 trong v d
- Display on/off control - xc lp cch hin th cho LCD: lnh ny bao gm cc
thng s cho php LCD hin th, cho php hin th cursor v m/tt blinking. y cng l
mt lnh ghi Instrcution nn RS phi bng 0. M lnh cho lnh ny c dng 00001DCB
trong D (Display) cho php hin th LCD nu mang gi tr 1, C (Cursor) bng 1 th
cursor s c hin th v B l blinking cho cursor ti v tr hin th (blinking l dng 1
en nhp nhy ti v tr k t ang hin th). M lnh c dng ph bin cho lnh ny l
0x0E (00001110 - hin th cursor nhng khng hin th blinking).

- Function set xc lp chc nng cho LCD: y l lnh thit lp phng thc
giao tip vi LCD, kch thc font ch v s lng line ca LCD. RS cng phi bng 0
khi s dng lnh ny. M lnh function set c dng 001DLNFxx. Trong nu DL=1
(DL: Data Length) th mode giao tip 8 bit s c dng, lc ny tt c cc chn t D0
n D7 phi c kt ni vi b iu khin ngoi. Nu DL=0 th mode 4 bit c dng,
trong trng hp ny ch c 4 chn D4:7 c dng truyn nhn d liu v kt ni vi
b iu khin ngoi, cc chn D0:3 c trng. N quy nh s dng ca LCD, v hng
ta ang kho st LCD loi hin th 2 dng nn N=1 (N=0 cho trng hp LCD 1 dng). F
l kch thc font ch hin th, do LCD c 2 b font ch c sn trong CGROM nn
chng ta cn la chn thng qua bit F, nu F=1 b font 5x10 c s dng v nu F=0 th
font 5x8 c hin th. 2 bit thp trong m lnh ny c th c gn gi tr ty . M lnh
c dng ph bin cho lnh function set l 0x38 (00111000 giao tip 8 bit, 2 dng vi
font 5x8 ) hoc 0x28 (00101000 giao tip 4 bit, 2 dng vi font 5x8 ). V d trong bi
ny s dng c 2 m lnh trn.
3.3 Giao tip 4bit v 8bit.
Nh trnh by trong lnh function set, c 2 mode ghi v c d liu vo LCD
l mode 8 bit v mode 4 bit:
- Mode 8 bit: Nu bit DL trong lnh function set bng 1 th mode 8 bit c
dng. s dng mode 8 bit, tt c cc lines d liu ca LCD t D0 n D7 (t chn 7
n chn 14) phi c ni vi 1 PORT ca chip iu khin bn ngoi (v d PORTC ca
ATmega32 trong v d ca bi ny) nh trong hnh 3. u im ca phng php giao tip
ny l d liu c ghi v c rt nhanh v n gin v chip iu khin ch cn xut hoc
nhn d liu trn 1 PORT. Tuy nhin, phng php ny c nhc im l tng s chn
dnh cho giao tip LCD qu nhiu, nu tnh lun c 3 chn iu khin th cn n 11
ng cho giao tip LCD.
- Mode 4 bit: LCD cho php giao tip vi b iu khin ngoi theo ch 4 bit.
Trong ch ny, cc chn D0, D1, D2 v D3 ca LCD khng c s dng ( trng),
ch c 4 chn t D4 n D7 c kt ni vi chip b iu khin ngoi. Cc instruction v
data 8 bit s c ghi v c bng cch chia thnh 2 phn, gi l cc Nibbles, mi nibble
gm 4 bit v c giao tip thng qua 4 chn D7:4, nibble cao c x l trc v nibble
thp sau. u im ln nht ca phng php ny ti thiu s lines dng cho giao tip
LCD. Tuy nhin, vic c v ghi tng nibble tng i kh khn hn c v ghi d liu 8
bit. Trong bi hc ny, ti s trnh by 2 chng trnh con c vit ring ghi v c
cc nibbles gi l Read2Nib v Write2Nib.
III. AVR v Text LCD.
1. Trnh t giao tip Text LCD.
Trnh t giao tip vi LCD c trnh by trong flowchart hnh 6.

Hnh 6. Trnh t giao tip vi Text LCD.

s dng LCD chng ta cn khi ng LCD, sau khi c khi ng LCD
sn sng hin th. Qu trnh khi ng ch cn thc hin 1 ln u chng trnh.
Trong bi ny, qu trnh khi ng c vit trong 1 chng trnh con tn int_LCD, khi
ng LCD thng bao gm xc lp cch giao tip, kch thc font, s dng LCD
(funcstion set), cho php hin th LCD, sursor(Display control), ch hin th
tng/gim, shift (Entry mode set). Cc th tc khc nh xa LCD, vit k t ln LCD, di
chuyn con trc s dng lin tc trong qu trnh hin th LCD v s c trnh by
trong cc on chng trnh con ring.
2. AVR giao tip vi Text LCD trong WinAVR
Phn ny ti trnh by cch iu khin hin th Text LCD bng vi iu khin AVR
trong mi trng C ca WinAVR. Hnh thc l mt th vin hm giao tip Text LCD
trong 1 file header c tn l myLCD.h. Cc hm trong th vin bao gm (ch l phn
code trong List 0 khng nm trong file myLCD.h).
List 0. Cc hm c trong th vin myLCD.
1 char Read2Nib(); //c 2 nibbles t LCD
2 void Write2Nib(uint8_t chr); //ghi 2 nibbles vo LCD
3 void Write8Bit(uint8_t chr); //ghi tr tip 8 bit v LCD
4 void wait_LCD; //ch LCD rnh
5 void init_LCD(); //khi ng LCD

6
7
8

void clr_LCD(); //xa LCD

void home_LCD(); //a cursor v
void move_LCD(uint8_t y, uint8_t x); //di chuyn cursor v tr mong
mun (dng, ct)
9 void putChar_LCD(uint8_t chr); //ghi 1 k t ln LCD
10 void print_LCD(char* str, unsigned char len); //hin th chui k t
Tuy nhin, trc khi vit cc hm giao tip LCD chng ta cn nh ngha mt s
macro v bin. Hy to 1 file Header c tn myLCD.h v vit cc on code bn di
vo file ny (bt u t List 1).
List 1. nh ngha cc bin thay th
1 #include <util/delay.h>;
2 #define sbi(sfr,bit) sfr |=_BV(bit)
3 #define cbi(sfr,bit) &=~ (_BV(bit))
4 #define EN
2
5 #define RW
1
6 #define RS
0
7 #define CTRL
PORTB
8 #define DDR_CTRL
DDRB
9
10 #define DATA_O
PORTB
11 #define DATA_I
PINB
12 #define DDR_DATA
DDRB
13 /*
14 #define LCD8BIT
15 #define DATA_O
PORTD
16 #define DATA_I
PIND
17 #define DDR_DATA
DDRD
18 */
cbi v sbi l 2 macro c dng xa 1 bit v set 1 bit trong 1 thanh ghi. V d
cbi(PORTA, 5) l xa bit 5 trong thanh ghi PORT v 0. Do WinAVR khng h tr tuy
xut trc tip cc bit nn cn nh ngha 2 macro ny h tr.
Cc bin EN, RW v RS nh ngha s th t ca chn trn 1 PORT ca AVR
c dng kt ni vi cc chn EN, R/W v RS ca LCD. CTRL l bin cho bit
PORT no ca AVR c dng kt ni vi cc chn iu khin ca LCD.
DDR_CTRL l thanh ghi iu khin hng ca PORT kt ni vi cc chn iu khin,
DDR_CTRL lun ph thuc vo bin CTRL. Trong trng hp ca bi ny, bn thy ti
nh ngha CTRL l PORTB ngha l PORTB c dng kt ni vi cc chn iu
khin LCD, v CTRL l PORTB nn DDR_CTRL phi l DDRB (thanh ghi iu khin
hng ca PORTB). EN nh ngha bng 2 ngha l chn EN ca LCD c ni vi chn
2 ca PORTB (PB2), tng t chn R/W ni vi chn 1 PORTB (PB1) v chn RS ni
vi chn 0 PORTB (PB0). Vic chn cc PORT giao tip v th t chn ph thuc vo
kt ni tht trong mch in giao tip, bn phi thay i cc nh ngha ny cho ph hp

vi thit k mch in ca bn. L do cho vic nh ngha cc bin thay th kiu ny l

nhm to ra tnh tng qut cho th vin hm. V d, mt ngi khng mun dng
PORTB iu khin LCD m dng PORTA th ngi ny ch cn thay i nh ngha
2 dng 7 v 8, khng cn thay i ni dung cc hm v trong cc hm ny chng ta ch
dng tn thay th l CTRL v DDR_CTRL. Tng t, ti nh ngha 3 bin thay th l
DATA_O ngha l PORT xut d liu, DATA_I l PORT nhp d liu v DDR_DATA l
thanh ghi iu khin hng. DATA_O v DATA_I l PORT ni vi cc chn D0:7 (mode
8 bit) hoc D4:7 (mode 4 bit) ca LCD, y l cc ng truyn v nhn d liu. Trong
v d trn, ti dng chnh PORTB lm ng data v y l trng hp giao tip 4 bit, do
3 chn u ca PORTB kt ni vi cc chn iu khin nn PORTB ch cn tha li 5
chn, chng ta s ni 4 chn PB4, PB5, PB6 v PB7 tng ng vi D4, D5, D6 v D7
ca LCD. Hnh 7 m t cch kt ni AVR v LCD theo v d ny. Tt nhin bn c th
s dng PORT khc lm ng data nht l khi bn mun s dng mode 8 bit, v trong
mode ny cn ti 11 ng giao tip (3 iu khin + 8 data). Phn c che trong 2 du
comment /* */ l trng hp bn mun dng mode 8 bit. s dng mode 8 bit, bn cn
nh ngha 1 bin c tn LCD8BIT, bit ny s bo cho cc on chng trnh con thc
hin ghi v c d liu theo cch 8 bit. ng thi, bn phi nh ngha li ng giao
tip data (DATA_O, DATA_I, DDR_DATA).

Hnh 7. V d Kt ni LCD vi AVR trong mode 4 bit (chip mega8).

Phn bn di l phn nh ngha cc hm trong th vin myLCD. Bn hm u tin

(xem li List 0) l cc hm h tr, chng ch c dng bi cc hm khc trong th vin
v khng c gi trong cc chng trnh ng dng bn ngoi.
List 2. c 2 nibbles t LCD.
1 char Read2Nib(){
2 char HNib, LNib;
3 DATA_O |=0xF0;
4
5 sbi(CTRL,EN); //enable
6 DDR_DATA &amp;=0x0F; //set 4 bits cao cua PORT DATA lam input
7 HNib=DATA_I &amp; 0xF0;
8 bi(CTRL,EN); //disable
9
10 sbi(CTRL,EN); //enable
11 LNib = DATA_I & 0xF0;
12 cbi(CTRL,EN); //disable
13 Lnib >>=4;
14 return (HNib|LNib);
15 }
16
Hm ny thc hin vic c d liu t LCD ra ngoi, c theo tng nibble 4 bit,
kt qu tr v l 1 s 8 bit. Hm ny ch c dng duy nht khi c c Busy (BF) trong
chng trnh ch LCD rnh (wait_LCD) mode 4 bit. Trc ht cn nh ngha 1 bin
tm HNib (high nibble) v LNib (Low nibble) cha 2 nibbles c v (dng 2, List 2).
Dng 5 set chn EN ln mc 1 chun b cho LCD lm vic. Chng ta cn i hng
ca PORT d liu trn AVR sn sng nhn d liu v, do ch c 4 bit cao ca PORT
data kt ni vi cc ng data ca LCD (v y l mode 4 bit) nn ch cn set hng cho
4 bit ny trn AVR, dng 6 thc hin vic set hng. Trong ch 4 bit, LCD s truyn
v nhn nibble cao trc v th dng 7 c d liu t LCD thng qua cc chn DATA_I
vo bin HNib, ch l chng ta ch cn ly 4 bit cao ca DATA_I nn cn phi dng
gii thut mt n (mask) che cc bit thp li (and vi 0xF0). Dng 8 xa chn EN
chun b cho bc tip theo. Tng t, cc dng 10, 11 v 12 c nibble thp vo bin
LNib. Hai dng 13 v 14 kt hp 2 nibbles to thnh s 8 bit v tr kt qu v cho
on chng trnh.
List 3. Ghi 2 nibbles vo LCD.
1
2
3
4
5
6
7

void Write2Nib(uint8_t chr){

uint8_t HNib, LNib, temp_data;
temp_data=DATA_O &0x0F; //doc 4 bit thap cua DATA_O de mask,
HNib=chr & 0xF0;
LNib=(chr<<4) &0xF0;

8
9
10
11
12
13
14
15

DATA_O =(HNib |temp_data);

sbi(CTRL,EN); //enable
cbi(CTRL,EN); //disable
DATA_O =(LNib|temp_data);
sbi(CTRL,EN); // enable
cbi(CTRL,EN); //disable
}

Hm Write2Nib thc hin ghi mt bin 8 bit c tn chr vo LCD theo tng nibble,
hm ny c s dng rt nhiu ln trong mode 4 bit. Dng 2 nh ngha 3 bin tm l
HNib, LNib v temp_data, khng ging nh khi c t LCD, vic ghi vo LCD c th
lm nh hng n cc chn ca PORT dng lm ng d liu nht l khi cc ng
iu khin v d liu dng chung 1 PORT (PORTB). Bin temp_data dng trong gii
thut mt n khng lm nh hng n cc bit khc khi ghi LCD. Dng 3 c d liu
t PORT DATA_O v che i cc bit cao, ch lu li cc bit thp vo bin temp_data v
cc bit thp ny khng c dng xut nhp d liu (xem hnh 7, cc chn thp ca
PORTB dng lm cc chn iu khin). ghi 1 gi tr 8 bit c tn l chr theo cch ghi
tng nibbles chng ta cn tch bin chr thnh 2 nibbles. Dng 5 tch 4 bit cao ca chr v
cha vo bin HNib. Dng 6 thc hin thm vic di chuyn 4 bit thp ca chr qua tri ri
gn cho bin LNib. Nh vy sau 2 dng ny cc bin HNib v LNib c m t nh sau:

Do d liu c sp xp sn sng cc v tr cao (ng vi cc chn D4:7) nn

cng vic tip theo ch n gin l xut 2 bin HNib v LNib ra ng DATA_O, cn
phi to 1 xung cnh xung chn EN mi ln xut d liu (dng 9, 10). Ch l phi
xut nibble cao trc v nibble thp theo sau.
List 4. Ghi 8 bit trc tip vo LCD.
1 void Write8Bit(uint8_t chr){
2 DATA_O=chr; //out 8 bits to DATA Line
3 sbi(CTRL,EN); //enable
4 cbi(CTRL,EN); //disable
5 }
on ny rt n gin l xut d liu 8 bit ra DATA_O, dng trong mode 8 bit.
Trong mode ny, 8 chn data ca LCD c ni vi 8 ng DATA_O ca AVR.
List 5. Ch LCD rnh
1 void wait_LCD(){
2 #ifdef LCD8BIT
3
while (1

4
cbi(CTRL,EN); //xa EN
5
cbi(CTRL,RS); //y l Instruction
6
sbi(CTRL,RW); //chiu t LCD ra ngoi
7
8
DDR_DATA=0xFF; //hng data out
9
DATA_O=0xFF; // gi lnh c
10
sbi(CTRL,EN); //enable
11
DDR_DATA=0x00; // i hng data in
12
13
if (bit_is_clear(DATA_I,7)) break
14 }
15 cbi(CTRL,EN); //disable for next step
16 cbi(CTRL,RW); //ready for next step
17 DDR_DATA=0xFF; //Ready to Out
18
19 #else
20 char temp_val;
21 while (1){
22 cbi(CTRL,RS); //RS=0,
23 sbi(CTRL,RW); //LCD -&gt; AVR<BR>
24 temp_val=Read2Nib
25 if (bit_is_clear(temp_val,7)) break
26 }
27 cbi(CTRL, RW); //ready for next step
28 DDR_DATA=0xFF; //Ready to Out
29 #endif //_delay_ms(1);
30 }
Hm wait_LCD ch lm mt vic n gin l ch cho n khi LCD rnh gn
cc cng vic khc. on code trong list 5 trnh by cch 1: c c Busy Flag v ch n
khi n bng 0 (LCD rnh). Vic c c BF ph thuc v mode ang s dng l 8 bit hay
4 bit, v th lnh #ifdef trong dng s 2 kim tra mode ph hp trc khi tin hnh c.
#ifdef LCD8BIT ngha l nu bin LCD8BIT c nh ngha pha trn (mode 8 bit
c dng) th s tin hnh c BF theo mode ny. Bng cch kim tra s c mt ca
bin LCD8BIT chng trnh s bit cch ghi v c LCD ph hp, phng php dng
#ifdef LCD8BIT c p dng cho tt c cc hm sau ny. Cc on code t dng 4 n
17 thc hin trong mode 8 bit. Trc khi c BF, chng ta cn gi 1 lnh c BF dng
9, sau dng 12 thc hin i hng cc chn data nhn gi tr v. Trong dng
10,kim tra bit th 7 ca DATA_I, DATA_I chnh l gi tr c v v bit th 7 trong gi
tr nhn v chnh l c Busy Flag. Nu BF=0 (bit_is_clear(DATA_I,7)) th kt thc qu
trnh lp ch vi lnh break;. Trong trng hp mode 4 bit c s dng (#else), qu
trnh kim tra c BF cng tng t, im khc nhau duy nht l cch c d liu v c
khc, chng ta dng hm Read2Nib c vit trc nhn gi tr v (xem dng
23). Nh trnh by, chng ta c th vit hm wait_LCD bng cch dng hm delay
mt khong thi gian c nh, trong dng 29 bn thy mt hm _delay_ms(1) khng
c s dng, nu mun bn c th xa ht cc dng lnh trc trong hm wait_LCD
v dng hm delay ny thay th, LCD vn s hot ng tt.

List 6. Khi ng LCD.

1 void init_LCD(){
2 DDR_CTRL=0xFF;
3 DDR_DATA=0xFF;//Function set
4
5 cbi(CTRL,RS); // the following data is COMMAND
6 cbi(CTRL, RW); // AVR-&gt;LCD
7 cbi(CTRL, EN);
8 #ifdef LCD8BIT
9 Write8Bit(0x38
10 wait_LCD();<
11 #else <
12 sbi(CTRL,EN); //enable
13 sbi(DATA_O, 5);
14 cbi(CTRL,EN); < //disable <
15 wait_LCD(); <
16 Write2Nib(0x28); //4 bit mode, 2 line, 5x8 font
17 wait_LCD();
18 #endif //Display control
19 cbi(CTRL,RS); // the following data is COMMAND
20 #ifdef LCD8BIT
21 Write8Bit(0x0E
22 wait_LCD
23 #else
24 Write2Nib(0x0E
25 wait_LCD();
26 #endif //Entry mode set
27 cbi(CTRL,RS); // the following data is COMMAND
28 #ifdef LCD8BIT
29 Write8Bit(0x06
30 wait_LCD
31 #else
32 Write2Nib(0x06
33 wait_LCD();
34 #endif }
35
Qu trnh khi ng gm 3 bc: function set, display control v entry mode set.
Vi function set, ba dng 5,6 v 7 xc lp cc chn iu khin chun b gi cc lnh.
Hai dng 9 v 10 vit lnh function set vo LCD theo mode 8 bit. Gi tr 0x38, tc 001
11000 l mt lnh xc lp mode 8 bit, LCD 2 dng v font 5x8. Nu mode 4 bit c
dng, chng ta cn vit hm function set khc i mt cht. Theo mc nh, khi va khi
ng LCD th mode 8 bit s c chn, v th nu mt hm no c ghi vo LCD
u tin, LCD s c gng c ht cc chn D0:7 ly d liu, do trong mode 4 bit cc
chn D0:3 khng c kt ni vi AVR nn vic c ln u c th dn n sai s. V
vy, vic u tin cn lm nu mun s dng mode 4 bit l gi mt lnh function set vi

tham s DL=0 ( 001 0xxxx) n LCD bo mode chng ta mun dng. Dng 13 lm
vic ny, dng lnh ch n gin set bit D5 nhng chnh l gi lnh dng 001 0xxxx
n LCD, v th LCD s vo mode 4 bit sau lnh ny. Tip theo qu trnh thao tc vi
LCD din ra bnh thng, dng 16 ghi vo LCD m ca function set, trong trng hp
ny l m 0x28, tc 001 01000: mode 4 bit, LCD 2 dng v font 5x8. Vi Display
control, m lnh c dng l 0x0E, tc 00001 110 trong 00001 l m ca lnh
display control, 3 bit theo sau xc lp hin th LCD, hin th cursor v khng linking. <
Vi Entry mode set, m lnh c dng l 0x06 tc hin th tng v khng shift.
Xem li phn gii thch tp lnh LCD hiu thm ngha ca m lnh 0x06.
List 7. Di chuyn cursor.
1 void home_LCD(){
2 cbi(CTRL,RS); // the following data is COMMAND
3 #ifdef LCD8BIT
4 Write8Bit(0x02); <
5 wait_LCD();
6 #else
7
8 Write2Nib(0x02);
9 wait_LCD();
10 #endif }
11 void move_LCD(uint8_t y,uint8_t x){
12 uint8_t Ad;
13 Ad=64*(y-1)+(x-1)+0x80; // tnh m lnh
14 cbi(CTRL,RS); // the following data is COMMAND
15 #ifdef LCD8BIT
16 Write8Bit(Ad);
17 wait_LCD();
18 #else
19 Write2Nib(Ad);
20 wait_LCD();
21 #endif }
22
List 7 trnh by 2 hm di chuyn cursor v home (home_LCD) v di chuyn n 1 v tr
do ngi dng t.
Hm home_LCD tng i n gin v ch cn ghi m lnh 0x02 vo LCD th
cursor s t ng di chuyn v home (v tr u tin trn LCD).
Hm move_LCD(uint8_t y,uint8_t x) cho php di chuyn cursor n v tr dng y, ct x.
im cn ch trong hm ny l cch tnh m lnh cn ghi vo LCD. Thc cht y l
lnh set DDRAM address. Xem li bng 2 ta thy m lnh cho lnh ny c dng
1xxxxxxx trong xxxxxxx l mt s 7 bit cha a ch ca DDRAM chng ta cn di
chuyn n. V th trc khi thc hin ghi m lnh ny, chng ta cn tnh tham s
xxxxxxx theo dng y, ct x. Xem li t chc ca DDRAM trong hnh 3, gi s mt nh
dng y v ct x trn, do dng 2 bt u vi a ch 64, 2 nh cng 1 ct trn 2 dng

s cch nhau 64 v tr (64*(y-1)). Mtkhc do v tr nh c tnh t 0 trong khi chng

ta mun gn ta x bt u t 1, v th chng ta cn thm (x-1) vo cng thc tnh.
Cui cng chng ta cn phi thm m lnh set a ch DDRAM, m 0x80. Gi tr cui
cng ca m lnh l : Ad=64*(y-1)+(x-1)+0x80 (dng 13). Cc dng lnh tip theo trong
hm move_LCD thc hin ghi gi tr m lnh vo LCD.
Cui cng l phn code hin th LCD c trnh by trong list 8. Phn hin th
bao gm 1 chng trnh con: xa LCd, hin th 1 k t v hin th 1 chui cc k t.
List 8. Hin th trn LCD.
1 void clr_LCD(){ //xa ton b LCD
2 cbi(CTRL,RS); //RS=0 mean the following data is COMMAND (not normal
DATA)
3 #ifdef
LCD8BIT
4 Write8Bit(0x01);
5 wait_LCD();
6 #else
7 Write2Nib(0x01);
8 wait_LCD();
9 #endif
10 } void putChar_LCD(uint8_t chr){ //hin th 1 k t chr ln LCD
11 sbi(CTRL,RS); //this is a normal DATA
12 #ifdef LCD8BIT
13 Write8Bit(chr);
14 wait_LCD();
15 #else
16 Write2Nib(chr);
17 wait_LCD();
18 #endif
19 } void print_LCD(char * str,) unsigned char len){ //Hin th 1 chui k
t
20 unsigned char i;
21 for (i=0; i&lt; len; i++)
22 if (str[i] &gt; 0)
23 putChar_LCD(str[i]);
24 else
putChar_LCD(' ');
25 }
26 }
27
xa ton b LCD chng ta cn gi 1 instruction c m 0x01 n LCD, hm
clr_LCD() thc hin vic ny. Lu m lnh xa LCD l 1 instruction, v th cn xa
chn RS xung 0 trc khi gi m ny xung LCD (dng 2 xa chn RS). Hm
putChar_LCD(uint8_t chr) hin th 1 k t ln LCD, gi tr tham s ca hm ny l m
ASCII ca k t cn hin th, chr. Ni dung ca hm hon ton ging hm xa LCD, ch

khc y khng phi l 1 instruction nn cn set chn RS ln 1 trc khi gi m lnh n

LCD (dng 12). M lnh cho hm ny chnh l m ASCII cn hin th.
Cui cng hm print_LCD(char *str) ">unsigned char len) cho php hin th 1
chui k t lin tip ln LCD, thc cht y l qu trnh lp ca hm hin th 1 k t.
Ch tham s len l chiu di cn hin th ca chui.
IV. V d iu khin Text LCD bng th vin myLCD.
Phn ny ti s minh ha cch s dng th vin myLCD.h hin th cc k t
ln 1 Text LCD. S dng phn mm Proteus v mt mch in gm 1 LCD 2x16
(keyword: LM016L), 1 chip Atmega32 v 1 bin tr (POT-LIN) nh tronghnh 8. To 1
Project bng WinAVR c tn l TextLCD_Demo v to file source l main.c, to makefile
vi khai bo s dng chip ATmega32 v clock 8MHz. Copy file myLCD.h vo th mc
ca Project mi to. Vit code cho file main.c nh trong list 9. Ch cc nh ngha chn
kt ni vi LCD trong phn u file myLCD.h phi ging vi kt ni tht trong hnh 8.

Hnh 8. Mch in m phng LCD vi AVR.

List 8. Chng trnh demo iu khin TextLCD, main.c.
1

#include <avr/io.h>;

2 #include <delay.h>;
3 #include "myLCD.h" //include th vin myLCD
4 int main(){
5 init_LCD(); //khi LCD
6 clr_LCD(); // xa to b LCD
7 putChar_LCD(' '); //ghi 1 khong trng
8 putChar_LCD(' '); //ghi 1 khong trng
9 putChar_LCD('D'); //Hin th kt 'D'
10 print_LCD("emo of the",10); //hin th 1 chui k t
11 move_LCD(2,1); //di chuyn cursor n dng 2, ct u tin
12 print_LCD("2x16 LCD Display",16); //hin th chui th 2
13 while (1){
14 };
s dng th vin myLCD, chng ta cn include file myLCD.h vo Project
nh trong dng 3, #include "myLCD.h". Hai dng 6 v 7 thc hin khi ng v xa
LCD. Sau , cc dng 9, 10 v 11 t 3 k t l cc khong trng v ch ci D bng
hm putChat_LCD. Dng 12 in chui emo of the ngay tip theo ch ci D trc
bng hm print_LCD. Dng 13 thc hin di chuyn cursor n v tr dng th 2, ct u
tin ca LCD trc khi tin hnh in chui th 2 2x16 LCD Display dng code 14.
Nu bn thc hin ng trnh t nh trn, kt qu thu c s nh trong hnh 8.