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Cc b vi x l ra i em li bc ngot trong khoa hc k thut, cc thit b tr nn

thng minh hn nh s iu khin theo chng trnh. Vi x l ang dn c mt trong hu ht cc
my mc thit b dn dng cng nh cng nghip. V vy vic hc tp nghin cu ng dng vi x
l trong trng hc l mt nhu cu ht sc cn thit.
phc v cho nhu cu ging dy mn hc K thut vi x l cho cc lp i hc t xa
chuyn nghnh in t vin thng, bi ging vi x l c bin son vi mc ch cung cp cho
sinh vin cc kin thc c s cn thit s dng cho vic nghin cu ng dng cc h thng vi x
l trong k thut v i sng. Bi ging bao gm 8 chng vi cc ni dung chnh nh sau:
Chng 1 cung cp cc khi nim c bn v vi x l v h thng ca n.
Chng 2 m t cu trc, cc khi chc nng trong cc b vi x l h Intel 80x86, m ch
yu l CPU 80286. Ngoi ra trong chng ny cn gii thiu v cc tnh nng ca cc b vi x l
th h sau 80286 nh 80386, 80486, Pentium.
Chng 3 m t v cu trc lnh, cc ch nh v a ch v tp lnh chi tit ca vi x
l 80286. Cho php sinh vin rt ra c cc kin thc chung nht v cc lnh vi x l v cch
tip cn trong vic lp trnh bng cc lnh hp ng. Ngoi ra chng ny cn cp ti cc vn
v lp trnh hp ng trn my vi tnh bao gm: cu trc cu lnh, cch khai bo d liu, khung
chng trnh hp ng, cc cu trc lp trnh c bn, v cc v d c bn rn luyn k nng lp
trnh bng cc lnh gi nh ca vi x l.
Chng 4 cung cp cc kin thc v vic thit k cc h thng vi x l chuyn dng bao
gm c vic thit k h thng phn cng v phn mm vi x l.
Chng 5 m t v cu trc hot ng ca cc vi mch h tr vo ra song song 8255 v
vo ra ni tip 8251.
Chng 6 m t v vi iu khin 8051 bao gm v cu trc cc khi mch phn cng, v
tp lnh v lp trnh cho vi iu khin 8051.
Chng 7 m t vic thit k h thng o rng xung v truyn d liu ni tip bng
8051. Vi cc v d ny sinh vin c th tip cn v vic thit k cc ng dng nh dng vi iu
khin.
Chng 8 l cc gii thiu v b vi iu khin 32 bit ca Motorola MC68332. y l b
vi iu khin c cc tnh nng rt mnh c ng dng nhiu trong cc thit b iu khin hin
nay.
Mong rng tp bi ging ny p ng c nhu cu ging dy mn hc k thut vi x l
ti hc vin, v kch thch c s hng th ca hc sinh sinh vin trong vic nghin cu ng
dng vi x l trong k thut v i sng hng ngy. Rt mong nhn c nhiu kin ng gp
bi ging ngy cng c hon thin hn.
Tc gi
MC LC
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Chng 1 : Kin trc ca h vi x l (2 tit)
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1.1 T chc chung ca h vi x l

1.1.1. Cng ngh LSI v s ra i ca b vi x l.
1.1.2. Phn cng v phn mm ca h thng vi x l.
1.1.3. Tng quan v phn cng h thng vi x l.
1.1.4. Tng quan v phn mm v s pht trin ca ngn ng phn mm.
1.2 T chc b nh ca h vi x l
1.2.1 Cu trc v nguyn tc lm vic ca b nh ROM , EPROM .
1.2.2 Cu trc v nguyn tc lm vic ca b nh SRAM , DRAM .
1.2.3 T chc b nh
1.3 Vo ra trong h thng vi x l.
1.3.1 Cu trc v nguyn tc lm vic ca cng vo / ra.
1.3.2 Mch ba trng thi v mch ci
1.3.3 Cc cng vo / ra n gin.
Chng 2 : Nguyn tc lm vic ca b vi x l h 80X86 Intel (6 tit)

Cu trc ca b vi x l 80286 Intel
2.1.1 S khi ca b vi x l 80286 Intel
2.1.2 Khi to a ch (AU)
2.1.3 Khi ghp knh (BU)
2.1.4 Khi lnh (IU)
2.1.5 Khi thc hin lnh (EU)
2.2
Cc thanh ghi ca b vi x l 80286 Intel .
2.2.1 Chc nng v nhim v ca cc thanh ghi a nng .
2.2.2 Cc thanh ghi qun l on
2.2.3 Thanh ghi c trng thi
2.2.4 Cc thanh ghi c bit
2.3
Nguyn tc lm vic ca b vi x l 80286 Intel .
2.3.1 nh ngha chu k lnh v chu k my
2.3.2 Qun l b nh thc v b nh o
2.3.3 Trng thi b vi x l khi khi ng
2.3.4 Ch ngt v cc u ngt ca b vi x l
2.4
Cc b vi x l cp cao ca Intel
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2.1
Chng 3 : Lp trnh Assembly cho h vi x l Intel (6 tit)
3.1 Cu trc ca hp ng.

3.1.1 B k t t kha ca hp ng
3.1.2 Cc lnh ch dn trong hp ng
3.1.3 Khung ca file chng trnh ngun Assembly
3.2
Tp lnh ca b vi x l 80X86 Intel
3.2.1 Nhm lnh chuyn d liu
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3.2.2 Nhm lnh x l d liu.

3.2.3 Nhm lnh chuyn iu khin
3.3 Lp trnh hp ng cho h vi x l Intel
3.3.1 Lp trnh chuyn mng d liu
3.3.2 Lp trnh chuyn i m (nh phn , hexa , thp phn , ascii)
3.3.3 Lp trnh iu khin thit b ngoi vi
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Chng 4 : Thit k h vi x l chuyn dng (6 tit)

4.1 Trnh t thit k h vi x l chuyn dng
4.2 T chc phn cng cho h vi x l chuyn dng .
4.2.1 La chn b vi x l
4.2.2 T chc khng gian nh thc v nh v ROM , RAM
4.2.3 Thit k cc ngoi vi theo yu cu
4.3 Xy dng phn mm cho h vi x l
4.3.1 Xy dng thut ton v lu thut ton cho h vi x l
4.3.2 Vit chng trnh ngun bng Assembly cho h vi x l
4.4 Dch v np chng trnh vo ROM cho h vi x l
Chng 5 : Cc chip IC h tr cho h vi x l (4 tit)
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5.1 Chip vo / ra lp trnh 8255

5.1.1 Cu trc ca chip 8255
5.1.2 Cc ch lm vic ca chip 8255
5.1.3 Kt ni 8255 vi h thng vi x l
5.1.4 Lp trnh khi to ch lm vic cho chip 8255
5.2 Chip truyn tin ni tip USART 8251
5.2.1 Ch truyn tin ng b v cn ng b
5.2.2 Cu trc ca chip USART 8251
5.2.3 Cc ch lm vic ca chip USART 8251
5.2.4 Ghp chip USART 8251 vi h vi x l
5.2.5 Lp trnh khi to ch lm vic cho chip USART 8251
Chng 6 : Vi iu khin 8 bit 8051 (8 tit)
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6.1 Cu trc v chc nng ca vi iu khin 8051.

6.1.1. Gii thiu v cc b vi iu khin.
6.1.2. Cu trc tng qut ca cc b vi iu khin.
6.1.3. M t phn cng cc b vi iu khin h MSC-51
6.2 Giao tip vi b nh ngoi cho vi iu khin 8051.
6.2.1. Truy xut b nh chng trnh bn ngoi.
6.2.2. Truy xut b nh d liu bn ngoi.
6.2.3. B nh ngoi s dng chung cho chng trnh v d liu
6.3 Hot ng timer ca 8051
6.3.1. Gii thiu.
6.3.2. Cc ch timer v c bo trn.
6.3.3. Ngun xung nhp.
6.3.4. Cho chy, dng v iu khin cc timer.
6.3.5. Khi ng v truy xut cc thanh ghi timer.
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6.4 B iu khin truyn tin ni tip UART ca 8051.

6.4.1 Gii thiu.
6.4.2 Thanh ghi iu khin cng ni tip.
6.4.3 Cc ch hot ng
6.4.4 Khi ng v truy xut cc thanh ghi cng ni tip
6.4.5 Truyn thng tin trong h thng a x l.
6.4.6 Tc cng ni tip.
6.5 Ngt ca vi iu khin 8051.
6.5.1. Gii thiu.
6.5.2. T chc ngt ca 8051.
6.5.3. Cc vector x l ngt.
6.5.4. Thit k chng trnh dng cc ngt.
6.5.5. Cc ngt ca 8051
6.6 Tp lnh v hng dn lp trnh trn 8051.
6.6.1 Cc ch a ch.
6.6.2 Tp lnh ca 8051.
6.6.3 Chng trnh hp ng 8051.
6.7 B nh ROM ca vi iu khin 8051.
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7.1 Thit k h o thng s tn hiu xung

7.1.1 Nguyn tc o rng xung
7.1.2 S phn cng ca h o
7.1.3 Xy dng chng trnh iu khin
7.2 Thit k h truyn tn hiu ni tip
7.2.1 S kt ni phn cng h thng vi iu khin truyn d liu ni tip.
7.2.2 Xy dng chng trnh iu khin.
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Chng 8 : Vi iu khin 32 bit MC68332 (9 tit)
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8.1 Cu trc v chc nng thnh phn ca on chip 32 bit MC68332

8.2. M un tch hp h thng SIM.
8.2.1. Khi nh cu hnh v bo v h thng.
8.2.2. Khi to clock cho h thng.
8.2.3. Khi giao tip BUS bn ngoi.
8.2.4. Khi to tn hiu chn mch.
8.2.5. Cc ng vo ra a dng.
8.2.6. Reset
8.2.7. Ngt
8.2.8. Khi kim tra phn cng
8.3 B vi x l
8.3.1. Cc m hnh lp trnh.
8.3.2. Thanh ghi trng thi chng trnh
8.3.3. Ch g ri.
8.4 Khi x l thi gian TPU
8.4.1. Cc khi chc nng trong TPU.
8.4.2. Cc chc nng thi gian ca TPU.
8.5 M un ni tip theo hng i QSM
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Chong 7 : Thit k h thng chuyn dng trn on chip 80C51 (4 tit)
HNG DN V P S BI TP
CC CH VIT TT
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8.6 TRURAM
8.6.1. Khi thanh ghi ca TPU RAM.
8.6.2. Hot ng ca TPURAM
8.7 Lp trnh hp ng cho vi iu khin MC68332
8.7.1 Cc ch a ch trong chng trnh hp ng MC68332.
8.7.2 Tp lnh ca MC68332
8.7.3 Khun dng chng trnh ngun.
8.7.4 Lp trnh khi ng SIM.
8.7.5 Lp trnh nh cu hnh cho RAM ni.
8.7.6 Lp trnh cho QSM.
8.7.7 Lp trnh cho TPU.
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Chng 1: Kin trc ca h thng vi x l
CHNG 1: KIN TRC CA H THNG VI X L
1.1.
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Gii thiu:
Trc ht trong chng ny sinh vin cn nm c cc khi nim v b vi x l nh :
mc ch s ra i ca b vi x l, cc khi chc nng c bn ca b vi x l, nguyn tc x l
cc cng vic v bi ton ca b vi x l, lnh ca b vi x l, chng trnh m cc b vi x l
thc hin, chc nng ca phn cng v phn mm trong h thng vi x l, cc khi chc nng
phn cng trong h thng vi x l v chc nng ca chng, cc tn hiu kt ni cc khi chc
nng phn cng, phn mm pht trin ca ngn ng phn mm h thng vi x l, lnh m my,
lnh gi nh, nguyn tc hnh thnh ngn ng cp cao, cc chng trnh hp ng, cc chng
trnh ngn ng cp cao v vic thc hin cc chng trnh ny trong h thng vi x l.
Tip theo chng ny cung cp cc kin thc v b nh bn dn. Sinh vin cn nm c
nguyn tc hot ng ca b nh bn dn, s khc nhau gia cc b nh ROM v cc b nh
RAM, gia cc loi b nh ROM v gia cc loi b nh RAM, v quan trng nht l cc t chc
cc b nh trong h thng vi x l, phng php gii m a ch b nh trong cc h thng vi x
l.
Phn cui cng sinh vin cn nm c cc kin thc v vo ra, cu trc ca cc vi mch
s m, ci v nguyn tc lm vic ca chng trong cc h thng vi x l, trng thi tr khng cao
v ngha ca chng trong kt ni h thng vi x l. V cng ging nh b nh cn nm r
nguyn tc gii m a ch vo ra trong cc h thng vi x l.
T CHC CHUNG CA H THNG VI X L
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1.1.1. Cng ngh LSI v s ra i ca cc b vi x l

Trong k thut s, chng ta c lm quen vi cng ngh ch to bn dn cho php t
nhiu cng logic trong mt vi mch (hay mt mch tch hp IC Integrated Circuits) vi din tch
khong vi mm2. Nu s cng nh hn 15 n v cng, chng c gi l mch tch hp mt
nh SSI (Small Scale Integration). T 15 ti 100 n v cng c gi l mch tch hp mt
va MSI, trn 100 cng l mch tch hp mt cao LSI v hng triu n v cng c gi l
mch tch hp mt rt cao VLSI.
Vi cng ngh ch to bn dn trn, hng ngn loi IC s khc nhau ra i vi cc chc nng
khc nhau, nhng chng u c cc tnh cht chung nh:
- u c kt ni t cc cng logic c bn.
- D liu s a ti cc ng vo s c bin i theo mt hm s nht nh thnh d liu trn
cc ng ra.
Vi cu hnh ni cng cc cng logic c bn to thnh mt IC s vi mt chc nng c
th nh trn, lm vic s dng cc IC s c cc nhc im nh: cng mt chc nng nhng s
dng nhiu ln trong mch, s phi s dng nhiu IC s. Khi mun thc hin cc cng vic khc
nhau, cn thc hin cc mch s khc nhau. V d, mt cng vic yu cu hai php cng nh phn
s phi s dng hai IC cng khc nhau. Nu c nhiu hn mt php tnh so vi mch thc hin
s cn phi lm mt mch khc.
Vi s ra i ca cng ngh LSI, cho php tch hp rt nhiu cng logic trong mt vi mch
nh, ngi ta ngh n chuyn thit k mt IC s c th thc hin mi chc nng s m khng cn
phi thay i mch in. Nguyn tc thc hin ca loi IC s ny c th biu din trong s
khi hnh 1.1.
Chn hm
x l d
liu
S bao gm khi cc hm s c bn v cc b m c kt ni vi nhau thng qua

cc mch kim sot (khng kt ni c nh, m ch kt ni khi c cc tn hiu cho php). D liu
c th di chuyn t b m ny ti b m khc v t cc b m ti x l ti cc hm c bn khi
c cc tn hiu cho php thch hp. Mt chc nng s phc tp (mt bi ton hay mt cng vic
no ), thay v phi thc hin bng mt mch s ni cng, c th thc hin tng bc bng cch
tun t thc hin cc hm s c bn trong IC ny. Vi cu hnh ny, s c th thc hin mi
chc nng s phc tp m khng cn thay i mch kt ni cc IC s. y l cu hnh c bn nht
ca mt b vi x l.
Chn b m
cung cp d
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Cc hm s c bn
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Hnh 1.1: S khi cu to c bn ca vi x l.
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Nh vy vi x l l mt IC s c tt c cc hm s c bn, thc hin mt chc nng s

phc tp n s tun t thc hin cc chc nng s c bn theo mt trnh t thch hp. thc
hin mt chc nng s c bn, cn phi cung cp cho vi x l cc tn hiu chn d liu trong cc
b m v tn hiu chn hm s x l d liu . Cng vic ny c gi l cung cp mt lnh
cho vi x l. thc hin mt bi ton hay mt cng vic no , cn phi thc hin tun t cc
hm s c bn theo mt trnh t nht nh, c ngha l phi cung cp cho vi x l mt tp hp cc
lnh sp xp theo mt gii thut hp l gi l mt chng trnh.
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1.1.2. Phn cng v phn mm ca h thng vi x l

Vi cu to bao gm cc hm s c bn v cc b m nh m t trn, cc b vi x
l khng th hot ng mt mnh, m chng cn c kt ni ghp vi cc mch ph cn nh:
mch cung cp xung nhp, b nh lu tr chng trnh, cc giao tip lin lc vi ngi s dng
hay thit b iu khin. Nguyn tc cu to v cch thc kt ni gia vi x l v cc mch ph cn
cn thit ca n c gi l cng ngh phn cng ca h thng vi x l (Hardware).
Cc chng trnh
phn mm
H thng mch
in t s
Cc thit b xut
nhp v chp hnh
iu khin
Hnh 1.2: S khi m t hot ng ca h thng vi x l.

h thng mch phn cng c kt ni ng c th thc hin mt bi ton, mt
cng vic, cn cung cp cho vi x l mt chng trnh thch hp. Cng vic to ra cc chng

trnh cung cp cho cc h thng vi x l hot ng c gi chung l cng ngh phn mm
(Software). C th m t c ch ca mt h thng vi x l trn hnh 1.2.
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1.1.3. Tng qut v phn cng h thng vi x l

Phn cng mt h thng vi x l bao gm 3 khi mch chnh trn hnh 1.3 bao gm:
- B vi x l, hay cn c gi l n v x l trung tm CPU (Central Processing Unit) c
nhim v thc hin tt c cc lnh m chng trnh yu cu. N ng vai tr l ch trong h
thng, quyt nh s hot ng ca cc linh kin khc trong mch.
- Khi b nh lu tr cc chng trnh cung cp cho vi x l thc hin, ngoi ra n cn s
dng lu tr cc bin trung gian cng nh cui cng trong cc qu trnh tnh ton.
- Cc b vo ra kim sot vic truyn d liu gia CPU v cc thit b ngoi vi nh bn phm,
mn hnh,. Cc thit b ngoi vi c th l cc thit b cho php h thng vi x l v ngi
s dng c th lin lc vi nhau, hoc cc thit b thc hin mt cng vic no theo s
iu khin ca vi x l.
Trong h thng vi x l, CPU ng vi tr l thnh phn iu khin kim sot mi hot
ng ca cc vi mch ph tr (b nh v vo ra) khc. V vy, cc mch ph tr s c kt ni
vi CPU bng mt h thng ng dn in gi l BUS. BUS c chia thnh 3 loi: BUS d
liu, BUS a ch v BUS iu khin.
BUS d liu c nhim v truyn d liu gia CPU v cc b nh hoc vo ra cc thnh
phn trong h thng c th hiu c nhau. V d nh: cc lnh c CPU ly t b nh qua BUS
d liu, hot ng ca cc thit b ngoi vi c CPU iu khin v kim sot bng BUS d liu.
Cc CPU truyn thng s dng mt BUS d liu duy nht truyn d liu vi tt c mi ni
trong h thng, v vy iu khin c tng thnh phn mt cch c lp, ti mt thi im
thng thng CPU ch truyn d liu vi mt v tr duy nht, v tr ny c xc nh bng trng
thi ca BUS a ch. H thng phi c kt ni sao cho ng vi mt a ch m CPU to ra, ch
c mt v tr duy nht c xc nh ti, cng vic ny c gi l gii m a ch trong h thng
vi x l. Ngoi ra b nh hoc vo ra, (xc nh bng BUS a ch) c th c nhiu ch hot
ng khc nhau vi CPU, cc ch ny c thng bo qua li vi CPU thng qua BUS iu
khin. V d, khi c d liu t b nh CPU thng bo bng tn hiu MEMRD (memory read)
tch cc, cn khi ghi d liu ti b nh n thng bo bng tn hiu MEMWR.
Chng
trnh
B
nh
CPU
I/O
Thit
b
ngoi
vi
Hnh 1.3: S khi h thng vi x l
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Chng trnh hp
ng
(cc lnh gi nh)
Chng trnh m
my
(tp hp cc bit 0
v 1)
H thng mch
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1.1.4. Tng qut v phn mm v s pht trin ca cc ngn ng phn mm

Nh bit, h thng vi x l l mt h thng mch in t s hot ng theo chng
trnh. V l h thng mch in t s, nn cc chng trnh cung cp cho vi x l hot ng phi
di dng 0, 1 gi l chng trnh m my. Nhng do ngn ng my ch n gin l t hp ca
cc bit 0 v 1 nn rt kh nh, kh kim tra i vi ngi s dng. khc phc nhc im
ny, ngi ta t cho mi lnh m my thc hin mt chc nng s c bn mt tn d nh hn gi
l m gi nh. Khi lp trnh ngi ta s dng cc lnh gi nh ny, to thnh chng trnh hp
ng (assembly), vi x l thc hin c chng trnh cn phi dch n ra chng trnh m
my. Qu trnh dch mt chng trnh hp ng thnh mt chng trnh m my, c gi l qu
trnh hp dch (assembler). Hp dch c th thc hin bng cch tra bng tp lnh, khi c my vi
tnh v cc cng c son tho lu tr, ngi ta thc hin cc chng trnh hp dch qu trnh
hp dch nhanh chng v chnh xc hn.
Do ch n gin l tn ca mt lnh c bn ca vi x l, nn cc m gi nh vn cha
thc s d dng khi lp trnh, cc chng trnh hp ng thng khng c cu trc v rt kh kim
tra pht hin li cng nh lu tr s dng lu di. Cng theo cch trn, ngi ta vit ra cc
chng trnh con hp ng thc hin mt chc nng thng dng ri t thnh mt lnh ngn ng
cp cao. C rt nhiu ngn ng cp cao khc nhau ra i nh Pascal, C, basic . thc hin
cc chng trnh ngn ng cp cao, cng cn phi dch chng v dng m my. Qu trnh ny
c gi l thng dch hoc bin dch. Thng dch l qu trnh dch tng lnh ngn ng cp cao ra
mt chui lnh m my vi x l thc hin, sau mi tip tc vi lnh cp cao k tip. Cn
bin dch l dch ng thi chng trnh ngn ng cp cao ra chng trnh m my, sau mi
cung cp cho vi x l thc hin chng trnh m my .
Hnh 1.4: S pht trin ca ngn ng phn mm.
T CHC B NH CA H THNG VI X L
1.2.
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Trong h thng mch in t phn cng ca h thng vi x l m t trn hnh 1.3, b nh

l cc IC nh c gi l b nh bn dn hay b nh chnh ca h thng vi x l. Ngoi b nh
bn dn, h thng vi x l cn c cc thit b khc s dng lu tr d liu v chng trnh,
l cc thit b nh ngoi nh: a cng, a mm, a quang hc . Chng ng vai tr l
cc thit b ngoi vi ca h thng. Phn ny ch m t v cu to v nguyn tc hot ng ca cc
loi b nh bn dn.
B nh bn dn c chia thnh hai loi chnh: b nh ch c ROM (Read Only
Memory) v b nh c th c ghi c hay cn gi l b nh truy cp ngu nhin RAM
(Random Access Memory). Tuy nhin cc tn gi trn ch mang tnh cht tng i, b nh ROM
cn phi c ghi d liu trc khi c, mi loi ROM khc nhau s c cch ghi d liu khc
nhau. B nh truy cp ngu nhin, khc vi b nh truy cp tun t l c th truy cp bt k d
liu no mt cch tc thi, m khng phi truy cp tun t. Cc b nh ROM v RAM u c th
truy cp tun t.
U
.V
Trong cc h thng vi x l, b nh ROM c s dng ghi cc chng trnh v d

liu c nh nh: chng trnh khi ng h thng, chng trnh ROM BIOS ca my tnh, cc
chng trnh iu khin hot ng ca cc h thng vi x l khng c b nh ngoi .
Cc loi b nh ROM bao gm: Mask ROM l ROM c ghi d liu ngay t khi sn
xut khng th thay i c. PROM l loi ROM lp trnh c mt ln bi ngi s dng.
EPROM l b nh ROM c th lp trnh bng in v xo bng tia cc tm, EEPROM l ROM
lp trnh v xo nhiu ln bng in.
B nh RAM c s dng lm ni lu tr cc bin s ca chng trnh, n cng c th
s dng lm ni cha cc chng trnh np vo t cc thit b nh ngoi CPU thc hin. B
nh RAM c chia thnh hai loi chnh l: RAM tnh SRAM v RAM ng DRAM. SRAM lu
tr d liu theo nguyn tc ca cc Flip Flop, nn n s lu tr d liu ghi vo n cho n khi
c mt d liu khc c ghi ln, hoc cho n khi mt ngun cung cp. DRAM lu tr d
liu bng cc t nh nn cc mc 1 sau mt thi gian s b tiu hao qua cc mch ph cn, v vy
DRAM yu cu chu k lm ti.
Gii
m a
ch
PE
A0
A1
+Vcc
.P
TI
T.
ED
1.2.1. Cu trc v nguyn tc lm vic ca b nh ROM

Hnh 1.5 m t nguyn tc cu to ca b nh PROM. Trong hnh v ma trn nh bao
gm 4 hng v 8 ct. Ti mt thi im tng ng vi trng thi hai ng vo A1A0 s c 1 trong
4 hng mang trng thi 0. Trng thi ca 8 ct s tu thuc vic ni hay khng ni hng v ct
tng ng bng diode. Tng ng vi im ni trng thi ca ct s bng 0, khng ni l 1. ng
vi trng thi ca ng vo A2 b multiplex s chn 4 ct T3 T0 hoc P3 P0 cung cp ra cc
ng D3 D0. Nh vy b nh s bao gm 8 nh, mi nh cha 4 bit d liu. ng vi mt
trng thi ca A2A1A0 s c mt nh c chn.
A2
T3 P3 T2 P2 T1 P1 T0 P0
Multiplex
D3
D2
D1
D0
Hnh 1.5: Nguyn tc cu to ca b nh ROM.
Mi loi b nh ROM s c cch kt ni cc im ca ma trn nh khc nhau nh trn

hnh 1.6. Mask ROM c cc im ca ma trn nh c kt ni ngay khi sn xut. B nh PROM
kt ni cc im ma trn nh bng cc diode v cc cu ch mnh, khi lp trnh cn cung cp dng
in ln lm t cc cu ch ti cc im mun lu tr cc bit 1. i vi cc b nh
EPROM v EEPROM cc im ma trn nh c kt ni bng cc transistor MOS, khi lp trnh
cn cung cp in trng ca in p cao cc ht him nng lng chuyn qua bn dn cc
cng, knh dn mt kh nng dn in, im ma trn gi bit 1. Nu mun xo cc bit 1 ghi c

th dng in trng in p cao (EEPROM) hoc nng lng cung cp bng tia cc tm
(EPROM) cc in t t do tr v knh dn.
B
B
B
VD
W
W
W
U
.V
GN
Diode
MOS ROM
MOS ROM
PE
.P
TI
T.
ED
Hnh 1.7: Ni cc im ma trn nh ca cc loi ROM.

Ngoi cc tn hiu a ch v iu khin cc b nh ROM cn c cc tn hiu iu khin,
hnh 1.8 m t cc tn hiu ca EPROM 2764 trong :
A12 A0 : Cc ng a ch.
D7 D0 : Cc ng d liu.
CE (Chip Enable): Tn hiu chn mch, tn hiu ny khng tch cc BUS d liu s trng thi
tr khng cao.
OE (Output Enale): Tn hiu cho php xut cho php b m d liu ng ra cung cp d liu t
bn trong ra ngoi cc ng D7 D0.
VPP : Ng vo in p cao cung cp ngun lp trnh cho EPROM.
PGM: Ng vo cung cp xung lp trnh cho EPROM.
10
9
8
7
6
5
4
3
25
24
21
23
2
22
27
20
1
U1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
D0
D1
D2
D3
D4
D5
D6
D7
11
12
13
15
16
17
18
19
OE
PGM
CE
VPP
2764
Hnh 1.8: Cc tn hiu EPROM 2764.
1.2.2. Cu trc v nguyn tc lm vic ca b nh RAM

WL
RL
M3
VD
RL
BL
BL
M2
U
.V
M1
M4
Hnh 1.9: Cu to mt bit nh SRAM.
BL 1
PE
RWL
WWL
.P
TI
T.
ED
Hnh 1.9 m t cu to ca mt bit nh SRAM, trong s khi cp ngun mt trong hai

transistor M1 hoc M2 dn, gi s M2 dn Q = 0 nn M1 khng dn, lc ny cc ng BL v
BL\ s c cung cp ti mch khuch i c cung cp d liu mc 0 khi c chn. ghi
mt d liu, chn bit nh bng cch cung cp mc 1 ti WL lm cc transistor M3 v M4 dn,
cung cp mc 1 ti ng BL (BL\ = 0) lm M2 tt, M1 dn, bit nh s lu tr d liu 1.
Ngoi tn hiu chn mch CE cho php xut d liu OE nh b nh EPROM, cc b nh
SRAM cn c thm tn hiu cho php ghi WE, ch ghi tn hiu ny tch cc d liu mi c lu
tr vo b nh.
Cu to mt bit nh DRAM mt transistor m t trn hnh 1.10. ghi d liu ti bit nh
ny cn cung cp mc 1 ti WWL v cung cp d liu ghi ti BL1, transistor BL1 s dn, in p
s c np cho t Cs. Khi c cp mc 1 ti RWL lm M3 dn, khi Cs gi mc 1 M2 dn ng ra
BL2 tng ng vi mc 0 v mch khuch i c s cp ra ngoi mc 1.
M1
CS
WWL
M3
BL2
M2
RWL
V DD 2 V T
X
BL 1
V DD
BL 2
V DD 2 V T
DV
Hnh 1.10: Cu to bit nh DRAM.

1.2.3. T chc b nh
Nh m t trn, b nh lu tr cc d liu theo cc a ch duy nht, trn hnh 1.11

tng ng vi trng thi 1 ng Si = 0 mt nh s c chn. gim bt s tn hiu chn
phi cung cp c th dng b gii m a ch, nu cn N tn hiu cho vic chn N nh ch cn
cung cp K ng a ch (K = logN).
M bits
S0
M bits
S0
Word 0
T bo
Nh
Word 2
A0
Word 1
A1
Word 2
A K-1
S N-2
Word N-2
S N-1
T bo
nh
Word 1
S2
Word 0
U
.V
S1
Word N-2
Word N-1
Word N-1
ED
K = log2N
Vo - Ra
( M bits)
Vo - Ra
( M bits)
T.
Hnh 1.11: T chc lu tr cc bit trong b nh.
TI
Vi cu trc trn vi dung lng nh ln, ma trn nh s mt i xng (nhiu hng, t

ct), ma trn nh i xng c th s dng thm b gii m ct nh hnh 1.12. Tng ng vi
mt trng thi ca cc a ch ct s chn c mt nhm ct duy nht cung cp d liu ra bn
ngoi.
Storage cell
Row Decoder
AK
Bit line
.P
2L 2 K
Word line
AK1 1
PE
AL2 1
A0
A K2 1
M.2K
Sense amplifiers / Drivers
Column decoder
Selects
word
Input-Output
(M bits)
Hnh 1.12: T chc cc khi chc nng trong b nh.

Khi CPU mun truy cp (c ghi) d liu t b nh, trc ht n phi cung cp a ch
xc nh ti v tr cn truy cp, sau cn cung cp tn hiu chn mch (CE) cho php b nh

hot ng, tip theo trong ch c CPU cn cung cp tn hiu OE v nhn d liu t BUS d
liu, trong ch ghi CPU cn cp d liu ti BUS d liu v tn hiu cho php ghi WE.
Cc i lng c trng cho b nh l dung lng v thi gian truy xut b nh. Thi
gian truy xut b nh l khon thi gian t lc b nh nhn c a ch v cc tn hiu iu
khin cho n khi a c d liu ra tuyn d liu trong ch c v lu xong d liu vo cc
bit nh trong ch ghi. B nh c thi gian truy xut cng nh th hot ng cng nhanh.
Dung lng b nh tu thuc vo s ng d liu v s ng a ch ca n. B nh c
A ng a ch, D ng d liu s c dung lng 2A x D bit. B nh c dung lng cng ln th
cng cha c nhiu thng tin.
A 17
:
U
.V
A0
D7
:
D0
RD
WR
A 19
A 18
I1
I0
O3
256 KB
#4
CS
A 17
A 17
A0
D7
A0
D7
:
D0
RD
WR
O2
8088
Minimum
Mode
256 KB
#3
ED
D0
MEMR
MEMW
CS
A 17
:
A0
D7
T.
.P
TI
O1
O0
D0
RD
WR
256 KB
#2
CS
A 17
:
A0
D7
:
D0
RD
WR
256 KB
#1
CS
PE
Hnh 1.13: Gii m kt ni 4 b nh trong h thng vi x l.

B nh s dng trong h thng vi x l thng t chc theo n v truy xut l byte, cc
IC nh c kt ni sao cho truyn d liu vi CPU theo bi s ca byte. Trong thc t, b nh
bn dn c sn xut theo dng cc linh kin c dung lng hn ch (t vi KB cho n c vi
chc MB). Trong h thng vi x l thng c t nht hai loi b nh (ROM v RAM), mt khc
trong trng hp dung lng cc IC b nh khng p ng dung lng b nh ca h thng
khi thit k, nh thit k phi ghp nhiu IC nh li. Cc IC nh s s dng chung cc BUS d
liu v a ch, v vy ti mt thi im truy xut h thng phi c kt ni sao cho ch c mt
IC nh c chn, cng vic ny c gi l gii m a ch b nh.
Vic gii m a ch c th thc hin theo nhiu cch khc nhau, hnh 1.13 s dng b gii
m 2 ra 4 kt ni 4 IC nh 256 KB thnh dung lng nh 1 MB.
Theo s kt ni, mi IC nh trong mch s c mt vng a ch ring bit vng a ch
cho tng IC nh trong hnh 1.13 nh sau:
:
000000H
3FFFFH
256KB u tin
256KB th hai
:
400000H
7FFFFH
256KB th ba
:
800000H
BFFFFH v
256KB th t
:
C00000H
FFFFFH.

Cng vic xc nh vng a ch cho tng IC nh trong mt h thng vi x l c gi l
lp bn b nh.
1.3.
VO RA TRONG H THNG VI X L
.P
TI
T.
ED
U
.V
1.3.1. Cu trc v nguyn tc lm vic ca cng vo ra

Trong h thng vi x l, thng thng s dng nhiu thit b ngoi vi khc nhau, cc thit
b ngoi vi ny s dng giao tip vi ngi s dng, hoc l cc thit b chp hnh s iu
khin ca h thng vi x l trong mt ng dng no . iu khin cc thit b ngoi vi hot
ng, CPU cn truyn d liu vi chng. CPU s dng chung mt BUS d liu truyn d liu
vi tt c cc b nh v thit b ngoi vi. Cc cng vo ra ng vai tr l cc cng ngn cch gia
cc thit b ngoi vi v BUS d liu, cc cng ny ch m khi c CPU cung cp ng a ch
ca n, v cc cng cn li c a ch khc s khng c m.
CPU lun s dng cc lnh truyn ng thi nhiu bit trn tt c cc ng d liu vi
bn ngoi. Tuy nhin cc cng vo ra sau khi nhn d liu t CPU c th truyn ng thi tt c
cc bit hoc c th truyn tng bit ti thit b. Cc cng vo ra truyn ng thi tt c cc bit c
gi l cc cng vo ra song song, cc cng truyn tng bit l cng vo ra ni tip. Cc cng vo ra
ni tip s c li im l s lng dy dn truyn d liu s t hn loi song song, v trnh c
nhiu gia cc ng truyn song song khi d liu c truyn vi tc cao.
Ngoi ra c nhng loi thit b truyn nhn d liu di dng s 0, 1. Nhng cng c cc
thit b truyn nhn d liu di dng tn hiu thay i lin tc theo thi gian, khi cn phi s
dng cc ADC cho chiu nhn d liu v DAC cho chiu truyn d liu.
Cc vo ra cng c th truyn d liu mt cch th ng, hoc c cc tn hiu bt tay vi
thit b chc chn l thit b c kt ni vi vo ra v d liu c thit b truyn nhn vi
vo ra.
PE
1.3.2. Mch ba trng thi v mch ci

Mch ba trng thi l cu trc s c bn nht thng c s dng trong tt c cc loi
cng vo ra ca h thng vi x l. Cu to ca cng ba trng thi c m t trn hnh 1.14.
D Q
OC
Cng m 3 trng thi
Cng ci
Hnh 1.14: Cc cng vo ra s c bn
Vi cc cng ba trng thi, d liu s c truyn qua n khi tn hiu cho php OC trng
thi tch cc, v vy tn hiu cho php ny thng c cp t b gii m a ch, nh trn hnh
1.15 cng m 3 trng thi s m khi a ch cung co t CPU l FFFFH = 1111 1111 1111
1111B. Khi tn hiu cho php khng tch cc, ng ra ca cng m s trng thi tr khng cao,
ng vo s khng nh hng ti ng ra, nh vy BUS d liu s c ngn cch vi thit b ngoi
vi m n iu khin, lc ny CPU c th s BUS d liu lin lc vi mt thit b khc, tng
ng vi mt a ch khc.
Khc vi cng m, cng ci s gi nguyn trng thi logic ng ra ca n khi tn hiu
10

cho php ht tch cc (n khng chuyn qua trng thi tr khng cao). Cc cng ci s thch hp
vi cc thit b ra cn gi nguyn logic iu khin sau tc ng ca lnh, v d bng n LED ni
vi cng m s tt khi CPU thc hin xong lnh truyn d liu, v CPU ngng cp a ch lm
ng ra cng m chuyn qua trng thi tr khng cao. Nu s dng lm cng vo, ng ra cng ci
cn c ni tip vi mt cng m trc khi ni ti BUS d liu.
74LS244
Q0
...
D0
...
D Q
G
Q7
.P
D7
Q0
...
TI
...
OC
74LS373
T.
D0
ED
U
.V
1.3.3. Cc cng vo ra n gin

Cc cng vo ra n gin l cc mch tch hp ca cc cng m ci c bn, cc mch vo
ra mt chiu c bn thng dng nht l cc IC 74244 v 74373 vi cu to nh hnh 1.15.
IC 74244 c tch hp tm cng m c bn, n s truyn ng thi 8 bit s t cc ng vo D ti
cc ng ra Q khi OC tch cc mc 0. Vi mch ci mt chiu 74373 d liu vo cc ng D s
c gi cc ng ra Q ca cc Flip Flop, khi OC tch cc mc thp d liu s cung cp ti cc
ng ra Q. Nh vy khi s dng lm ng vo, CPU cn cung cp a ch tch cc OC, cn khi s
dng lm cng ra c th tc ng tch cc ti chn G, cn OC c th lun cung cp mc 0.
IC74374 khc 74373 ch tn hiu cho php G s tc ng cnh ln (thay v tc ng mc cao).
Mt s thit b vo ra cn truyn d liu theo c hai chiu vi CPU, IC m ci hai chiu
74245 thng c s dng cho cc ng dng ny. Vi IC 74245 mi ng d liu s bao gm
hai cng m ni ngc chiu, tn hiu DIR s quyt nh chiu truyn d liu nh m t trn
hnh 1.16.
Hnh 1.15: Cc cng vo ra mt chiu c bn.
OC
PE
Tm tt ni dung hc tp:
Trong chng ny cn nh cc khi nim:
Vi x l l mt vi mch s c th thc hin c tt c cc chc nng ca cc vi mch s khc

bng cch thc hin tun t cc chc nng s c bn.
Mt lnh ca b vi x l l chui cc bit 0, 1 cung cp vi x l thc hin c mt chc

nng s c bn ca n.
Mt chng trnh vi x l l mt chui cc lnh c sp xp theo gii thut ca bi ton hay

cng vic cn thc hin.
c h thng vi x l hot ng c cn c kt ni phn cng ng v chng trnh phn

mm hot ng ng.
Phn cng h thng v x l bao gm: CPU, b nh v vo ra. CPU thc hin cc chng trnh
iu khin hot ng ca ton b h thng. B nh l ni lu tr cc chng trnh, l ni
khai bo cc hng v bin trong chng trnh. Vo ra giao tip vi cc thit b bn ngoi.
Cc khi trong h thng vi x l c kt ni vi nhau bng mt lot cc ng dy dn in,

mi ng ny c gi l mt tn hiu ca h thng, cc tn hiu c chia thnh 03 nhm
11

chnh gi l ba BUS: BUS a ch, BUS d liu v BUS iu khin. BUS d liu truyn d
liu gia cc khi. CPU s dng mt BUS d liu truyn d liu vi mi ni nn n cn
BUS a ch xc nh v tr no s truyn d liu vi n. BUS iu khin s xc nh cc
ch lm vic khc nhau ca h thng.
B nh bn dn c ba ch lm vic chnh l c, ghi v khng chn. Khi khng chn cc
BUS a ch v d liu ca b nh trng thi tr khng cao. Khi mun c b nh cn tc
ng tn hiu chn b nh, cung cp a ch xc nh nh s c trong b nh, cung cp tn
hiu yu cu c v b nh s cung cp d liu ra BUS d liu. Khi mun ghi b nh cng
cn cung cp tn hiu chn b nh, cung cp a ch nh s ghi, cung cp d liu cn ghi v
cung cp tn hiu yu cu ghi.
Cc b nh RAM c th c ghi bng cc logic iu khin thng thng ca vi x l, b nh

ROM ch c th c bng cc logic iu khin thng thng, mun ghi d liu vo n cn c
cc ch iu khin c bit.
Gii m a ch b nh l thc hin mch in sao cho ng vi mt a ch m CPU cung cp

ch c mt vi mch nh duy nht c cung cp tn hiu chn mch, cc vi mch nh cn li
s khng c chn v c cc BUS trng thi tr khng cao v chng s khng kt ni v
in vi h thng.
Cc b m v ci s truyn d liu ng vo ti ng ra khi c tn hiu chn mch. Khi khng

c chn cc b m s c ng ra tr khng cao, cn cc b ci s gi li trng thi ra trc
.
Cc b m ci c s dng lm cc cng vo ra cho php thit b truyn d liu vi CPU

ch khi CPU cp ng a ch chn n, trong khi cc cng khng ng a ch s khng
c chn v chng khng kt ni v mt in vi CPU.
Tng t nh gii m b nh, gii m vo ra s l mt mch sao cho ng vi mt a ch m

CPU cung cp ch c mt cng vo ra duy nht c chn.
TI
T.
ED
U
.V
.P
BI TP:
PE
Bi 1: Cho bit a ch bt u ca mt vng nh Ram l 00000H v dung lng ca vng nh

ny l 641KB. Hy xc nh a ch vt l cui cng ca vng nh ny.
Bi 2: Thit k vng nh RAM 1MB x 8bit t cc b nh RAM 256K x 4 bit, v bn b nh
v cho bit vng a ch m cc b nh c chn.
Bi 3: Thc hin mch gii m a ch cho cc bn b nh sau:
EPROM (256KB)
EPROM (256KB)
EPROM (256KB)
SRAM (512KB)
SRAM (256KB)
EPROM (256KB)
SRAM (512KB)
SRAM (256KB)
EPROM (256KB)
EPROM (256KB)
SRAM (128KB)
SRAM (128KB)
SRAM (256KB)
SRAM (128KB)
SRAM (256KB)
SRAM (256KB)
SRAM (256KB)
SRAM (128KB)
SRAM (128KB)
EPROM (512KB)
EPROM (512KB)
EPROM (512KB)
12
PE
.P
TI
T.
ED
U
.V
Cho bit vng a ch ca tng b nh trong cc bn (cc b nh u c 8 bit d liu).

Bi 4: Thc hin cng ra iu khin tm LED n c a ch l F000H.
Bi 5: Thc hin cng vo nhn d liu t 8 phm nhn c a ch l F000H.
Bi 6: Thc hin mch gii m a ch vo ra trong h thng c 2 cng ra v hai cng vo s dng
cc b m ci 8 bit.
13
Chng 2: Nguyn tc lm vic ca b vi x l h Intel 80x86
CHNG 2: NGUYN TC LM VIC CA B VI X L

H INTEL 80X86
CU TRC CA B VI X L 80286 INTEL
TI
2.1.
T.
ED
U
.V
Gii thiu:
Ni dung chng ny trc ht gii thiu v cu trc ca b vi x l 80286 v chc nng cc
khi mch ca n nh: khi giao tip BUS (BU) tc ng mi tn hiu giao tip vi th gii
bn ngoi., khi gii m lnh (IU) thc hin chc nng to ra cc tn hiu iu khin cc khi
mch trong CPU hot ng thc hin lnh, khi EU thc hin cc lnh, khi AU to ra a ch
giao tip vi b nh v vo ra.
c th thc hin c cc chng trnh hp ng vit cho vi x l h Intel (chng 3), sinh
vin cn nh cc thanh ghi ca 80286, v cc chc nng m chng m nhn bao gm: cc thanh
ghi a nng, cc thanh ghi on, thanh ghi c trng thi v cc thanh ghi c bit. c bit ch
ti s tc ng ca cc c trng thi trong thanh ghi c.
hiu c nguyn l hot ng ca h thng vi x l cn c bit quan tm ti cc chu k
my ca CPU. Trong bn chu k my: c, ghi b nh v c ghi vo ra cn ch ti thi im
tc ng ca cc tn hiu trong h thng, v chc nng ca chng s dng lm g trong h thng.
Ngoi ra cng cn ch ti trng thi ca cc c cc thanh ghi ca 80286 sau khi khi ng
v c ch ngt ca CPU. C ch ngt c s dng rt ph bin trong cc h thng vi x l trong
cc ng dng thc t, c bit l i vi cc h thng iu khin hot ng ca my mc thit b.
Cc c ch qun l b nh o rt quan trng khi lp trnh h thng chy trong cc mi trng
a nhim, tuy nhin i vi cc chc nng ng dng nh s cha cn ch ti cc c ch ny.
Phn cui cng ca chng gii thiu v cc b vi x l th h tip theo ca 80286 vi cc
chc nng tin tin nh: b nh m, c ch pipeline, c ch siu phn lung
.P
ADDRESS UNIT (AU)
SEGMENT
BASE
SEGMENT SEGMENT
LIMIT
SIZE
CHECK
PE
OFFSET
ADDER
ADDRESS
LATCH AND DRIVER
PHYSICAL
ADDRESS
ADDER
PROCESSOR
EXTENTION
INTERFACE
PREFETCH
BUS CONTROL
DATA
TRANSCEIVERS
6 BYTE
PREFETCH
QUEUE
BUS
UNIT (BU)
ALU
REGISTER
CONTROL
LIMIT
CHECK
EXECUTION UNIT (EU)
INSTRUCTION
UNIT (IU)
3 DECODER INSTRUCTION
INSTRUCTION
DECODER
QUEUE
Hnh 2.1: S khi b vi x l 80286
14
2.1.1. S khi ca vi x l 80286 Intel

B vi x l 80286 c cu to t 4 khi chc nng c th lm vic song song:
- Khi giao tip BUS : BU (Bus Unit).
- Khi gii m lnh
: IU (Instruction Unit)
- Khi thc hin lnh : EU (Execution Unit)
- Khi to a ch : AU (Address Unit)
U
.V
2.1.2. Khi to a ch (AU)

AU m bo vic qun l, bo v b nh, tu theo ch a ch cc chng trnh s s dng
cc loi a ch logic khc nhau, AU c nhim v chuyn cc a ch logic qun l trong chng
trnh phn mm thnh a ch vt l cung cp ti BU giao tip vi bn ngoi. a ch vt l l
a ch cung cp trc tip cho b nh v vo ra, cn a ch logic l cc gi tr c chng trnh
qun l s dng to ra a ch vt l, chnh l cc a ch on (segment) v a ch di
(offset).
TI
T.
ED
2.1.3. Khi giao tip BUS (BU)

BU cung cp cc tn hiu a ch, d liu v iu khin truy cp cc b nh v vo ra. Khi
ny cng cho php giao tip vi b ng x l hoc cc b vi x l khc.
Chc nng quan trong nht ca BU l t ng kch hot qu trnh ly lnh t b nh bng b
tin truy cp lnh (Prefetch). BU cn c chc nng cho php qu trnh ly lnh t b nh thc
hin song song vi cc qu trnh khc nh hng i lnh 6 byte (Prefetch queue).
Cc a ch m AU to ra cung cp ti cc b ci (Address Latch) v s c nh thi cung
cp ra bn ngoi ti cc thi im thch hp. D liu truyn vi CPU s c chuyn qua cc
cng m hai chiu (Data Transceivers).
.P
2.1.4. Khi gii m lnh (IU)

Lnh c BU ly vo hng i, trong khi IU ly lnh ly trc gii m v chuyn ti
hng i lnh gii m (Decoded Istruction queue) EU thc hin.
Vi chc nng gii m lnh, cc lnh ngoi b nh c th m ho ngn nht c th, IU s to
ra cc tn hiu iu khin cn thit t cc m lnh ny. Bng cch s dng h gii m lnh, dung
lng nh ca h thng s yu cu t hn, thi gian ly lnh s c gim ngn.
PE
2.1.5. Khi thc hin lnh (EU)

EU thc hin cc lnh x l d liu m IU gii m, n giao tip d liu vi bn ngoi
thng qua BU.
Cc khi chc nng ca EU bao gm: B iu khin (Control) thc hin vic iu khin vic
thc hin cc lnh trong EU. ALU l khi thc hin cc php ton s hc logic, cu trc ca ALU
thng thng c hai ng vo nhn hai ton hng v mt ng ra cung cp kt qu.
Cc thanh ghi s dng lm ni lu tr d liu s dng trong cc php tnh v cc gi tr a
ch cho php EU ly cc ton hng t bn ngoi.
2.2. CC THANH GHI CA B VI X L 80286

Cc thanh ghi l mt b phn rt quan trng trong mt CPU. Chng l mt s t cc nh
c tc truy xut rt nhanh, cch nh a ch n gin CPU c th truy xut d liu mt
15

cch nhanh chng. CPU c cng nhiu thanh ghi, th tc thc hin mt chng trnh cng cao,
do gim c thi gian truy xut cc hng, bin ngoi b nh. Gim c s byte lnh do khng
phi cung cp a ch cc d liu ton hng. Nhng tt nhin khi s lng thanh ghi qu ln th
vic truy cp chng cng tr nn phc tp nh i vi cc nh.
d dng truy xut, cc thanh ghi c chia ra cc nhm vi cc chc nng ring bit no
. Cc hng sn xut khc nhau a ra cc tn gi cc thanh ghi khc nhau. 80286 c cc nhm
thanh ghi: Cc thanh ghi a nng, cc thanh ghi qun l mng, cc thanh ghi iu khin v trng
thi v cc thanh ghi c bit.
PE
.P
TI
T.
ED
U
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2.2.1. Cc thanh ghi a nng

Cc thanh ghi a nng c th s dng cho nhiu chc nng khc nhau. Thng thng cc
thanh ghi a nng trc ht m nhim chc nng cha d liu, ngoi ra cc thanh ghi ny c th
s dng cho cc chc nng khc nh: cha a ch, lm b m, ....
Intel 80286 c tm thanh ghi a nng 16 bit, cc thanh ghi ny u c th s dng lm thanh
ghi cha d liu 16 bit nh m t trn hnh 2.2.
Cc thanh ghi AX, BX, CX v DX c th chia thnh hai phn 8 bit ring bit s dng cho
vic lu tr cc d liu 8 bit: AH, AL, BH, BL, CH, CL, DH, DL.
Thanh ghi AX (Accumulator) cn mang chc nng thanh ghi cha trong cc lnh nhn v
chia, trong cc lnh ny thanh ghi AX gi mt ton hng v kt qu cui cng. V d trong lnh
MUL BX d liu trong thanh ghi AX s nhn vi d liu trong thanh ghi BX v kt qu cha
trong thanh ghi DX v AX.
Thanh ghi BX (base) trc ht c th s dng lm thanh ghi gi a ch b nh, v d trong
lnh MOV DH,[BX] d liu ti nh c a ch gi trong BX s chuyn vo thanh ghi DH. BX
cn gi chc nng thanh ghi con tr c s, khi s dng trong chc nng ny thanh ghi BX gi gi
tr a ch c s, a ch truy cp b nh s bng gi tr cha trong BX cng vi mt gi tr ch th
trong lnh. V d trong lnh MOV DL,[BX+03] d liu trong b nh t a ch [BX+03] c di
chuyn vo trong thanh ghi DL. Thanh ghi BX cn s dng trong ch a ch tng i ch s
c s, trong lnh MOV CH,[BX+DI+08] d liu ti nh c a ch BX+DI+08 c ly vo
thanh ghi CH.
Hnh 2.2: Cc thanh ghi a nng ca b vi x l Intel 80286.

Thanh ghi CX (Counter) c s dng lm b m s ln lp trong cc cu trc lp. V d
lnh LOOP L1 s gim CX i 1, nu CX 0 iu khin chng trnh s chuyn ti nhn L1.
16
U
.V
Thanh ghi DX (data) l thanh ghi cha d liu cho cc lnh nhn chia 16 bit, nh trong lnh
MUL BX thanh ghi DX cha 16 phn cao ca kt qu lnh nhn. Ngoi ra thanh ghi DX cn l
thanh ghi duy nht lu tr a ch cng trong cc lnh vo ra. V d trong lnh IN CL,[DX] d
liu ti cng vo ra c a ch cha trong DX s c chuyn vo thanh ghi CL.
Thanh ghi ch s ngun SI (Source Index) v thanh ghi ch s ch DI (Destination Index), s
dng cho cc lnh x l chui d liu. V d lnh MOVSB d liu trong b nh ti a ch gi
trong SI s chuyn ti a ch gi trong DI, sau SI v DI s t ng c tng hoc gim chun
b cho ln chuyn k tip. SI v DI cn s dng lm thanh ghi a ch v a ch c s (ging nh
BX) v lm thanh ghi ch s a ch cng thm trong ch tng i ch s. V d lnh MOV
DL,[BP+SI+03] ly d liu ti nh c a ch BP+SI+03 vo thanh ghi DL.
Thanh ghi con tr c s BP (Base Pointer) gi vai tr lm thanh ghi a ch trong cc ch
truy cp b nh ging nh thanh ghi BX.
trc cc lnh PUSH
sau cc lnh PUSH
a ch cao
lastvalue
????
????
T.
????
.P
TI
????
a ch thp
ax
PUSH AX
PUSH BX
PUSH CX
????
????
lastvalue
ED
????
????
a ch cao
SP
bx
cx
SP
????
????
????
????
????
a ch thp
Hnh 2.3: Thao tc np ngn xp v s thay i ca thanh ghi SP
PE
Thanh ghi con tr ngn xp SP (Stack Pointer) ng vai tr gi a ch nh ngn xp trong

cc lnh truy cp ti ngn xp nh: lnh np ngn xp PUSH, lnh ly d liu khi ngn xp POP,
lnh gi chng trnh con CALL ....
Ngn xp l vng nh c truy cp theo nguyn tc vo trc ra sau FILO (Fist IN Last Out)
nh vo c ch t ng thay i ca SP nh m t trn hnh 2.3. Khi khi ng SP gi a ch ca
nh ngn xp, tr ti gi tr cui cng cha trong ngn xp (LastValue). Sau mi lnh PUSH gi
tr d liu s c np vo nh ngn xp v SP t ng gim i gi a ch gi tr mi ny.
Trn hnh 2.3 sau 3 lnh PUSH thanh ghi SP s gi a ch nh cha gi tr ca thanh ghi CX.
2.2.2. Cc thanh qun l on

Cc thanh ghi qun l on ca Intel 80286 chia thnh hai phn: phn cha b chn on v
phn cha b m t on. Phn cha b chn on (cn gi l thanh ghi chn on) c th np
bng chng trnh nn thng c gi l phn h. Phn cha b m t on (cn gi l cc
thanh ghi m t on) c CPU np t ng, khng th truy cp bng chng trnh nn thng
c gi l phn kn. Trong ch bo v (Protect Mode) kch thc ca mt on thay i t 1
n 5 GB, cn trong ch thc kch thc cc i ca mt on l 64KB. Ti mt thi im s
c 4 on nh xc nh bi 4 thanh ghi chn on 16 bit CS, SS, DS v ES trong :
17

+ Thanh ghi on m lnh (CS - Code Segment) cha a ch on m lnh ca chng trnh
hin hnh.
+ Thanh ghi on ngn xp (SS - Stack Segment) cha a ch on vng nh ngn xp.
+ Cc thanh ghi on d liu (DS - Data Segment), on m rng (ES - Extra Segment) cha
a ch ca cc on d liu s dng trong chng trnh.
Trong ch a ch thc CPU to ra a ch vt l truy cp b nh bng cc a ch logic l
a ch on (segment) v a ch di (offset).
Trong : a ch vt l 20 bit = a ch on 16 bit x 10H + a ch di 16 bit.
D15
T.
* NT IO PL O
ED
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2.2.3. Thanh ghi c trng thi

Thanh ghi c cn c gi l thanh ghi m trng thi CCR (Condition Code Register) bao
gm cc bit c lp. Mi bit ch c hai trng thi 0 hoc 1 c gi l cc c. Cc c rt t khi
tc ng ln nhau, chng ch tc ng mt cch c lp ty theo trng thi ca cc php tnh m
ALU thc hin. Trng thi cc c l c s CPU thc hin cc quyt nh, nu tha iu kin
chng trnh thc hin theo hng ny, cn ngc li s theo mt hng khc, to ra s r nhnh
cho cc chng trnh ph hp vi bi ton thc t. Ngoi ra cn c cc c s dng cho vic iu
khin cc ch hot ng khc nhau ca CPU, cc c ny thng thng c lp xo bng cc
lnh ring. Thanh ghi c ca 80286 bao gm 16 bit vi v tr cc bit nh m t trn hnh 2.5.
D0
TI
Hnh 2.5: Cu to thanh ghi c.
PE
.P
Cc c trng thi: Cc c trng thi tc ng theo trng thi ca kt qu cc php tnh m CPU
thc hin, cc CPU thng thng c 6 c trng thi sau:
C nh CF (Carry Flag)
C nh c s dng lm bit d tr khi kt qu cc php tnh m ALU thc hin vt ra
ngoi gii hn lu tr cho php ca thanh cha. V d khi s dng cc thanh ghi 8 bit cng
hai s 8 bit, kt qu c th l 9 bit v c C s gi bit th 9. Tng t khi cng hai s 16 bit c C
s gi bit th 17 ca kt qu.
C nh cng c thit lp mc 1 khi ALU thc hin php tr, gim hoc so snh c kt qu
m. Tc l c CF =1 khi s b tr nh hn s tr.
Ngoi ra c nh cn c s dng nh bit thm trong cc lnh quay dch, v d khi dch tri bit
MSB s b rt ra ngoi, c C s gi ly bit .
C chn l PF (Parity Flag)
C chn l c s dng thng bo s cc bit 1 trong kt qu ca php tnh logic l chn hay
l, khi PF = 1 s bit 1 trong kt qu l mt s chn. C chn l thng c s dng trong cc
chng trnh truyn cc d liu ni tip, trng thi ca c c th c pht ra bn thu c th
kim tra xem d liu nhn c ng hay sai. Ch l c chn l khng tc ng khi ALU thc
hin cc php tnh s hc.
C du SF ( Sign Flag)
Trong h thng vi x l c hai cch biu din mt s: Cch th nht n dng tt c cc bit
ca mt thanh ghi biu din mt s dng. V d mt thanh ghi 8 bit c th biu din cc s
thp phn dng t 1 ti 255. Cch th hai CPU s dng bit trng s cao nht lm bit du. V
18
PE
.P
TI
T.
ED
U
.V
d nh thanh ghi 8 bit th bit D7 s l bit du. Khi D7 mc 0 th cc bit D0...D6 gi mt s nh

phn dng nm trong khong 0 ti 127. Khi D7=1 th thanh ghi s gi s nh phn m trong
khong 128 ti -1
T hp nh phn t 0000 0000......0111 1111 biu din cc s t 0...127 t hp tip theo 1000
0000 trong s c du c xem nh l -128 v tip theo 1000 0001 = -127. Khi tip tc m ln
ti t hp 1111 1111 = -1.
C du S s bo khi du thay i, c du =0 khi kt qu php tnh trong b cha l s dng
(bit D7=0). Nu bit D7=1 kt qu l mt s m 7 bit th SF=1. Da vo c ny m cc chng
trnh ny s c cch tnh thch hp vi cc s c du.
C trn OF (Overflow Flag)
C trn OF c dng trong cc php tnh s hc c du, n ch th kt qu l mt s dng
ln hn hoc l mt s dng nh hn kh nng cha ca thanh ghi cha kt qu. V d khi cng
hai s dng trong hai thanh ghi 8 bit, CFs c thit lp mc 1 khi c s trn bit 1 t D6 sang
D7, tc l khi du ca s 7 bit thay i t (+) sang (-) mc d kt qu phi l mt s dng, nh
vy kt qu ny cn phi c bin din bng mt s 9 bit. C OF lun c thit lp khi c trn,
v vy cn phi kim tra n tu theo trng hp s biu din l c du hay khng c du, n
khng nh hng g n chng trnh. C trn s b xa khi D7 tr v mc 0.
C ZERO ZF (Zero Flag)
Khi ALU thc hin cc php tnh c kt qu trong thanh ghi cha bng 0, lc ZF s c
thit lp ln mc 1. Cn ngc li ZF=0. Thng thng ZF thng bo trng thi so snh bng,
kt qu ca php tr = 0 , cc php logic = 0. Khi thc hin cc php cng, mc d kt qu c d
ra bit th 9 nhng nu thanh cha c gi tr 0 th ZF vn = 1. V d cng FFH+01H kt qu l
100H th s 1 c CF cn thanh cha c gi tr 00 do ZF =1.
C Z c bit tin li cho cc vng lp s dng b m xung. Vng lp c th gim mt
thanh ghi no , cho n khi n tr v 0 th ngng. Vi cc cng dng nh trn ZF cng vi CF
c s dng rt nhiu trong cc chng trnh.
C nh ph AF (Auxiliary Carry Flag )
Khng ging nh CF, ng vai tr bit th 9 ca thanh cha, c ging c trn nhiu hn, c
AF s c thit lp mc 1 khi c s trn bit 1 t D3 qua D4 s dng cho cc php tnh BCD.
Tm bit ca b cha bao gm 2 nibble ring bit, cc bit 7-4 gi l nibble trng s ln MS(Most
Significant) v 3-0 l nibble trong s nh LS(Least Significant). Mi nibble l m s thp phn
hoc HEXA n. Khi thc hin cc php tnh vi s BCD (tc s thp phn) cn phi ghi nhn
s nh ca 4 bit thp trong n v 8 bit. Ta gi s nh ny l s na nh.
Cc c iu khin: Cc c iu khin s dng xc nh cc ch hot ng khc nhau ca
CPU, Intel 80286 c cc c iu khin sau:
C nh hng DF (Direction Flag)
C ny c s dng nh hng cho cc lnh x l chui d liu. V d nh di chuyn chui
t vng nh ny sang vng nh khc, so snh chui. Khi thc hin CPU ln lt x l tng
byte 1 trong chui. c c cc thao tc ny CPU s dng cc thanh ghi a ch SI v DI v
sau mi ln x l 1 byte n t ng tng hoc gim cc thanh ghi ny. Vic tng hay gim SI v
DI cho php x l chui c t di ln trn hay t trn xung di. Khi DF=1 cc lnh x l
chui s thc hin t a ch cao n a ch thp, cn mc nh DF = 0.
Trong mt s CPU cc lnh x l chui tng v gim a ch khc nhau, ngha l cng l di
chuyn chui nhng c mt lnh thc hin theo chiu tng a ch, v mt lnh thc hin theo
chiu gim a ch. Cc CPU nh th s khng c c nh hng.
19
TI
T.
ED
U
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C nh hng c th thit lp bng lnh STD v xo bng lnh CLD hoc x l thng qua
ngn xp bng cch ct thanh ghi c vo ngn xp, x l bit DF trong ngn xp sau lt tr li
thanh ghi c.
C ngt IF : (Interrupt Flag)
C ngt c thit lp =1 bng lnh STI (Set Interrupt ) v xa bng lnh CLI(Clear
Interrupt). Khi c ngt=1 cho php CPU ghi nhn tn hiu yu cu ngt t ng vo INTR, v thc
hin chng trnh ngt. Khi c ngt =0, mc d c tn hiu yu cu, chng trnh ngt s khng
c thc hin. Vi cc yu cu ngt khng che NMI (Non-Mask able Interrupt) c ngt khng
c ngha.
C by TF: (Trap Flag)
C by ch c th thay i gi tr thng qua ngn xp, khi c by bng 1, CPU hot ng
ch chy tng bc g ri sa sai chng trnh. C th l khi CPU thc hin xong mt lnh
n chuyn qua chng trnh con gim st (Monitor), TF c t ng ct vo ngn xp v TF
c xo v 0, cc lnh ca chng trnh con gim st s c thc hin. Chng trnh con gim
st c thc hin bi ngi s dng kim tra li kt qu ca lnh va thc hin cc nh,
cc thanh ghi, cc c. Khi kt thc chng trnh con gim st, thanh ghi c c phc hi, TF li
bng 1, iu khin c quay v lnh tip theo ca chng trnh chnh. V sau khi thc hin xong
lnh ny, chng trnh con gim st li tip tc c thc hin.
C nhim v lng nhau NT (Nested Tast)
NT cho bit lnh ang thc hin tin trin trong cng mt nhim v hay s gy ra vic chuyn
nhim v. NT ch c dng trong ch bo v ca Intel 80286.
C ch th mc c quyn vo ra (IOPL)
Hai bit ny ch th mc c quyn thp nht m tc nhim ang thc hin cn c c php
thc hin cc lnh vo ra. Hai bit ny cng ch c s dng trong ch bo v.
PE
.P
2.2.4. Cc thanh ghi c bit

Thanh ghi con tr lnh: (IP - Instruction Pointer) S dng trong vic cung cp a ch di
(offset) ca vng nh m lnh. Sau khi ly vo mt lnh BIU s i gi tr trong IP tr ti m
lnh s thc hin trong chu k k tip. cc lnh thng thng sau khi ly vo mt byte m lnh
IP s t ng tng ln 1. cc lnh nhy gi tr ca IP s c xa i np mt gi tr mi, gi
tr mi ny c cung cp trong lnh nhy. Trong cc lnh gi chng trnh con trc khi xa gi
tr c np gi tr mi gi tr c ca IP c ct vo nh ngn xp, v khi c lnh quay v n s
c phc hi. Khi phc v ngt qu trnh bin i IP cng thc hin tng t nh khi xy ra
lnh gi chng trnh con.
Thanh ghi trng thi my: Thanh ghi MSW 16 bit, trong s dng 4 bit nh m t trn hnh
2.6, cc bit cn li d phng cho th h k tip:
- TS (Task Set): l bit chuyn nhim v, bit ny bng 1 xy ra vic chuyn nhim v.
- EM (Emulate Processor Extention): Cho php m phng b ng x l ton hc.
- MP (Monitor Coprocesor Extention): Cho bit h thng c b ng x l ton hc ang
lm vic.
- PE (Protect Mode Enable): Cho php ch bo v, khi bit ny c lp 80286 chuyn
qua hoc ng ch bo v. Khi thit lp, ch khi RESET bit ny mi c xo.
D15
D0
TS EM MP PE
Hnh 2.6: Cu to thanh ghi trng thi my MSW.
20
2.3. NGUYN TC LM VIC CA B VI X L 80286
82086
ED
82288
S0
S1
82284
DEN
DT/R
ALE
TI
RES
CLK
RESET
READY
MRDC
MWTC
IORC
IOWC
T.
S0
S1
Vcc
U
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2.3.1. nh ngha chu k lnh v chu k my

Hnh 2.7 m t Bus h thng ca mt h thng vi x l 80286 tiu biu, cc b ci (latch) s
dng ci BUS a ch, cc b m hai chiu (transceiver) s dng m BUS d liu v iu
khin. IC 82284 l b to tn hiu ng b v xung ng h (clock) cho b vi x l.
B iu khin BUS 82288 cung cp cc tn hiu iu khin giao tip vi b nh v vo ra.
S kt ni chi tit cho h thng m t trn hnh 2.8.
Khi truyn d liu vi b nh v vo ra, cc tn hiu a ch, iu khin v d liu c b vi
x l tc ng tun t theo thi gian theo mt quy lut nh trc c gi l mt chu k my ca
b vi x l. thc hin xong mt lnh b vi x l cn thc hin mt hoc nhiu chu k my nh
th, v n c gi l mt chu k lnh.
INTA
CLK
Latch
ADDRESS BUS
DIR
G
DATA BUS
.P
A0-A23
PE
D0-D15
Transceiver
WE OE
MEMORY
WR RD
I/O
Hnh 2.7: Kt ni to cc BUS h thng ca 80286.
Trong qu trnh lm vic BUS h thng ca 80286 lun c 4 trng thi sau:
- Ti (Idle)
: Trng thi khng tch cc.
- Ts (Status)
: Trng thi sinh ra tn hiu xc nh chu k BUS.
- Tc (Command) : Trng thi thc hin lnh.
- Th (hold)
: Trng thi treo BUS.
Chu k my c d liu ca 80286 c th chia lm 6 pha A, B, C, D, E, F (hnh 2.8).
21

-
Ti pha A (2 ca TC thuc chu k trc): 80286 cung cp cc tn hiu A0 A23 xc nh

a ch c v cc tn hiu iu khin M/IO-, COD/INTA- xc nh chu k c b nh
hay ca vo ra.
Pha B (1 ca TS thuc chu k c): cc tn hiu S1S0- = 01 ch th chu k c d liu,
BHE- cng s tch cc khi lnh c s dng 8 bit d liu cao D8 D15.
Pha C (2 ca TS thuc chu k c): tn hiu ALE tch cc cht cc tn hiu a ch qua
cc IC cht cung cp ti b nh (hoc vo ra).
Pha D (1 ca TC thuc chu k c): cc tn hiu MRDC- v DT/R- s mc tch cc
thp xc nh d liu s c c, tn hiu DEN- cng c tc ng cho php b m
d liu hai chiu hot ng. Cc tn hiu S1S0 tc ng chun b cho chu k tip theo.
Pha E (2 ca TC thuc chu k c): Cc tn hiu M/IO- v COD/INTA- tc ng cho chu
k tip theo, nu chu k tip theo l chu k ngt hoc treo BUS th cc tn hiu ny s
trng thi tr khng cao. cui pha E 80286 kim tra tn hiu READY-, nu tn hiu ng
vo ny ang mc 0 th d liu s c ly vo CPU, nu READY- = 1 (d liu t bn
ngoi cha sn sng) 80286 s chn thm cc TC na cho n khi READY- = 0.
U
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S0
S1
15
16
11
6
PCLK
EFI
ARDY
AY EN
SRDY
SY EN
S0
S1
CLK
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
READY
CLK
RESET
37
2
1
38
36
39
CLK286
S0
S1
80287
HLDA
PEACK
CKM
PEACK
27
28
34
33
29
31
COD/INTA 3
S0
S1
M/IO
READY
CLK
NPRD
NPWR
NPS1
NPS2
CMD0
CMD1
COD/INTA
READY
CLK
RESET
5
4
67
68
59
57
S0
S1
M/IO
LOCK
NMI
INTR
ERROR
BUSY
PEREQ
23
22
21
20
19
18
17
16
15
14
12
11
8
7
6
5
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
26
25
24
ERROR
BUSY
PEREQ
ERROR
BUSY
PEREQ
PEACK
COD/INTA
53
54
61
6
66
52
HOLD
HLDA
ERROR
BUSY
PEREQ
PEACK
COD/INTA
CAP
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
BHE
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
80286
34
33
32
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
8
7
AA0
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9
AA10
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
BHE
36
38
40
42
44
46
48
50
37
39
41
43
45
47
49
51
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
3
4
7
8
13
14
17
18
GND
ALE
1
11
1
2
15
14
7
6
SO
S1
M/IO
READY
CLK
82288
INTA
IORC
IOWC
MRDC
MWTC
DT/R
CEN/AEN
CENL
CMDLY
MB
DEN
ALE
MCE
13
12
11
8
9
INTA
IORC
IOWC
MRDC
MWTC
17
DT/R
16
5
4
DEN
ALE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
15
16
19
A0
A1
A2
A3
A4
A5
A6
A7
2
5
6
9
12
15
16
19
A8
A9
A10
A11
A12
A13
A14
A15
2
5
6
9
12
15
16
19
A16
A17
A18
A19
A20
A21
A22
A23
OC
G
U6 74LS373
AA8
AA9
AA10
AA11
AA12
AA13
AA14
AA15
3
4
7
8
13
14
17
18
GND
ALE
1
11
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
3
4
7
8
13
14
17
18
GND
ALE
1
11
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
2
3
4
5
6
7
8
9
DEN
DT/R
19
1
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
OC
G
U7 74LS373
U4
19
3
18
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
OC
G
U9
74LS245
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
18
17
16
15
14
13
12
11
D0
D1
D2
D3
D4
D5
D6
D7
18
17
16
15
14
13
12
11
D8
D9
D10
D11
D12
D13
D14
D15
DATA BUS (D0 - D15)
PE
S0
S1
40
32
35
M/IO
READY
CLK
RESET
S0
S1
13
64
65
RES
F/C
U3
63
31
29
T.
X2
READY
CLK
RESET
TI
5
1
17
2
3
READY
CLK
RESET
4
10
12
.P
U1
READY
CLK
RESET
X1
U5 74LS373
AA0
AA1
AA2
AA3
AA4
AA5
AA6
AA7
G
DIR
U10 74LS245
CONTROL BUS (IORC, IOWC,

MRDC,MWTC, INTA)
ADDRESS BUS (A0 -A23)
82284
U2
7
ED
Pha F (1 ca TS thuc chu k tip theo): chu k c kt thc cc tn hiu MRDC-, DT/Rtr v trng thi khng tch cc, b iu khin BUS 82284 a tn hiu READY- tr v
mc cao.
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
2
3
4
5
6
7
8
9
BHE
DT/R
19
1
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
G
DIR
Hnh 2.8: S kt ni cc tn hiu ca CPU 80286 to thnh BUS h thng.
22
PE
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TI
T.
ED
U
.V
Chu k ghi d liu ca 80286 bao gm cc chu k A, B, C, D, E, F, G nh trn hnh 2.9.

- Ti pha A (2 ca TC thuc chu k trc): 80286 cung cp cc tn hiu A0 A23 xc nh
a ch ghi v cc tn hiu iu khin M/IO-, COD/INTA- xc nh chu k ghi b nh
hay ca vo ra.
- Pha B (1 ca TS thuc chu k ghi ang thc hin): cc tn hiu S1S0- = 00 ch th chu k
ghi d liu ang c thc hin, BHE- cng s tch cc khi thc hin lnh ghi 16 bit.
- Pha C (2 ca TS thuc chu k ghi): tn hiu ALE tch cc cht cc tn hiu a ch qua
cc IC cht cung cp ti b nh (hoc vo ra), tn hiu DEN- chn b m d liu, v
tn hiu DT/R- = 1 xc nh chiu truyn d liu t CPU ra bn ngoi.
- Pha D (1 ca TC thuc chu k ghi): cc tn hiu ALE tr v mc 0, S1S0 = 11 tn hiu
iu khin ghi MRTC- tch cc ghi d liu.
23
Pha E (2 ca TC thuc chu k ghi): Cc tn hiu a ch, M/IO- v COD/INTA- c

cung cp cho chu k tip theo, tc l chu k my mi c bt u ngay khi chu k
my c ang cn thc hin, nu chu k tip theo l chu k ngt hoc treo BUS th cc tn
hiu ny s trng thi tr khng cao. cui pha E 80286 kim tra tn hiu READY-,
nu tn hiu ng vo ny ang mc 0 th d liu s tip tc c ghi, nu READY- = 1
(thit b bn ngoi cha sn sng) 80286 s chn thm cc TC na cho n khi READY- =
0.
Pha F (1 ca TS thuc chu k tip theo): Cc tn hiu MRTC- v READY- tr v trng
thi khng tch cc.
Pha G (2 ca TS thuc chu k tip theo): D liu c a vo b nh (hoc vo ra),
DEN- tr v trng thi khng tch cc, cui chu k BUS d liu c gii phng.
PE
.P
TI
T.
ED
U
.V
24
ED
U
.V
2.3.2. Qun l b nh thc v b nh o

2.3.2.1. Qun l b nh thc
Trong ch a ch thc 80286 qun l b nh vi 20 ng a ch A0 A19, 20 bit ia ch
vt l t CPU s c cp ra 20 ng tn hiu ny. to ra 20 bit a ch vt l 80286 s dng
2 a ch 16 bit c gi l cc a ch logic l: a ch on (Segment) v a ch di (Offset).
a ch vt l 20 bit = a ch on 16 bit x 10H + a ch di 16 bit.
80286 s qun l b nh trong mt chng trnh theo 4 on: on lnh (Code segment) c
a ch on gi trong thanh ghi CS, on ngn xp (Stack Segment) c a ch on gi trong
thanh ghi SS, on d liu (Data segment) c a ch on gi trong thanh ghi DS v on m
rng (Extra segment) s dng m rng cho on d liu c a ch on cha trong thanh ghi ES.
Khi c m lnh trong b nh, a ch di lun cha trong thanh ghi IP. Khi truy cp ngn
xp, a ch di lun c cha trong thanh ghi SP. Cn khi truy cp on d liu, a ch
di c th cung cp:
- Trc tip trong m lnh: ch a ch trc tip.
- Trong mt thanh ghi nh BX, BP, DI hay SI: ch a ch trc tip thanh ghi.
- c tnh bng tng gi mt thanh ghi v mt gi tr ch th trong lnh (BX+d), (BP+d),
(DI+d), (SI+d): ch a ch ch s.
- Bng tng gia hai thanh ghi v mt s ch th trong lnh (BX+SI+d), (BX+DI+d),
(BP+SI+d), (BP+DI+d): ch tng i ch s.
PE
.P
TI
T.
2.3.2.2. Qun l b nh o
Khng gian b nh trong ch a ch o c dung lng ln hn dung lng b nh thc rt
nhiu. thc hin chc nng qun l o CPU s dng cc c cu c bit l phn n ca cc
thanh ghi qun l.
Khi qun l b nh ca 80286 thc hin vic chuyn cc gi tr a ch o (a ch logic)
thnh cc a ch thc cho b nh vt l. Nguyn tc c bn ca ch a ch o l phng thc
to ra cc mng nh, mi mng nh bao gm cc nh lin tip nhau c dung lng khng vt
qu 64KB v mng nh ny c th trao i thng tin gia b nh bn dn v b nh ngoi.
Mi mng nh c xc nh bng ba tham s: a ch c s, kch thc (dung lng) mng
nh v c quyn thm nhp vo mng nh. Mi mng nh c cu trc nh trn hnh 2.11. Nhim
v ca trong phng thc qun l a ch o c hiu l vic thc hin mt tp hp cc tin trnh
gn vi mt trng thi xc nh ca b vi x l.
Khng gian nh lun gn vi nhim v, cc khng gian nh dnh ring cho mt nhim v
c gi l khng gian nh cc b. Khng gian nh m tt c cc nhim v u c th thm nhp
c gi l khng gian nh ton cc, nguyn l ny c biu din trn hnh 2.12.
Mt a ch logic trong chng trnh chy trn vi x l 80286 gm c hai thnh phn: b chn
mng 16 bit v mt Offset 16 bit, 32 bit a ch ny s c ngha khc trong ch a ch thc
v ch bo v (hnh 2.13). Trong ch a ch thc, b chn mng cn gi l thanh ghi on
(Segment), trong ch bo v b chn mng s c ngha nh sau: hai bit thp dng th hin
mc c quyn ca cc yu cu (RPL Requested Privelege Level). Bit k tip l b ch th mng
(TI Table Indicator) c s dng xc nh loi khng gian nh, TI = 1 khng gian nh l
ton cc, TI = 0 khng gian nh l cc b. Mi ba bit cao cn li dng xc nh mng nh, n
s ch th c 213 = 8192 mng nh ton cc v 213 = 8912 mng nh cc b. Nh vu b chn
mng ch th c 214 = 16384 mng nh khc nhau.
25
PE
.P
TI
T.
ED
U
.V
26
PE
.P
TI
T.
ED
U
.V
27
PE
.P
TI
T.
ED
U
.V
Dung lng nh ln nht ca mt mng nh l 64KB nn khng gian nh o dnh cho mt

nhim v s c dung lng cc i l 214.216 = 230 = 1GB (trong khi khng gian nh cc i trong
ch a ch thc l 1MB) nh trn hnh 2.14.
Ch s ng vai tr tr n bng cc b m t (Decscriptors Table), bng ny m t quan h
gia 32 bit a ch o v 24 bit a ch vt l ca b vi x l. 80286 qun l hai loi bng m t
l; bng m t ton cc (GDT Global Descriptor Table) v bng m t cc b (LDT Local
Descriptor Table). Cc b m t bng ca 80286 bao gm: b m t mng d liu, b m t mng
lnh, b m t mng h thng v b m t mng cc cng giao tip.
B m t mng d liu: s dng quy chiu ti mng d liu v mng ngn xp c cu trc
nh hnh 2.15. Tm byte ca b m t ny cha cc thng tin v mng nh: a ch c s, dung
lng v quyn thm nhp vo mng. Hai byte u s dng cho cc b vi x l th h sau, nn
vi 80286 cn phi np gi tr 0 vo hai byte ny khi khi ng.
Byte cha quyn thm nhp bao gm cc bit sau:
Bit P (Present): Ch th mng d liu m b m t quy chiu ti nm trong b nh hay
cha, nu P = 0 mng d liu c np vo b nh, nu P = 0 mng d liu cha c np vo
b nh. Khi chng trnh truy cp ti mt mng d liu cha c np vo b nh s gy ra
ngoi l 11 hoc 12. Chng trnh x l cc ngoi l ny s np mng d liu cn truy cp t cc
a vo b nh.
Bit DPL (Descriptor Privilege Level): Cho bit mc c quyn ca mng d liu m b m
t quy chiu ti.
28
T.
ED
U
.V
Bit ED (Expansion Direction): Ch ra chiu tin trin ca mng d liu. Nu ED = 1 th

mng d liu s thuc loi ngn xp, a ch bt u ca mng s l tng ca a ch c s v
di cc i ca mng, tc l n pht trin t a ch cao nht ti a ch thp nht. Nu ED = 0 th
chiu pht trin ca mng s t a ch thp ti a ch cao nht v mng d liu s dng cho cc
d liu ca chng trnh.
Bit W (Writable): Nu W = 1 mng d liu c th va c va ghi c (RW Read Write).
Nu W = 0 th mng d liu c bo v n ch c th c c (cm ghi) v c k hiu l RO
(Read Only).
Bit A (Accesed): A = 1 th mng d liu c s dng, bit A ny ch c th xo bng
chng trnh, bit ny cho php thng k li tn sut truy cp ti bng d liu trong mt chng
trnh.
PE
.P
TI
B m t mng lnh: S dng truy cp ti mng nh cha cc m lnh ca chng trnh. B

m t mng lnh c cu trc tng t nh b m t mng d liu, ring byte quyn thm nhp c
mt s bit thay i nh m t trn hnh 2.16.
Nu P = 1 c ngha l b m t quy chiu ti mng lnh.

Nu R = 0 th chng trnh cha trong mng lnh ch c chc nng thc hin v c k hiu
l EO (Executable Only), cn nu R = 1 th chng trnh cha trong mng lnh khng nhng thc
hin c m cn c c, nn n c k hiu l ER (Executable and Read).
Nu C = 0 th chng trnh con c gi s thc hin vi quyn bng DPL trong b m t
ca mng cha chng trnh con. Nu C = 1 th chng trnh con c gi s thc hin vi mc
c quyn bng DPL trong b m t quy chiu mng cha chng trnh con .
29
PE
.P
TI
T.
ED
U
.V
B m t mng h thng: s dng quy chiu ti cc mng cha thng tin cn cho h thng
nh m t trn hnh 2.17.
Nu kiu = 1, th b m t quy chiu ti mng cha trng thai1 ca nhim v TSS (Task State
Segment). Nhim v ny khng trng thi thc hin. Nu kiu = 3, b m t quy chiu ti mng
TSS ca mt nhim v ang hot ng. Nu kiu = 2, b m t quy chiu mng cha bng ca
cc b m t cc b.
Thng tin trong bng cc b m t bao gm thng tin trong GDT v LDT. Trong GDT cha
cc b m t mng tng ng vi tt c cc mng nh trong khng gian nh ton cc, cn trong
LDT cha cc b m t bng nh trong khng gian nh cc b ca nhim v.
Mi bng cc b m t cng chnh l mt mng nh c nh ngha bng mt b m t mng
c bit, thuc nhm b m t mng h thng.
GDT l mt bng duy nht nn khng cn xc nh trc bng mt b m t ring. a ch v

kch thc ca mng GDT c cha trong mt thanh ghi c bit gi l thanh ghi bng cc b
m t ton cc GDTR (Global Descriptor Table Register).
30
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U
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LDT c xc nh bng cc b m t trong bng GDT. Thng tin v a ch c s v kch

thc ca mng cha bng cc b m t cc b tng ng vi nhim v ang thc hin, c
cha trong thanh ghi bng cc b m t cc b LDTR (Local Descriptor table Register). Ni dung
ca thanh ghi ny s thay i khi chuyn t nhim v ny sang nhim v khc. C cu thm nhp
vo mt mng nh c th hin trn hnh 2.18
B m t cc cng giao tip: Cc lnh CALL v JMP ch c th thm nhp vo mng lnh c
mc c quyn cao hn thng qua mt cng ni ghp gi l cng giao tip. C tt c ba loi cng
giao tip khc nhau: Cng kiu gi (CALL GATE); cng kiu by (TRAP GATE), cng theo
nhim v (TASK GATE). B m t cc cng giao tip c cu to trn hnh 2.19.
PE
.P
TI
C ch thm nhp vo mt mng nh thng qua cng giao tip c m t trn hnh 2.20.
2.3.2.3. Phng php tnh a ch vt l (thc) t a ch o

a ch o ca 80286 c 32 bit a ch bao gm 16 bit ca b chn v 16 bit Offset. B chn
c ba thnh phn: ch s, TI v RPL, TI cho bit b m t thuc GDP hay LDT. V b m t mng
31
ED
U
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c 8 byte nn a ch ca b m t trong bng s l a ch c s cng vi ch s nhn vi 8.

80286 s tm thy trong b m t a ch c s ca mg nh thc v gii hn ca n. Cng 24 bit
a ch c s vi 16 bit a ch Offset trong a ch o s cho 24 bit a ch thc ca mng nh.
Cch tnh a ch thc t a ch o c m t trn hnh 2.21.
PE
.P
TI
T.
Qun l b nh o: c thc hin nh c cc thanh ghi qun l b nh c bit, cu trc cc

thanh ghi ny c biu din trn hnh 2.22. Cc thanh ghi mng CS, DS, ES, SS s c hai phn:
phn h l b chn 16 bit, phn kn 48 bit bao gm: mt byte th hin c quyn thm nhp, ba
byte a ch c s ca mng v hai byte kch thc mng.
B chn 16 bit c np gi tr bng cc lnh LDS, LES, MOV, cc lnh ny lm thay i gi
tr ca DS, ES v SS, cn cc lnh CALL v JUMP lm thay i gi tr ca CS. Trong khi thc
hin cc lnh ny, b chn ca a ch logic c np vo phn cao ca cc thanh ghi. 80286 s
dng b chn (ch s TI) thm nhp vo b m t 48 bit v n c t ng chp qua phn kn
ca thanh ghi mng, qu trnh ny c th hin trn hnh 2.23.
Nh vy, thng qua cc thanh ghi mng, 80286 c th bit c tt c cc tnh cht ca mng
nh ang s dng, 80286 s dng ni dung ca thanh ghi ny cng 16 bit a ch Offset ca a
ch logic th6m nhp vo bn trong mng, trnh phi tm kim trong cc bng b nh.
32
.P
TI
T.
ED
U
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Thanh ghi GDTR cha a ch c s v gii hn ca mng GDT, b vi x l s dng lnh

LGDT (Load) np v SGDT (Store) ct gi ni dung ca thanh ghi ny.
Thanh ghi LDTR c hai thnh phn: phn chn 16 bit, phn kn bao gm a ch c s v gi
hn ca bng LDT ang s dng. B chn c np gi tr bng lnh LLDT. B vi x l 80286 s
sao cc thng tin v a ch c s v gii hn ca bng LDT vo phn kn ca thanh ghi LDTR.
Trong qu trnh thc hin, b chn ca LDTR s thay i mi khi chuyn nhim v. Do vy ng
vi mi nhim v s c mt bng cc b m t cc b LDT.
PE
2.3.2.4. Bo v b nh trong ch a ch o
Vic bo v b nh thc hin cc chc nng sau: Cc ly chng trnh h thng v chng
trnh ng dng, cc l gia cc nhim v v kim tra thi im thm nhp vo i tng.
B vi x l 80286 c 4 mc c quyn nh m t trn hnh 2.24, trong mc 0 l mc c
quyn cao nht v mc 3 l mc c quyn thp nht, mi mng s c phn b mt mc c
quyn nht nh.
Chng trnh bao gm cc mng lnh v cc mng d liu, mc c quyn phn b cho
chng trnh, cho bit chng trnh c quyn lm nhng g khi n c thc hin trong mt
nhim v. Mc c quyn ca mt nhim v thay i theo thi gian v ph thuc vo mc c
quyn ca chng trnh ang chy.
Ht nhn bao gm cc chng trnh qun l cc ti nguyn ca b vi x l v b nh. Ht
nhn phi gn, c kh nng vn hnh tt, khng b hng do phn mm ca cc mc c quyn
thp hn.
33
U
.V
PE
.P
TI
T.
ED
Mc 1 cha tt c cc min lin quan n nhim v qun l h iu hnh nh: thit lp u tin
gia cc nhim v, np thut ton trao i v qun l cc cng vo ra.
Mc 2 bao gm cc chc nng qun l cc tp tin, qun l th vin, l cc ghp ni mm
cho cc chng trnh ng dng.
Mc 3 dnh cho cc chng trnh ng dng.
Nguyn tc bo v b nh i hi mi i tng (mng) nh phi c b m t cho bit mc
c quyn ca i tng . DPL (Descriptor Privilege Level) c m ho bng 2 bit D5D6 ca
byte quyn thm nhp ca bng m t mng. i vi tt c cc b m t mng, chnh l mc
c quyn ca mng. CPL (current privilege level) l mc c quyn ang thc hin ti thi im
cho trc, chnh l cc bit CPL ca b chn mng lnh ang chy. RPT (Requested Privilege
Level) l mc c quyn yu cu c m ho trong hai bit D0D1 ca b chn.
Quy tc n gin ca qu trnh bo v b nh l:
RPT = DPL (DPL thuc b m t c nh ngha bi b chn).
EDL (Effective Privilege Level) l s cc i trong hai s CDL v RPL.
Chng trnh ang thc hin c th thm nhp mt cch t do vo cc mng lnh v cc mng
d liu cng mc c quyn vi chng trnh . Khi iu khin vt ra ngoi mc c quyn
ca chng trnh ang chy th phi tun theo cc quy tc ring.
Chng trnh ang chy ch c th thm nhp vo cc mng c mc c quyn bng hay thp
hn mc mc c quyn ca n, ngha l: CPL <= DPL.
Php kim tra mc c quyn s xy ra khi b np c chn, v d sau khi thc hin lnh
MOV DS,AX; vi AX cha b chn ca mng d liu. Quy tc thm nhp vo mng d liu c
m t trn hnh 2.25a.
Quy tc c bn gi mt mng lnh bng lnh CALL hoc bng lnh JMP l: CPL = DPL,
trong DPL thuc mng lnh ch (hnh 2.25b). Thng qua ca giao dch c th thm nhp vo
mng lnh c mc c quyn cao hn mc ang thc hin, tc l: CPL >= DPL vi DPL thuc
mng lnh ch. Nu bt c mt s xm nhp ny tri vi quy tc trn u sinh ra mt ngoi l
ca CPU.
Cc lnh c quyn ch c th thc hin mc c quyn 0 (CPL = 0). Cc lnh c quyn bao
gm:
34
T.
ED
U
.V
LDGT lnh np vo GDTR a ch c s 24 bit gii hn 16 bit.

LIDT lnh np vo IDTR a ch c s 24 bit gii hn 16 bit.
LLDT lnh np phn chn cho LDTR 16 bit.
LTR lnh np phn chn cho TR 16 bit.
LMSW l lnh np mt t trng thi cho h thng.
CLTS l lnh xo bit TS.
HALT l lnh dng hot ng ca CPU 80286.
Cc lnh POPF v IRET khng phi l cc lnh c quyn nhng chng c th lm thay i
cc bit IOPL ca thanh ghi F khi chng c thc hin trong mc c quyn 0.
PE
.P
TI
2.3.3. Trng thi b vi x l 80286 khi khi ng
Sau khi khi ng, cc trng thi ca b vi x l c xc lp theo bng di. Ngoi ra c cc
tc ng sau:
- Tn hiu INTR b che.
- B vi x l c chuyn v ch thc, khng lm vic vi b ng x l (PE=0; EM=0;
MP=0).
- Bng cc vector ngt s thit lp li a ch 000000.
- DS, ES, SS c khi ng cho php thm nhp vo 64 KB u tin ca b nh.
35

-
CS v IP tr ti a ch bt u ca chng trnh sau khi RESET:

CS:IP=F000H:FFF0H, a ch vt l s l: FFFF0H.
Vng nh cha chng trnh khi ng ca h thng l 64KB cui cng ca khng gian
b nh (hnh 2.26).
2.3.4. Ch ngt v cc kiu ngt ca b vi x l
CPU
B iu khin
ngt
Cc yu cu
ngt
ED
U
.V
INTA
INTR
Hnh 2.27: Cung cp cc yu cu ngt cho CPU thng qua b iu khin ngt.
PE
.P
TI
T.
iu khin cc thit b, CPU phi thc hin cc lnh truyn d liu vi cc thit b qua
cng vo ra. Tuy nhin, phn ln cc thit b khng phi lc no cng sn sng truyn d liu vi
CPU, v d my in s khng nhn tip c cc d liu t CPU nu cc d liu n nhn trc
cha c in ht. V vy, trc khi truyn d liu CPU cn thc hin cc lnh kim tra trng
thi sn sng ca thit b. Khi h thng iu khin nhiu thit b, chng trnh iu khin c th
tun t kim tra tng thit b v truyn d liu vi cc thit b sn sng bng mt vng lp,
phng php iu khin thit b nh vy c gi l phng php qut vng.
Vi phng php qut vng, CPU ng vai tr ch ng, n i qut thng xuyn cc thit b
xem c cn phc v hay khng. Gii php ny s lm lng ph thi gian ca CPU khi cc thit b
khng c nhu cu phc v thng xuyn, m CPU vn phi thc hin chng trnh kim tra. C
mt gii php vo ra khc trnh c nhc im trn, l c ch ngt. Trong gii php ny cc
thit b c yu cu phc v s nhc chng CPU bng cch cung cp tn hiu yu cu ti CPU khi
n c yu cu phc v, lc ny CPU s tm ngng cng vic ang thc hin phc v thit b,
khi thit b c phc v xong CPU s quay v vi cng vic m n ang thc hin d dang.
Hu ht cc h vi x l u cho php ngng chng trnh bnh thng ang thc hin
chuyn qua mt chng trnh ti v tr c bit, bng mt s tn hiu cung cp t bn ngoi,
hoc mt s lnh c bit trong chng trnh. Vic chuyn iu khin ny ging nh c ch gi
chng trnh con, hot ng c chuyn t chng trnh chnh qua chng trnh con phc v
cho ngt.
Thng thng cc CPU c hai tn hiu nhn cc tn hiu yu cu ngt l: ngt khng che
(NMI - Non Mask able Interrupt), v ngt c th che c bng phn mm (INT - Interrupt). Tn
hiu yu cu ngt NMI c u tin cao hn INT, v khi nhn c tn hiu NMI th CPU bt
buc phi chuyn iu khin qua chng trnh ngt. Cn khi nhn c tn hiu INT th CPU cn
i xt c ngt, nu c ngt c lp n s chuyn iu khin qua chng trnh ngt, cn nu
c ngt cha c lp th yu cu ngt s khng c phc v. C ngt c th c lp hay xa
36
Chng trnh phc v ngt
PUSH cc thanh ghi
U
.V
PUSH FLAGS
CLEAR IF
CLEAR TF
PUSH CS
PUSH IP
Nhy ti chng
trnh ngt
ED
Chng trnh chnh
bng lnh hp ng trong chng trnh, vi cc cng vic quan trng khng cho php tm ngng
chng ta c th cm ngt bng lnh xo c ngt u chng trnh.
phc v ngt c nhiu thit b, trong cc h thng vi x l thng s dng b iu
khin ngt. Cc tn hiu yu cu s c a ti b iu khin ngt v ty theo th t u tin s
gi ti CPU nh hnh 2.27.
Nu ch c mt yu cu ngt n s c chuyn ngay ti CPU, nu c nhiu yu cu ngt
xy ra ng thi th yu cu no c u tin cao hn s c b iu khin ngt gi ti CPU
phc v trc. u tin s c lp trnh khi khi ng b iu khin ngt.
T.
POP IP
POP CS
POP FLAGS
POP cc thanh ghi

IRET
TI
Hnh 2.28: Qui trnh phc v ngt ca 8086/8088.
PE
.P
C ch ngt ca CPU 80286

Mt yu cu ngt trong h thng 80286 c th cung cp t mt trong 3 ngun sau:
- Ngun th nht cung cp t bn ngoi qua cc ng vo INTR (Interrupt Request), hoc NMI,
chng c gi l cc ngt cng.
- Ngun th 2 thc hin bng mt lnh ngt trong chng trnh (INT), trng hp ny c gi
l ngt mm.
- Ngun th ba xut pht t mt s iu kin li trong mt s lnh m chng trnh thc hin. V
d nh khi thc hin lnh chia cho 0, 80286 s t ng ngt chng trnh ang thc hin. Trng
hp ny c gi l ngt ngoi l (exception).
Ti cui mi chu k thc hin lnh 80286 s kim tra cc yu cu ngt. Khi c yu cu 80286 s
p ng bng cc bc sau:
- Np thanh ghi c vo nh ngn xp v gim thanh ghi con tr ngn xp i 2.
- Khng cho php ngt INT bng cch xa c ngt IF trong thanh ghi c.
- Xa c by TF trong thanh ghi c.
- Np thanh ghi on lnh CS vo nh ngn xp v gim con tr ngn xp i 2.
-
Np thanh ghi con tr lnh IP vo nh ngn xp v gim con tr ngn xp i 2.

Nhy xa ti chng trnh con phc v ngt tng ng theo yu cu.
Qu trnh trn c tng kt trong hnh 2.28. Nh trn hnh v, 8086 ct thanh ghi c vo
nh ngn xp, khng cho php ng vo yu cu ngt INTR v chc nng chy tng bc, ri
37
03FFH
03FCH
Con tr ngt kiu 255
T.
244 vector ngt

s dng
ED
U
.V
thc hin lnh gi xa ti chng trnh phc v ngt. Lnh IRET ti cui chng trnh phc v
ngt s chuyn iu khin quay v chng trnh chnh.
Nh bit khi thc hin lnh gi xa 80286 s lp gi tr mi cho thanh ghi on CS v thanh
ghi con tr lnh IP. thc hin vic gi xa gin tip, 8086 ly gi tr mi cho CS v IP t 4
nh. Tng t nh vy khi p ng ngt 80286 cng ly a ch chng trnh ngt t 4 nh
lin tip. Trong h thng 80286, 1KB b nh t a ch 00000H ti a ch 003FFH c dnh
ring cha cc a ch ca cc chng trnh ngt c gi l bng vector ngt, hay bng con
tr ngt. Mi a ch s cha trong 4 nh, nn bng ny s cha c a ch ca 256 chng
trnh ngt. Hnh 2.29 trnh by bng vector ngt. Ch l gi tr np cho thanh ghi con tr lnh
(IP) lun t ti a ch thp, cn cho thanh ghi on lnh (CS) nm a ch cao. Mi t kp cho
mt vector ngt c nhn dng bng mt s trong khong t 0 ti 255. N c gi l s hiu
ngt hay s kiu ngt.
Trong bng 5 vector ngt u tin dnh cho cc ngt c bit, cc vector t 5 ti 31 d phng
cho cc th h vi x l sau ca Intel, cc vector t 32 ti 255 c s dng cho cc ngt cng
v cc ngt mm. Do mi vector ngt gm 4 byte, v th 80286 s xc nh a ch ca cc vector
ngt trong bng bng cch nhn s hiu ngt vi 4. Ngi s dng cng c th thay th a ch
chng trnh ca mnh vo bng vector ngt, lc ny mi ln xy ra ngt iu khin s c
chuyn ti chng trnh ca ngi s dng thay v chuyn ti chng trnh phc v ngt c.
Con tr ngt kiu 33
TI
084H
080H
.P
27 vector ngt
d phng
PE
014H
5 vector
ngt dnh
ring
Con tr ngt kiu 32
Con tr ngt kiu 31 (d tr)
Con tr ngt kiu 5 (d tr)

Con tr ngt kiu 4 (trn)
010H
Con tr ngt kiu 3 (1byte lnh INT)

00CH
Con tr ngt kiu 2 (ngt khng che)
008H
Con tr ngt kiu 1 (chy tng bc)

004H
000H
Con tr ngt kiu 0 (li chia)
Hnh 2.29: Bng vector ngt trong h thng 80286.
Cc kiu ngt ca 80286

- Ngt kiu 0 : chia cho 0.
80286 s t ng thc hin ngt kiu 0 khi kt qu cc php chia vt qu kh nng cha
trong thanh ghi ch. Khi cc c, CS, IP s c np vo nh ngn xp, IF v TF s b xa.
Sau CS v IP s c np gi tr mi t cc a ch 00002Hv 00000H trong bng vector ngt.
38
PE
.P
TI
T.
ED
U
.V
V ngt 0 xy ra mt cch t ng khng th cm c, do trnh ngt ny trong chng

trnh phi kim tra chc rng s chia khc 0. Hoc vit mt chng trnh phc v ngt mi,
sau i vector ngt hin c trong bng, nhng khi chng trnh s kh phc tp.
- Ngt kiu 1: Chy tng bc.
Ngt ny s thc hin chng trnh theo tng lnh, khi ny c th xem ni dung ca cc nh
v cc thanh ghi kim tra kt qu ca lnh. Khi lnh thc hin ng c th cho php CPU
thc hin lnh tip theo. Ni cch khc trong ch chy tng bc 8086 ngng li sau khi chy
xong mi lnh, v ch quyt nh tip theo t ngi s dng. Nh vic lp xa thanh ghi c nn
th tc chy tng bc thc hin kh d dng trong h thng 8086.
Khi c by c lp, 8086 s t ng thc hin ngt 1 sau khi thc hin xong mt lnh, vi
vector ngt c ly trong bng vector ngt ti cc a ch t 00004H ti 00008H. Khi c by
s c lp cc thanh ghi c lu vo nh ngn xp, chng trnh con phc v cho ngt 1 s ty
thuc theo h thng. Ch l khng c lnh thit lp hay xa c by, mun thc hin cng vic
trn cn np thanh ghi c vo nh ngn xp sau s dng mt lnh x l d liu lp bit, v
cui cng phc hi li thanh ghi c t nh ngn xp. Trong qu trnh thc hin chng trnh
phc v ngt c by s c xa.
- Ngt kiu 2: Phc v ngt khng che.
80286 s t ng thc hin ngt 2 khi nhn c mt cnh ln ti ng vo NMI. Ngt ny
lun c thc hin m khng b che bi phn mm, v th ngt ny thng c s dng cho
cc cng vic quan trng. V d c th s dng ngt 2 backup chng trnh khi mt ngun.
- Ngt kiu 3 : Thit lp im dng trong chng trnh.
Ngt ny c s dng cho vic g ri mt chng trnh. Khi chn vo chng trnh mt im
dng h thng s thc hin cc lnh ca chng trnh cho ti im dng ri chuyn iu khin
qua th tc ngt 3. Ty theo tng h thng, th tc ngt 3 c th gi ni dung cc thanh ghi,
hoc cc nh ln mn hnh ri ch cho ti khi nhn c lnh k tip t ngi s dng.
- Ngt kiu 4 : Ngt trn.
C trn OF ca 8086 s t ng c thit lp sau khi thc hin cc php tnh s hc m kt
qu c s trn bit 1 qua bit c trng s ln nht. V d khi cng 01101100 (108 thp phn) vi
01010001 (81 thp phn) kt qu s l 10111101 (189 thp phn). Kt qu ny ch ng i vi
php cng s nh phn khng du, m khng ng i vi s nh phn c du. i vi s nh phn
c du, bit cao nht bng 1 s ch th s m v gi tr s l b 2, nh vy kt qu trn s l -67
thp phn. C hai cch pht hin v p ng mt li trn. Cch th nht c th s dng lnh
JO (nhy khi c trn = 1) ngay sau cc lnh s hc, nu c trn c thit lp sau lnh s hc
iu khin chng trnh s c chuyn ti a ch th trong lnh JO c th x l li trn.
Cch th hai l vic pht hin v p ng mt li trn c t vo mt ngt. Trong chng trnh
sau cc lnh s hc s t lnh INT 0 chuyn ti chng trnh ngt khi c ngt c lp.
- Cc ngt mm t 0 ti 255.
Lnh INT ca 80286 c th s dng gi cc ngt mm t 0 ti 255. Ngt c gi s ch
th bng s hiu ca n trong lnh INT, v d INT 32H s gi chng trnh ngt 32H. a ch
chng trnh ngt trong bng vector ngt s nm ti a ch bng s hiu ngt nhn 4. Lnh INT
c nhiu cch s dng, c th dng INT 0 chy th chng trnh phc v ngt chia cho 0, m
khng cn phi thc hin lnh chia cho 0 thc s, hoc cng c th th chng trnh ngt NMI
bng lnh INT 2 m khng cn c tn hiu yu cu ngt a vo chn NMI.
- Cc yu cu ngt kiu 0 ti 255.
Ng vo INTR ca 8086 cho php nhn cc tn hiu yu cu ngt t bn ngoi thc hin
cc chng trnh ngt tng ng vi chng. Khc vi ng vo NMI, INTR c th che c bng
39
ED
U
.V
phn mm. Nu c ngt IF b xa th cc yu cu a ti INTR s khng c p ng. C

ngt IF c th thit lp bng lnh STI, v xa bng lnh CLI. Khi reset c ngt IF s t ng
c xa, nh vy trc khi mun 80286 p ng ngt cn phi lp IF.
Khi chuyn iu khin qua chng trnh ngt, c ngt cng t ng c xa. iu ny c
thc hin do 2 nguyn nhn sau: nguyn nhn th nht l do nu khng xa c ngt th khi
chng trnh phc v mt ngt ny ang thc hin c th s c mt yu cu ngt mi, lm iu
khin chng trnh s chuyn tip ti mt chng trnh ngt mi na. Nu mun iu xy ra
th ch vic thc hin lnh lp IF ti u chng trnh ngt. Nguyn nhn th hai l nu khng
xa IF th khi trng thi mc cao ti ng vo INTR cn c gi chng trnh ngt s b gi li
trong chnh n nhiu ln. Lnh IRET ti cui chng trnh ngt s phc hi thanh ghi c, iu
ny lm cho c ngt tr v mc 1 tip tc cho php 80286 p ng ngt.
nhn c nhiu yu cu ngt h thng 80286 s b iu khin ngt 8259. 80286 s nhn
mt trong cc ng yu cu ngt IR gi ti chn yu cu ngt INTR ca 8086. Nu c IF
c lp 8086 s tr li yu cu ngt bng tn hiu INTA (Interrupt Acknowledge), sau n s
c vo vector ngt cung cp t 8259 qua cc ng d liu thp D0 ti D7. Vector ngt chnh l
s hiu ngt c lp trnh trc trong 8259 n s c nhn vi 4 xc nh v tr cha a ch
chng trnh phc v ngt trong bng vector ngt. Khi c ng thi 2 hoc nhiu ngun yu cu
ngt, 8086 s p ng cho ngt c u tin cao nht, sau s ti cc ngt c u tin tip
theo. u tin ca cc ngt cng c lp trnh trc trong 8259.
T.
2.4. CC B VI X L CA INTEL
PE
.P
TI
Vi x l 8086 l b vi x l 16 bit d liu hot ng ch thc vi h iu hnh n

nhim DOS, tuy nhin y l b vi x l c th qun l c 1MB b nh bng ch nh a
ch theo on, trong khi cc b vi x l cng thi ch c th qun l c. 8088 l b vi x l ci
tin t 8086 xung 8 bit gim gi thnh thng mi vi my tnh PC XT.
80186 l b vi x l 8086 bao gm c cc mch ph cn nh b to clock, b iu khin ngt,
b timer, b iu khin DMA c tch hp trong cng mt chip. Khi cu hnh h thng s
n gin hn v tc h thng tng cao gp i h thng 8086 chun.
80286 ra i nm 1983 l b vi x l 16 bit c th qun l c 16MB b nh. Ngoi ch
thc tng thch 8086 n cn c thm ch bo v, ch ny cho php qun l b nh o v
chy vi h iu hnh a nhim.
Nm 1985 ra i b vi x l 32 bit 30386, n c th chuyn i nhanh chng gia hai ch
thc v bo v hn 80286 nh ch 8086 o. N c th chy ch bo v ca 80286 v c ch
bo v ring. Ch bo v ca 80386 c th qun l cc on b nh 4MB v ton b khng
gian a ch o ln ti 64TB. B vi x l 386SX gim bt bus d liu xung 16 bit, bus a ch
gim xung 24 bit gii hn qun l b nh xung 16 MB, n c s dng cho cc my tnh
xch tay vi ngun tiu th thp.
B vi x l 80486 ra i nm 1989, n c b ng x l ton hc tch hp bn trong c th
thc hin nhanh chng cc lnh ton hc vi s thc. C c thm c ch b nh m (cache) cho
lnh, cc lnh t DRAM s c chuyn sn vo SRAM (cache) lm tc thc hin chng
trnh nhanh hn. C c ch x l lnh theo ng ng (Pipeline) nm tng, nn cc chng trnh
c th thc hin nhanh hn 80386 rt nhiu. 80486 c th qun l c 4GB b nh thc v
64TB b nh o. Ngoi ra n c th thc hin cc lnh nhn chia nhanh bng phn cng v c c
ch t kim tra khi khi ng.
40

B vi x l Pentium ca Intel c 64 bit d liu n c hai cu trc ng ng 32 bit bn trong.
N qun l 8KB b nh m chng trnh v 8KB b nh m d liu. Cc b vi x l Pentium
s dng cng ngh mi vi ngun nui 3.3V cho php tng tc tnh ton. B vi x l Pentium
Pro (P6) ra i nm 1995 c 04 cu trc ng ng, c b x l du phy ng, tch hp b nh
m bn trong. B vi x l Pentium MMX thit k cho cc ng dng multimedia, tng tc x
l tn hiu bng cch tch hp 45 b nhn bn trong, ci tin tc thc hin chng trnh bng
c ch d on trc hng r nhnh, c thm cu trc siu phn lung (sperscalar).
PE
.P
TI
T.
ED
U
.V
Tm tt ni dung hc tp: mt s vn cn lu trong chng ny bao gm:

Hot ng ca b vi x l bao gm hai tin trnh ly lnh v thc hin lnh lp li mt cch
lin tc. ly lnh CPU s thc hin chu k c b nh lnh, CPU s to ra a ch v tn
hiu yu cu c cung cp ti b nh ly lnh vo hng i lnh ca BU. Cc lnh t
hng i ca BU s c IU gii m v sp vo hng i lnh gii m ca n, cc lnh
gii m chnh l cc tn hiu iu khin qu trnh thc hin lnh, qu trnh gii m gip
cho cc lnh ngoi b nh c kch thc ngn, tit kim c b nh v gim thi gian c
lnh. Cc lnh m CPU thc hin chia thnh 03 nhm chnh c x l bi EU l: di
chuyn d liu, x l d liu v iu khin chng trnh. Cc lnh x l d liu thng
thng thc hin cc php ton s hc v logic s c thc hin trong cc b tnh ton
phn cng ca ALU.Cc lnh iu khin chng trnh s thay i cc gi tr trong cc
thanh ghi CS v IP xc nh ti v tr ly lnh mi. Cc lnh di chuyn d liu bn trong
cc thanh ghi s thc hin bn trong vi x l bng cc tn hiu cho php c thanh ghi
truyn v ghi thanh ghi nhn. i vi cc lnh truyn d liu vi bn ngoi b vi x l cn
thc hin cc chu k my. CPU s to ra a ch bng khi to a ch AU v s cung cp ra
bn ngoi bng khi giao tip Bus BU cng vi cc tn hiu iu khin tng ng do BU
to ra., sau d liu s c truyn nhn gi thanh ghi ca CPU vi b nh hoc vo ra
bn ngoi.
CPU qun l b nh theo ba loi: vng nh chng trnh cha cc m lnh, vng nh ngn
xp cha cc d liu tm thi trong chng trnh v vng nh d liu cho cc hng v bin
ca chng trnh. truy cp ti cc vng nh ny CPU s dng cc thanh ghi on khc
nhau: thanh ghi CS cho vng nh chng trnh, SS cho vng nh ngn xp v DS hoc ES
cho vng nh d liu. Trong ch qun l b nh thc, a ch vt l s c to ra bng
cch dch tri thanh ghi on 16 bit ri cng vi mt a ch Offset 16 bit, v a ch vt l
to ra l 20 bit. Trong ch a ch o cc a ch on v a ch offset s c s dng
tru cp ti cc bng m t v d liu trong cc bng m t c s dng to ra cc
a ch vt l 24 bit.. Khi ly lnh a ch offset s c nh trong IP, i vi vng nh ngn
xp l SP cn i vi vng nh d liu a ch offset c th cung cp bng cc cch khc
nhau tu theo tng lnh.
Cc thanh ghi a nng ca 80286 bao gm: AX lm thanh ghi cha trong cc lnh nhn
chia, BX lm thanh ghi cp a ch offset theo nhiu ch khc nhau, thanh ghi CX lm
b m cho cc lnh lp, thanh ghi DX s dng cha d liu cho cc lnh nhn chia 16 bit
v lm thanh ghi a ch cho cc lnh vo ra., thanh ghi a ch s ngun SI v ch s ch
DI s dng gi a ch ngun v ch cho cc lnh x l chui. BP s dng lm thanh ghi
a ch ging nh BX.
41
Cc bit trng thi ca thanh ghi c ca 80286 bao gm 06 bit: ZF bo kt qu bng 0, CF

bo php cng trn, php tr thiu, OF bo s trn bit 1 lm i du kt qu, AF bo trn
bit 1 t nible thp ln nible cao, PF bo s bit mt l chn v SF bo du ca kt qu.
Khi xy ra ngt chng trnh chnh s c ngng li v chng trnh ngt s c thc
hin, khi chng trnh ngt kt thc, chng trnh chnh s tip tc c thc hin ti v tr
tm ngng. chuyn qua chng trnh ngt CPU s dng bng vector ngt, vector
ngt c nhn vi 4 to ra a ch c bng vector ngt ly ra a ch chng trnh ngt.
PE
.P
TI
T.
ED
U
.V
BI TP:
Bi 1: Mt nh c a ch vt l l 4B26DH hy cho bit:
a) a ch offset ca n nu a ch Segment l 4032H.
b) a ch Segment ca n nu a ch offset l 122AH.
Bi 2: Cho bit a ch logic ca nh l BA00H:D1AFH.
a) Hy cho bit a ch vt l ca nh ny.
b) Hy cho 5 v d v cc a ch logic khc cng truy cp ti nh vt l nu trn.
Bi 3: Cho bit gi tr trong cc thanh ghi SS = 3000H, SP = 8434H. Hy cho bit a ch vt l
ca nh ngn xp.
Bi 4: Trong ch a ch thc 80286 s phi thay i gi tr trong cc thanh ghi no khi cn
chuyn iu khin chng trnh t a ch:
a) 10500H ti 10000H.
b) 20901H ti 29A00H.
c) 40000H ti A0000H.
Bi 5: Trnh by cc c ch chuyn iu khin chng trnh trong 80286.
Bi 6: V sao khi c thanh ghi cha, di m lnh ca CPU s c rt ngn?
Bi 7: V sao khi s dng b gii m lnh chng trnh s tit kim c dung lng b nh cho
cc chng trnh?
Bi 8: Nu vector ngt l 07 th a ch ca chng trnh ngt nm ti u trong bng vector ngt.
Bi 9: Cho bit khi no th c nh bng 1, hay cho hai v d c th.
Bi 10: Cho bit khi no th c c Zero bng 1, cho v d c th v lnh cng lm c Zero bng 1.
Bi 11: Cho bit khi no th c chn l bng 1, cho v d c th.
Bi 12: Cho bit khi no th c ph bng 1, cho v d c th.
Bi 13: Cho bit khi no th c trn bng 1, cho v d c th.
Bi 14: Cho bit khi no th c du bng 1, cho v d c th.
Bi 15: Cho bit trong trng hp no s dng thanh ghi gi a ch b nh s c li hn, v c
li hn nh th no?
Bi 16: Cho bit trong trng hp no s dng ch a ch tng i (BX+d) c li hn. Ti
sao?
Bi 17: Quay v t chng trnh con thng thng khc quay v t mt chng trnh ngt nh th
no?
Bi 18: Ti sao phi s dng thm thanh ghi DX gi kt qu trong cc lnh nhn chia 16 bit
42
Chng 3: Lp trnh hp ng cho h vi x l intel.
CHNG 3: LP TRNH HP NG CHO H VI X L

INTEL
TI
T.
ED
U
.V
Gii thiu:
Trong chng ny trc ht sinh vin cn nm c cc ch th trong chng trnh hp ng,
cch khai bo cc hng v bin trong chng trnh hp ng, khung ca mt chng trnh hp ng.
y l cc ni dung ht sc cn thit c th thc hin c mt chng trnh hp ng chy
trn my tnh.
Tip theo cn hc thuc tn v hot ng ca cc lnh hp ng h intel, khi cng nh nhiu
lnh vic thc hin cc chng trnh hp ng s cng d dng hn. Do tp lnh kh di do cn
chia thnh cc nhm v ch ti cc lnh thng s dng trc. V d dng hn trong vic
vit cc lnh hp ng nn tm hiu v cc ch a ch s dng cho chng.
c cc giao tip gia ngi s dng v chng trnh khi chy chng trn my vi tnh cn
phi ch ti mt s hm vo ra trong ngt 21H ca DOS. Nh chc nng v cch gi cc hm
01, 02 v 09 ca ngt 21H.
Tip theo trong chng ny cn quan tm ti vic lp trnh chuyn i m, vic chuyn i
ny c ngha quan trng trong cc h thng vi x l, sinh vin cn nm r v cc loi m s
dng trong vi x l v hnh thc lu tr chng trong b nh. V d mt con s trong h thng vi
x l c th lu tr di cc dng nh: nh phn, BCD, ASCII, m LED 7 on, cn ch ti gii
thut chuyn i gia cc dng m ny.
Cui cng l phng php lp trnh iu khin thit b ngoi vi, yu t quan trng nht ca
cc chng trnh ny l cc lnh IN v OUT.
.P
3.1. CU TRC CA HP NG
PE
Nh bit vi x l l mt IC s hot ng theo chng trnh. Chng trnh l tp hp ca

cc lnh, mi lnh s thc hin mt chc nng s c bn no . H thng vi x l l mt h
thng in t s, nn cc chng trnh cung cp n hot ng phi di dng cc mc in
p cao v thp, tng ng vi cc bit nh phn 0 v 1. Nhng nu chng trnh bng ton cc s 0
v 1 s rt kh nh, kh kim tra v sa sai i vi ngi lp trnh. khc phc tnh trng trn
ngi ta t cho mi lnh nh phn thc hin mt chc nng s c bn mt tn d nh hn, chng
c gi l m gi nh (Mnemonic). Khi lp trnh ngi ta s dng cc m gi nh, cn khi cn
vi x l thc hin th chng trnh s c i thnh cc m nh phn 0, 1 np vo b nh ca
h thng, cng vic ny c gi l hp dch chng trnh (assembler). Mi b vi x l ra i s
c mt tp lnh ca n di dng m gi nh v m nh phn tng ng, v vy vic hp dch
chng trnh c th thc hin th cng bng cch tra bng lnh. Khi my tnh ra i nhanh
chng v chnh xc, vic hp dch thng c thc hin bng cc chng trnh vit sn, cc
chng trnh ny c gi l cc chng trnh hp dch hay chng trnh dch hp ng, chng
thng c cung cp t cc hng phn mm, hoc chnh t cc hng sn xut vi x l.
Do mi lnh gi nh c trng cho mt chc nng c bn nht ca vi x l, nn n gn lin
vi hot ng ca h thng phn cng, cc chng trnh hp ng s khai thc c trit kh
nng ca phn cng m khng ngn ng bc cao no c th thc hin c. Tc thc hin cc
43
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chng trnh hp ng l nhanh nht, dung lng b nh s dng l t nht, do gim thiu c
cc bin trung gian ngoi b nh, v vy n thch hp cho cc h thng yu cu tc x l cao.
hp dch cc chng trnh hp ng trn my tnh, u tin cc chng trnh cn c son
tho bao gm cc lnh gi nh di dng vn bn, bng bt k mt phn mm son tho vn bn
no, tt nhin chng phi theo ng c php qui nh ca chng trnh hp dch. Sau tp tin
vn bn ny s c dch v lin kt bng cc chng trnh chuyn dng to ra cc tp tin nh
phn c th thc hin trn my vi tnh, hoc np vo b nh cho cc h thng vi x l khc.
Thng thng mi h vi x l c t nht mt chng trnh hp dch, cc chng trnh hp
dch khc nhau cng thng c qui nh c php khc nhau. V d cc vi x l h Zilog c phn
mm dch v lin kt l M80 v L80, h Intel c MASM, LINK v EXEC2BIN ca Microsoft v
TASM, TLINK ca Borland, h vi iu khin 8051 c M51, L51 v OH. Tuy c qui nh c
php khc nhau, nhng cu trc cc hng lnh v khung chng trnh cng tng i ging nhau,
cc li khi son tho s c thng bo khi hp dch hoc c th tm thy trong phn tr gip ca
chng trnh. Sau y chng ta s xem xt v cc son tho v cu trc ca mt chng trnh hp
ng vit cho cc chng trnh hp dch h Intel TASM v TLINK.
TI
T.
ED
3.1.1. B k t, t kho trong chng trnh hp ng

Ging nh bt k ca ngi hoc my tnh u c thc hin trn cc k t, b k t cho
hp ng bao gm:
- Cc k t ch ci la tinh: A- Z, a-z.
- Cc k t s thp phn: 0 9.
- Cc k t c bit nh: ? @ - $ . : [ ] ( ) { } + - * / & % # ! \ = ^ ; ,
- Cc k t ngn cch: khong trng v tab.
Cc t kho l cc t dnh ring ca hp ng nh: tn cc thanh ghi, m gi nh, . Cc t
kho ny phi c vit ng theo quy nh ca cc trnh hp dch.
PE
.P
3.1.2. Cc ch dn trong hp ng
Cc ch dn (directive) trong chng trnh hp ng cn c gi l cc lnh gi hp ng,
chng ch c chc nng thng bo cho trnh hp dch m khng to ra lnh m my vi x l
thc hin. Cc ch dn trong hp ng bao gm 4 phn:
[Tn] [Tn ch dn] [ton hng] [;ch thch]
Mi phn s c ngn cch nhau bng 1 hoc nhiu k t ngn cch.
Phn [Tn] c t bi ngi s dng, chng s khng c bt u bng k t s thp
phn, khng cha k t ngn cch v khng c trng vi cc t kho hp ng.
Phn [Tn ch dn] c quy nh trong trnh hp dch, cc ch dn thng c s dng
khai bo hng, bin, chng trnh con, cc on b nh, kt thc chng trnh
Ton hng c th l mt tn tng trng, mt hng, mt bin, mt biu thc tu thuc vo
tng ch dn c th.
Tu theo cc trnh bin dch s c cc ch th hp ng khc nhau, sau y l mt s ch th hp
ng thng dng ca cc trnh bin dch MASM v TASM. Ch c mt s ch th khng s dng
c cho c hai trnh bin dch.
Nhm ch th gn tn tng trng: EQU (Equal) v =.
EQU c chc nng gn cho [Tn] mt on vn bn hay mt gi tr. V d:
Table EQU [BX] [SI]
;gn mt ton hng
F10
EQU 68
;gn mt hng s
44
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Count EQU CX
;gn mt ton hng
Move EQU MOV
;gn mt t kho
X
EQU count
;gn cho mt tn khc
RT
EQU <run time> ;gn mt chui k t
A
EQU 5*9/4
;gn mt biu thc.
Ch dn EQU khng to ra mt lnh m my, nn n c th t bt k u trong chng
trnh nhm mang li cc tn c trng d nh hn, hoc gn hn cho cc gi tr hay cc chui k
t s dng trong chng trnh
Ch dn = s dng gn gi tr cho mt tn c trng, ging nh chc nng gn gi tr ca
EQU, tuy nhin n c th gn li gi tr nhiu ln.
Dong = 10
MOV AL,Dong
Dong = 30
Nhm khai bo d liu: (Data definition directive).
Cc ch dn khai bo bin trong hp ng bao gm:
DB (define byte) : nh ngha bin kiu byte
DW (define word): nh ngha bin kiu t (hai byte)
DD (define double word): nh ngha bin t kp (4 byte)
DT (define ten byte): nh ngha bin 10 byte.
Cc bin c th gn gi tr khi ng hoc khng.
V d dng lnh: X1 DB 4 khai bo mt bin byte c tn l X1 v gi tr khi ng l 4.
Nu du ? thay vo v tr ca s 4 th bin X1 s c dnh ch trong b nh, nhng khi chng
trnh bt u hot ng n s c gi tr bt k do khng c gn gi tr khi ng. Khai bo hon
ton tng t cho cc loi bin kiu khc.
Bin mng
Bin mng hnh thnh t mt dy lin tip cc phn t cng kiu (byte, t ), s nh s
c dnh ra tng ng vi s phn t ca dy.
V d dng lnh: A1 DB 3,5,6,7,8
Khai bo mt bin mng c tn l A1 c gi tr khi ng l 3,5,6,7,8. Phn t u trong
mng l 3 c a ch trng vi A1, phn t th hai s c a ch k tip
Khi mun khi ng cc phn t ca mng vi cng mt gi tr c th s dng ton t DUP
trong lnh.
V d dng lnh A2 DB 100 DUP (0) s khai bo bin mng c mt trm phn t u c
gi tr khi ng bng 0. Khi th s 0 bng du ? th mt trm phn t ca mng s khng c
gn trc gi tr khi ng.
Cng c th khai bo mt bin mng theo kiu hn hp bao gm nhiu ton t DUP.
V d dng lnh: M DB 1,2, 2 DUP (8), 3 DUP (4), 9
S hon ton tng ng vi dng lnh: M DB 1,2,8,8,4,4,4,9
Ch trong mt s vi x l (nh ca Intel), nu c mt t trong b nh th byte thp s nm
a ch thp, byte cao nm a ch cao, cn mt s vi x l khc (Motorola) li c cch ct d
liu theo th t ngc li.
Bin kiu xu k t
Bin kiu xu k t l trng hp c bit ca bin mng, trong cc phn t ca mng l
cc k t. Mt xu k t c th nh ngha bng cc k t hoc bng m ASCII tng ng ca
45
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chng. Cc dng lnh sau cng nh ngha mt xu k t nhng gn cho chng cc tn khai bo
cho chng khc nhau:
STR1
DB 'string'
STR2
DB 73h, 74h, 72h, 69h, 6Eh, 67h
STR3
DB 73h, 74h, 'r', 'i', 'n', 67h
Bin con tr
Bin con tr l bin dng cha a ch trong b nh ca mt bin khc, bin con tr NEAR
ch cha a ch Offset, bin FAR cha c a ch Segment v a ch Offset. V d:
NearNext DW next ;gn a ch offset ca bin next vo bin NearNext
FarNext DD
next ;gn a ch segment v offset vo bin FarNext.
Bin nhn
khai bo bin nhn s dng ch th Label, bin nhn c s dng c khi mun truy cp
ti cng mt vng nh nhng vi cc kiu d liu khc nhau. V d c mt mng d liu c
th truy cp bng c 3 kiu d liu Byte, Word v Doubleword c th vit:
Warray
LABEL word
Darray
LABEL dword
Barray
LABEL 100 dup (?)
Vy cng vi mt vng nh c th truy cp bng 3 tn warray nu xem n bao gm 50 t,
darray nu xem vng nh ny bao gm 25 t kp, hoc barray bao gm 100 byte.
Nhm ch th khai bo cc on
C th khai bo cc on lnh, d liu, ngn xp c th khai bo bng cc ch dn: .Code,
.Data; .Stack.
Cng c th khai bo cc on bng cc ch th SEGMENT v ENDS theo c php:
Tn
SEGMENT
[align type] [combine type] [class]
Name ENDS
Phn [Tn] nh ngha tn ca cc on, cc tham s sau SEGMENT ch c tc dng khi
chng trnh khai bo nhiu on. C th khai bo nhiu on cng tn.
[Align type] xc nh v tr u ca mng trong b nh: byte - bt u ti v tr bt k; word bt u ti cc a ch chn; para - bt u ti cc a chia ht cho 16; page - bt u ti cc a ch
chia ht cho 256. Khi khng c mc nh s l Para.
[Combine type] quy nh cch lin kt cc on c cng tn: Public ghp tt c cc cc on
cng tn thnh mt on. Stack ghp cc on cng tn thnh on c thanh ghi SS gi a ch
on. on ngn xp phi c khai bo theo kin STACK. Commond Ghp cc on cng tn
thnh mt on, vi di on bng di ln nht ca tt c cc on. At address Cc nhn
v cc bin khai bo trong on u c a ch on do address quy nh. Nu khng khai bo
[combine type] cc on cng tn s khng lin kt nhau. Mi on s c mt a ch on ring.
[Class] xc nh th t cc on khi c np ln b nh, cc mng s c np ln b nh
theo th t tng dn ca tn class.
Ch th khai bo qui m s dng b nh
Dung lng b nh dnh cho on m lnh v on d liu c xc nh nh lnh gi
'.MODEL', lnh ny phi lun t trc tt c cc lnh khc trong chng trnh.
C php lnh: .MODEL Kiu kch thc b nh
C nhiu kiu kch thc b nh cho cc chng trnh vi i hi dung lng b nh khc
nhau. Vi ngi mi lp trnh thng thng cc on m lnh v d liu u khng vt qu
46

64KB nn chn kiu nh (Small) hoc kiu hp (Tiny). Ngoi ra cn c cc kiu kch thc b
nh khc nh lit k trong bng sau:
Huge ( s)
M t
M lnh v d liu trong cng mt on 64 KB

M lnh nm trong mt on, d liu nm trong mt on
M lnh khng nm trong mt on, d liu nm trong mt on.
M lnh nm trong mt on, d liu khng nm trong mt on.
M lnh khng nm trong mt on, d liu khng nm trong mt
on, cc mng khng ln hn 64KB.
M lnh khng nm trong mt on, d liu khng nm trong mt
on, cc mng c th ln hn 64KB.
U
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Kiu kch thc

b nh
Tiny (hp)
Small (nh)
Medium (trung
bnh)
Compact (gn)
Large (ln)
PE
.P
TI
T.
ED
Nhm ch th chng trnh con

Cc chng trnh con c th bt u bng mt nhn v kt thc bng lnh RET, cn ch
khng cho php iu khin chuyn ti chng trnh con bng lnh nhy hay bng c ch tng
tun t. Ngoi ra chng trnh con cn c th bt u bng ch th PROC v kt thc bng ch th
ENDP theo c php:
Name PROC [type]
Name ENDP
Khi [type] l near th chng trnh con ch c th c gi trong cng mt on cha chng
trnh con . Cn khi type l far, chng trnh con c th c gi t mt on khc vi on
cha chng trnh con .
Nhm ch th tham chiu bn ngoi
i vi cc chng trnh ln, thng thng c vit thnh nhiu phn (module) nh, mi
phn c th nm tch ri trn mt file ngun khc nhau. Mi file ngun s c hp dch sang file
i tng (object) tng ng, sau s lin kt (LINK) cc tp tin i tng thnh mt
chng trnh duy nht cung cp cho h vi x l. cc khai bo tn bin, nhn hay tn tng
trng khai bo trong file ny c th s dng c trong mt file khc, th chng cn phi khai bo
bng ch th PUBLIC vi c php.
PUBLIC name [,name]
Vi name l tn bin, nhn hoc tn tng trng.
Khi mt file mun s dng cc tn bin, nhn hoc tn tng trng c khai bo bng ch
th PUBLIC trong mt file khc cn phi s dng ch th EXTRN vi c php:
EXTRN name: type [,name:type]
Vi name l tn bin, nhn hoc tn tng trng c khai bo trong ch th PUBLIC. Khi
name l mt bin th type c th l mt byte, word hoc dword. Khi name l mt nhn hay mt
chng trnh con th type c th l near hoc far. Nu name l mt hng th type phi l ABS.
Khi mun c ton b mt file ngun vo mt file khc khi bin dch c th s dng ch th
INCLUDE filename. Vi filename l tn file ngun mun chn.
Ch th iu khin
Ch th END kt thc mt chng trnh ngun vi c php:
47
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END [start address]

[start address] l nhn xc nh im bt u ca chng trnh, nu chng trnh bao gm
nhiu file ngun th [start address] cn khai bo trong phn chng trnh chnh (main module).
Ch th EVEN cho php t cc m ti v tr chn trong b nh lm chng trnh chy nhanh
hn. Khi khai bo d liu nn khai bo cc bin dword trc, tip theo l cc bin word v cui
cng l bin byte.
Ch th ch
Cc ch th ch t u chng trnh xc nh loi CPU m chng trnh s dch s
thc hin, nu khng dng ch th ny th s mc nh dch cho CPU 8086. Cc ch th ch bao
gm:
.8086 dch cho CPU 8086.
.286 - dch cho Cpu 80286.
.386 - dch cho CPU 80386.
Ch th ch thch
Ch th ny dng gii thch cho mt on chng trnh, chng trnh bin dch s b qua
phn ch thch ny.
COMMENT *[text]*
Tt c cc k t nm gia hai du * s l phn ch thch c chng trnh ngun b qua.
PE
.P
TI
T.
3.1.3. Khung ca chng trnh ngun hp ng

Mt chng trnh hp ng bao gm cc dng lnh, mt dng lnh c th bao gm cc lnh
gi nh ch th cho vi x l thc hin mt chc nng s no , cng c th l mt ch th (lnh
gi - Pseudo) ch c ngha s dng cho cc chng trnh dch. Mt dng lnh hp ng c th c
cc phn sau:
Nhn: M lnh Cc ton hng
Ch gii
V d mt dng lnh vi m gi nh nh sau:
Label1: MOV AH,[BX] ; np vo AH ni dung nh c a ch [BX]
Dng lnh trn c phn nhn l Label1, phn m gi nh l MOV biu th lnh di chuyn d
liu, phn cc ton hng l AH v [BX] biu din vic truyn d liu t nh c a ch DS:[BX]
vo thanh ghi AH, phn ch gii bt u t sau du ; cho ti ht dng.
Phn nhn/tn
Thng thng ch th cc nhn cho cc lnh nhy chuyn iu khin ti, ch th cc tn bin
hoc tn th tc. Nh vy khng phi bt c dng lnh no cng cn phn ny. Khi hp dch cc
nhn hoc tn ny s c gn bng cc a ch c th ca cc nh. Cc tn v nhn trong
chng trnh c th c di t 1 ti 31 k t, n khng bao gm k t khong trng v khng
c bt u bng mt s. C th dng cc k t c bit trong phn ny, du . ch c t v
tr u tin ca nhn. Mt nhn s kt thc bng du :, cc nhn v tn thng thng c t
sao cho d nh khi vit v kim tra chng trnh.
Phn m lnh
Thng thng phn m lnh trong bt c dng lnh no cng c cha cc lnh gi nh hoc
cc lnh gi hp ng. Cc lnh gi nh s c trnh hp dch chuyn thnh m my nh phn.
Cc lnh gi ch c tc dng hng dn cho cc trnh hp dch m khng c dch ra m my
trong chng trnh.
Phn ton hng
48
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i vi cc m lnh gi nh, phn ny cha cc ton hng ca lnh nh m t trong cc

cch nh v a ch. Tu theo tng lnh m phn ton hng c th bao gm 0, 1 hoc 2 ton hng.
Thng thng khi khng c phn ton hng, th ton hng thao tc trong lnh s c hiu ngm,
nu ch c mt ton hng n s c gi l ton hng ch, nu c hai ton hng s c mt ton
hng ngun v mt ton hng ch.
i vi cc lnh gi phn ny s cha cc thng tin lin quan n lnh gi .
Phn ch gii
Phn ny c tnh bt u t sau du ; trn mt dng lnh (c th khng c cc phn khc).
N cho php ghi vo cc li gii thch v dng lnh hoc v hot ng ca chng trnh, n gip
ch cho ngi lp trnh d nh hn khi ang vit chng trnh, hoc khi c li chng trnh. Khi
hp dch cc li gii thch ny s khng c dch ra m lnh, c ngha l n khng c gi tr g
trong chng trnh m my.
Tu theo tng chng trnh dch hp ng s c cc quy nh v khung chng trnh khc
nhau. Sau y l v d v cc loi khung chng trnh hp ng c bin dch vi chng trnh
TASM ca broland.
Khung ca chng trnh hp ng dch ra dng .EXE
T cc khai bo ca chng trnh trnh by trn c th xy dng mt khung tng qut
cho cc chng trnh hp ng vi kiu kch thc b nh nh tr ln, cc chng trnh loi ny
sau khi hp dch s to ra mt tp tin c th thc hin c (executable) vi ui .EXE. Khung
cc chng trnh loi ny biu din nh sau:
. Model Small
.Stack 100
. Data
; Cc nh ngha cho bin v hng ti phn ny
.Code
Main Proc
MOV AX,@Data ; khi to DS
MOV DS, AX ; nu cn phi vit thm lnh MOV ES,AX
; cc lnh ca chng trnh chnh.
MOV AH,4CH
INT 21H
; Tr v DOS
Main Endp
; cc chng trnh con ti phn ny
End Main ; kt thc ton b chng trnh
Khi mt chng trnh .EXE c np vo b nh thc hin, DOS s to ra mt mng 256
byte gi l on mo u chng trnh (Program Segment Prefix- PSP) dng cha cc thng
tin lin quan n chng trnh v t n ngay pha trc vng nh cha cc m ca chng trnh.
DOS cng cung cp cc thng s lin quan n cc thanh ghi on DS v ES. Do DS v ES
khng cha gi tr a ch ca on d liu ca chng trnh, v th phi c cc lnh khi ng
cho chng.
Khung chng trnh hp ng dch ra dng .COM
Trong chng trnh .EXE c y cc on, vi chng trnh .COM cc on ngn xp, d
liu v m lnh s c gp chung. Nh vy cc chng trnh .COM s ngn gn v n gin
hn, n s tit kim c v thi gian thc hin, dung lng b nh v dung lng lu tr chng
trnh trn a. Sau y l khung mt chng trnh hp ng dch ra dng .COM:
49
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.Model Tiny
.Code
Org 100H
Start: Jmp Begin
; Cc nh ngha cho bin hng v cc chng trnh con ti y
Begin:
Main Proc
; Cc lnh ca chng trnh chnh ti y
INT 20H ; tr v DOS
Main Endp
; Cc chng trnh con c th ti phn ny
End Start
PE
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Mt chng trnh .COM cng c np vo b nh sau vng PSP nh chng trnh .EXE.
Ngn xp ca chng trnh .COM s t ti cui on 64K dnh cho n, tc l nh ngn xp khi
chng trnh bt u thc hin s l FFFEH.
Chng trnh .COM s b cc hn ch gy ra bi dung lng cc i dnh cho ton b chng
trnh gi gn trong on 64KB, nn chng ch s dng cho cc ng dng khng ln lm. Mt
khc chng trnh cng ch c s dng mt ngn xp c dung lng hn ch, nu c qu nhiu
d liu c np vo ngn xp s lm mt cc m lnh ca chng trnh.
Cch to v thc hin mt chng trnh hp ng trn my vi tnh
My vi tnh PC l to v thc hin cc chng trnh hp ng cho h Intel. Cc bc thc
hin cng vic ny nh sau:
- Dng cc phn mm son tho vn bn (SK, NC) son tho cc chng trnh ngun
c mc nh c ui .ASM.
- Dng cc chng trnh hp dch MASM hoc TASM dch tp tin ngun .ASM ra dng m
my c ui .OBJ. Cc dng lnh di du nhc DOS nh sau:
Vi MASM: C:\MASM filename.ASM
Vi TASM: C:\TASM filename.ASM
- Dch v lin kt cc tp tin .OBJ thnh tp tin c th chy c:
Vi MASM dng LINK lin kt cc tp tin .OBJ to ra chng trnh .EXE, nu chng
trnh ngun vit di dng dch ra .EXE th tp tin ny c th thc hin c. Nu vit di dng
.COM th cn phi s dng EXE2BIN dch ra tp tin .COM mi c th chy c.
Vi TASM dng TLINK lin kt v to ra tp tin chy .EXE, nu vit di dng .COM phi
dng dng lnh TLINK/t to ra tp tin .COM.
3.2. TP LNH CA B VI X L INTEL 80286
Khi nim v lnh, dng lnh v cch m ho lnh ca vi x l

Vi x l l mt IC s c tt c cc hm s c bn, thc hin c mt bi ton hay mt
cng vic no , cc hm s c bn s c cho php thc hin mt cch tun t theo mt thut
ton nht nh. cho php mt hm s hot ng cn phi cung cp tn hiu chn hm, v chn
d liu x l trong hm, vic cung cp cc tn hiu nh vy c gi l cung cp mt lnh cho vi
x l.
50

Nh vy dng lnh ca vi x l s bao gm hai phn chnh: mt phn chn hm c gi l
m hot ng (opcode operation code), mt phn chn d liu cn x l trong hm c gi l
ton hng ca lnh (operand) nh trnh by trn hnh 3.1.
OPCODE
OPERAND
Hnh 3.1: Dng lnh ca vi x l
Byte 1
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.V
Vi x l l mt IC s, v vy cc lnh m n hiu c phi di dng nh phn 0, 1 c gi l

cc lnh m my. Do vic vit cc chng trnh bng cc lnh m my, ch ton l cc s 0 v 1
rt kh nh, kh kim tra nn ngi ta s dng cc m gi nh thay th khi lp trnh. c hai
dng m gi nh v m my, cc lnh th hin hai phn opcode v operand nh m t trn.
lnh ngn gn, ngi ta khng cung cp trc tip cc tn hiu chn trong lnh, m chng c
m ho thnh cc phn khc nhau ca lnh. Sau khi ly vo CPU cc phn ny s c gii m
to ra cc tn hiu chn mch.
di ca mt lnh c th t 1 ti vi byte, tu thuc vo tng loi vi x l. Nu s dng 1
byte m ho phn opcode, th vi x l s c cc i 256 lnh khc nhau. Trong thc t vic ghi
lnh khng hon ton n gin nh vy, m n cn b chi phi bi nhiu yu t khc na.
Byte 2
Disp1
T.
1 0 0 0 1 0
Opcode
D W mod REG
Byte 3
Byte 4
Disp2
M/R
Direct high
TI
Direct low
Hnh 3.2: M ho lnh MOV trong CPU 8088
PE
.P
Cc lnh ca vi x l thng c 1 hoc hai ton hng, cc ton hng ny cng c m ho c

th trong m lnh. V d lnh di chuyn d liu ca 8088 c m ho nh hnh 3.2. Ton hng
cha kt qu cui cng ca php x l d liu c gi l ton hng ch (Destination), ton hng
cn li trong lnh c gi l ton hng ngun (Source).
Lnh MOV ch,ngun s dng chuyn d liu gia hai thanh ghi, hoc gia thanh ghi
v nh. Nh vy ngoi phn Opcode, trong lnh cc ton hng ngun v ch cn c ch th.
Hnh 3.2 cho thy, m ho cc lnh MOV cn t nht 2 byte, trong 6 bit ca byte u s
dng cho Opcode. Vi cc lnh MOV khng s dng ton hng l thanh ghi on th 6 bit ny
lun l 100010. Khi s dng ton hng l thanh ghi on s c 6 bit Opcode khc.
Bit W m ho ton hng l mt byte (W=0) hoc hai byte (W=1). Trong lnh chuyn d
liu, mt trong hai ton hng bt buc phi l thanh ghi. 8088 s dng 2 hoc 3 bit trong lnh
m ho cc thanh ghi ca n nh sau:
Thanh ghi
W=1
W=0
M ho
51
000
011
001
010
100
111
101
110
01
11
00
10
U
.V
AL
BL
CL
DL
AH
BH
CH
DH
AX
BX
CX
Dx
SP
DI
BP
SI
CS
DS
ES
SS
ED
Bit D dng m ho hng truyn ca d liu trong lnh, D=1 d liu s c chuyn ti
thanh m ho bi 3 bit REG trong lnh, D=0 d liu s chuyn t thanh ghi m ho bi REG i.
Hai bit mod v 3 bit M/R (memory/register) s dng cho vic ch th cho ch a ch cho
ton hng cn li ca lnh. Ch a ch l cch ch th v tr ca d liu sau c m t trong
mc k tip. Bng sau s trnh by cch m ho ca cc ch a ch trong mt lnh.
Mod
00
[BX]+[SI] + d8
[BX]+[DI] + d8
[BP]+[SI] + d8
[BP]+[DI] + d8
[SI] + d8
[DI] + d8
[BP] + d8
[Bx] + d8
.P
TI
[BX]+[SI]
[BX]+[DI]
[BP]+[SI]
[BP]+[DI]
[SI]
[DI]
d16, direct
[BX]
000
001
010
011
100
101
110
111
01
10
T.
M/R
[BX]+[SI] + d16
[BX]+[DI] + d16
[BP]+[SI] + d16
[BP]+[DI] + d16
[SI] + d16
[DI] + d16
[BP] + d16
[Bx] + d16
11
W=0
AL
CL
DL
BL
AH
CH
DH
BH
W=1
AX
CX
DX
BX
SP
BP
SI
DI
PE
Trong : - d8: l ton hng di 8 bit; d16: l ton hng di 16 bit.

V d vic m ho lnh MOV CL,[BX] nh sau:
1 0 0 0 1 0 1 0 0 0 0 0 1 1 1 1
Opcode
chuyn ti thanh ghi
CL
[BX]
Chuyn 1 byte
Hnh 3.3: M ho lnh MOV CL,[BX}.

Cc ch nh v a ch
Cc ch nh v a ch l cc cch ch th v tr cc ton hng trong cc lnh m CPU thc
hin. Mt b vi x l c th c nhiu ch a ch, cc ch ny c xc nh theo cu trc
52
PE
.P
TI
T.
ED
U
.V
phn cng ngay t khi ch to. Cng mt nguyn tc nh v a ch, cc hng ch to CPU c th
t cc tn gi khc nhau. Sau y l cc ch a ch thng dng ca cc b vi x l :
Ch tc thi (immediate addressing mode)
Trong ch ny ton hng l mt hng s c m ha ngay trong lnh. Ton hng tc thi
ch c th l ton hng ngun.
V d : MOV CL,100H ; chuyn gi tr 100H vo thanh ghi CL
MOV [BX],10H ; chuyn 10H vo nh c a ch logic DS:BX.
Ch trc tip (direct)
Trong ch ny ton hng l a ch ca nh cha d liu cn x l trong lnh. Ton hng
cn li trong lnh ch c th l thanh ghi, khng th cng ng thi l nh. Trong 8088, ton
hng trc tip s l a ch lch (offset) ca d liu.
V d : MOV AL,[1000H] ;Chuyn ni dung nh DS:1000H vo AL
MOV [2009H],CX ;Chuyn ni dung CX vo hai nh lin tip
;DS:2009H v DS:200AH.
Ch trc tip thanh ghi (direct register)
Trong ch ny cc thanh ghi bn trong CPU c s dng cha d liu cn x l trong
lnh. V th cc lnh ny c tc thc hin nhanh hn nhiu so vi cc lnh s dng cc ton
hng ngoi b nh.
V d : MOV BX,DX ; chuyn gi tr t DX qua BX.
ADD BL,CL
; cng gi tr ca BL vi gi tr trong CL.
Ch gin tip thanh ghi (indirect register)
Ch ny s dng cc thanh ghi gi a ch ca nh cha d liu cn x l trong lnh,
ton hng cn li trong lnh phi l mt thanh ghi.
V d : MOV AH,[BX] ; chuyn ni dung nh c a ch DS:BX vo AH.
MOV [SI],CL ; chuyn gi tr ca CL vo nh c a ch DS:SI.
Trong h 8088/8086 ch c cc thanh ghi BX, BP, SI, DI c th s dng lm cc ton hng
gin tip thanh ghi.
Ch a ch ch s (index)
Trong ch ny a ch ca ton hng c tnh bng tng s gia 1 thanh ghi 16 bit v gi
tr di (displacement values). Phng php ch nh a ch ny rt c li khi truy cp cc bng
s liu, lc ny cc lnh truy cp ch cn cung cp gi tr di trong m lnh ca n.
Vi h Intel ch c cc thanh ghi BX, BP, SI v DI c th s dng trong ch a ch ny.
a ch on ty theo tng lnh c th nm trong cc thanh ghi DS hoc ES.
V d : MOV CX,[BX]+10
;chuyn ni dung hai nh lin tip bt u
;ti a ch DS:(BX+10) vo CX.
MOV CX,[BX+10] ; 1 cch vit khc ca lnh trn.
MOV CX,10 [BX]
; 1 cch vit khc ca lnh trn.
Ch tng i ch s
Trong ch ny a ch nh cha ton hng c ch nh bng tng ca hai thanh ghi v
mt s di. Ch ny rt tin dng trong vic a ch ho cho cc mng hai chiu.
Trong 8088, chng ta c tt c 4 cch vit ton hng trong ch a ch ny bao gm:
[BX]+[DI]+Disp ; [BX]+[SI]+Disp ; [BP]+[DI]+Disp ; [BP]+[SI]+Disp.
Ch tng i
Trong vi x l thng thng ch ny c s dng trong cc lnh nhy. Khi a ch cn
chuyn iu khin ti sau lnh nhy s c tnh bng khong cch t v tr lnh nhy ti v tr
cn chuyn iu khin n.
53
T.
ED
U
.V
V d : JZ 03H ;chuyn iu khin ti lnh cch lnh nhy 03 byte.

Ch tng bit
Trong ch ny ton hng ch th trong lnh ch l 1 bit ca mt nh hoc mt thanh ghi
no . Ch ny rt hu dng trong cc chng trnh iu khin, khi mun thay i mt ng
no chng ta s khng cn phi cp nht gi tr cho c cng cha n.
V d : SET P0.0 ;lp gi tr bit 0 ca cng 0 ln 1.
Ch gin tip
Ch ny thng s dng cho cc c cu chuyn iu khin chng trnh. V tr cn chuyn
ti s c cha trong mt nh, v ton hng trong lnh s ch th a ch ca nh cha a ch
ca nh . Trong 8088 ch ny c s dng cho c ch phc v ngt.
M t tp lnh ca 80286
Mt b vi x l c tp lnh bao gm nhiu lnh, cc lnh ca chng thng thng th hin
cho mt chc nng s c bn no . Tuy vy, tt c cc loi vi x l u c th chia tp lnh ca
chng thnh ba nhm chnh l : Cc lnh di chuyn d liu, cc lnh x l d liu v cc lnh
iu khin chng trnh.
Khi m t cc lnh s dng cc k hiu sau:
- Imm (Immediate): cc ton hng tc thi.
- Reg (Register) : cc ton hng trc tip thanh ghi.
- Mem (Memory) : cc ton hng b nh ni chung.
- Mem8 (Memory 8 bit) : cc ton hng b nh 8 bit.
- Mem16 (Memory 16 bit) : cc ton hng b nh 16 bit.
- Seg. Reg (Segment Register): cc thanh ghi on.
.P
TI
3.2.1. Nhm lnh di chuyn d liu

1. Lnh chuyn d liu (Move)
- C php:
MOV Dest,Source
- Thc hin:
Dest Source
D liu c chp t ton hng ngun (Source) ti ton hng ch (Dest). Ch lnh khng
lm thay i ton hng ngun, ch lm thay i ton hng ch.
- Cc ton hng s dng trong lnh m t trong bng sau:
Dest
PE
Reg
Reg
Reg
Mem
Mem
Seg.Reg
Seg.Reg
Source
Reg
Mem
Imm
Reg
Imm
Reg16
Mem16
V d
MOV AH,BH
MOV CL,[1000H]
MOV DH,10
MOV Table,BX
MOV X1,25H
MOV DS,AX
MOV ES,X2
Ch mt s trng hp khng s dng c trong lnh ny bao gm:

+ Khng chuyn d liu trc tip gia hai nh.
+ Khng chuyn gi tr tc thi (Imm) vo thanh ghi on.
+ Khng chuyn d liu gia hai thanh ghi on.
54

+ Khng dng thanh ghi CS lm ton hng ch.
2. Lnh chuyn i d liu (Exchange)
- C php: XCHG Dest,Source
- Thc hin: Dest Source
D liu c chuyn i gia hai ton hng ch v ngun, tc l sau khi thc hin c ton
hng ch v ton hng ngun u thay i.
- Cc trng hp s dng trong lnh:
V d
XCHG AX,BX
XCHG SUM,BX
XCHG CL,DL
Reg
Reg
Reg
U
.V
AX
Mem
Reg
Source
Dest
PE
.P
TI
T.
ED
3. Lnh ly d trong bng vo AL

- C php: XLAT
- Thc hin: AL [DS*10H+BX+AL]
Ly gi tr th n trong bng d liu vo thanh ghi AL, vi BX gi a ch u bng, AL gi
khong cch t u bng ti gi tr cn ly.
4. Lnh np a ch tc ng vo thanh ghi.(Load Effective Address to Register)
- C php: LEA Reg16,X1
;X1 l tn bin cn ly a ch.
- Thc hin: Reg16
a ch tc ng ca bin X1.
Ly a ch offset ca bin X1 vo mt thanh ghi 16 bit.
5. Np con tr b nh vo thanh ghi DS (Load Pointer to DS)
- C php: LDS Reg16,X
- Thc hin: DS Seg.X
Reg16 Off.X
Ly a ch on ca bin X vo thanh ghi DS v ly a ch tc ng vo thanh ghi 16 bit.
6. Lnh np con tr b nh vo thanh ghi ES
- C php: LES Reg16,Var
- Thc hin: ES Seg.Var
Reg16 Off.Var
7. Lnh ct d liu vo ngn xp
- C php: PUSH Source
Ton hng Source trong lnh c th l mt bin b nh hoc mt bin thanh ghi. Ct thanh ghi
c vo nh ngn xp s dng lnh PUSHF.
- Thc hin: Ct d liu ch th bi ton hng ngun vo nh ngn xp v t ng gim con
tr ngn xp tu theo s byte ca ton hng ngun.
V d : PUSH AX s thc hin cc thao tc sau
[SS*10H+(SP-1)] AH
[SS*10H+(SP-2)] AL
SP SP-2
8. Lnh ly d liu ra khi ngn xp
- C php: POP Dest
55
U
.V
Ton hng ch trong lnh cng c th l mt ton hng b nh hoc mt thanh ghi. Phc hi
thanh ghi c t nh ngn xp s dng lnh POPF.
- Thc hin: Ly d liu t nh ngn xp ra ton hng ch v tng gi tr ca SP ln mt
lng tng ng vi s byte cha c trong ton hng ch.
9. Cc lnh truy cp cng
Lnh nhp (input):
IN Acc,Port
IN Acc,[DX]
Lnh xut (output):
OUT Port,Acc
OUT [DX],Acc
Vi: Port l a ch cng vo ra truy xut d liu.
[DX] l ton hng gin tip thanh ghi cha a ch cng.
Acc l thanh ghi cha (AX nu truy xut t, AL nu truy xut byte).
TI
T.
ED
3.2.2. Cc lnh x l d liu

Cc lnh x l d liu ngoi kt qu lnh cha trong ton hng ch, trng thi ca kt qu
cn lm nh hng ti cc c trng thi trong thanh chi c.
1. Cc lnh cng
Cng (Add)
- C php: ADD Dest,Source
- Thc hin: Dest Dest+Source
CF Bit trn ca kt qu.
- Cc ton hng s dng trong lnh:
Dest
Reg
Mem
Reg
Imm
Imm
V d
ADD AX,BX
ADD BX,VAR
ADD SUM,DX
ADD CL,09
ADD SUM,10
PE
.P
Reg
Reg
Mem
Reg
Mem
Source
Cng c nh : (Add with Carry)

- C php: ADC Dest,Source
- Thc hin: Dest Dest+Source+CF
- Cc ton hng s dng trong lnh ging nh lnh cng.
Lnh tng (Increment)
- C php: INC Dest
- Thc hin: Dest Dest+1
- Ton hng ch s dng trong lnh c th l mt thanh ghi hoc mt nh.
Chnh thp phn cho lnh cng (Decimal Adjust for Add)
- C php: DAA
- Thc hin: kt qu ca lnh cng t ngay trc lnh chnh thp phn s c iu chnh t
dng nh phn thng thng thnh dng BCD nn. Gi tr trn khi thanh cha s lu trong CF.
56
PE
.P
TI
T.
ED
U
.V
c kt qu ng, cc ton hng s dng trong lnh cng trc DAA phi dng thp
phn nn v kt qu phi nm trong thanh ghi AL.
Chnh ASCII cho lnh cng (ASCII Adjust for Add)
- C php: AAA
- Thc hin: iu chnh li gi tr ASCII cho lnh cng ngay pha trc. c kt qu
ng, cc ton hng ca lnh cng phi di dng m ASCII.
2. Cc lnh tr (Subtract)
Hon ton tng t vi cc lnh cng, 8088 c cc lnh tr tng ng.
Tr :
SUB Dest,Source
Tr c nh : SBB Dest,Source
Gim:
DEC Dest
Ly b 2:
NEG Dest
Chnh thp phn cho php tr : DAS
Chnh ASCII cho php tr :
AAS
3. Cc lnh nhn (multiply)
Lnh nhn.
- C php: MUL Source
- Thc hin: AX AL * Source8 ; khi ton hng ngun 8 bit
DX AX AX * Source16 ; khi ton hng ngun 16 bit
Lnh nhn s nguyn c du:
- C php: IMUL Source
- Thc hin: tng t nh lnh nhn thng nhng vi cc s nguyn, kt qu s l mt s
nguyn.
Ngoi ra cn c cc lnh nhn s nguyn c du khc nh:
IMUL Reg,Imm
; Reg16 Reg16 * Imm
IMUL Reg,Source,Imm8 ; Reg16 Source16 * Imm8
Lnh chnh ASCII cho php nhn.
- C php: AAM
- Lnh ny ch thc hin ng cho php nhn s BCD nn 8 bit kt qu trong AL.
4. Cc lnh chia (Division)
Tng t nh cc lnh nhn, 8088 c cc lnh chia nh sau:
Chia: DIV Source
Vi Source 8 bit, s b chia trong AX thng s trong AL, s d trong AH.
Vi Source 16 bit, s b chia trong DX AX, thng cha trong AX, s d cha trong DX.
Chia s nguyn c du: IDIV Source
Chnh ASCII cho php chia: AAD
5. Cc lnh logic
Cc lnh logic thc hin vi cc ton hng 8 v 16 bit vi vic thc hin php logic tng bit
tng ng trong hai ton hng. Cc lnh logic bao gm:
AND Dest,Source
OR Dest,Source
XOR Dest,Source
NOT Dest
Cc ton hng s dng trong cc lnh logic trn bao gm:
57

Dest
Reg
Mem
Reg
Imm
Imm
Reg
Reg
Mem
Reg
Mem
Source
CF
Dn
T.
ED
U
.V
Ring lnh NOT ch c mt ton hng ch, ton hng ny c th l mt thanh ghi hoc mt
nh.
6. Cc lnh quay dch d liu
Trong cc lnh quay, dch ton hng ch (Dest) l b nh hoc thanh ghi s quay hoc dch
cc bit i s ln ch th bng s m (Count) ch th trong lnh. S m count ch c th bng 1
hoc cha trong CL.
Dch tri logic (Shift Logic Left).
- C php: SHL Dest,Count
- Thc hin: cc bit ca ton hng ch s c dch v pha tri count ln, sau mi ln dch
bit th i s thay th bit th (i+1), bit c trng s cao nht s c dch ra c nh (CF), v bit c
trong s thp nht s c thay th bng s 0. Php dch tri logic c th biu din trn hnh 3.4.
D0
TI
Hnh 3.4: Hot ng ca lnh SHL Dest,Count.
.P
Dch tri s hc (Shift Arithmetic Left).

- C php: SAL Dest,Count
- Thc hin: tng t nh lnh dch tri logic, ch khc ch bit c trong s cao nht trong
ton hng ch khng thay i sau khi thc hin lnh.
Tng t c cc lnh dch phi logic v dch phi s hc:
SHR Dest,Count ;dch phi logic.
SAR Dest,Count ;dch phi s hc.
PE
CF
Dn
D0
Hnh 3.5: Hot ng ca lnh ROL Dest,Count.
Quay tri (Rote Left)

- C php: ROL Dest,Count
- Thc hin: tng t nh lnh dch tri logic nhng bit c trng s cao nht c chuyn
tr v thay cho bit c trng s thp nht trong ton hng Dest. C th m t hot ng ca lnh
trn hnh 3.5.
Quay phi (Rote Right).
- C php: ROR Dest,Count
- Thc hin: tng t lnh ROL nh chiu quay i v bn phi.
Quay tri qua c nh.
58

-
C php: RCL Dest,Count

Thc hin: Tng t lnh quay tri nhng c c nh u tham gia vo vng quay. C th
m t hot ng ca lnh ny trn hnh 3.6.
CF
Dn
D0
Hnh 3.6: Hot ng ca lnh RCL Dest,Count.
Reg
Reg
Reg
Mem
Source
Reg
Mem
Imm
Imm
T.
Dest
ED
U
.V
Quay phi qua c nh.

- C php: RCR Dest,Count
- Thc hin: ging nh lnh quay tri qua c nh (RCL), nhng vi chiu quay ngc li.
7. Lnh so snh
- C php: CMP Dest,Source
- Thc hin: Dest Source tc ng ln cc c trng thi.
Php tr khng lm thay i cc ton hng trong lnh, nhng trng thi ca n c thng
bo lnh cc c trng thi. Cc ton hng s dng trong lnh bao gm.
PE
.P
TI
8. Cc lnh x l chui d liu

Di chuyn chui theo byte (Move string byte)
- C php: MOVSB
- Thc hin: [ES*10H + DI] [DS * 10H + SI]
SI SI 1
DI DI 1
Du cng khi c DF = 1, du tr khi c DF = 0.
Di chuyn chui theo byte (Move string byte)
- C php: MOVSW
- Thc hin: [ES*10H + DI] [DS * 10H + SI]
[ES*10H + DI + 1] [DS * 10H + SI + 1]
SI SI 2
DI DI 2
So snh chui theo byte (compare string byte)
- C php: CMPSB
- Thc hin: [DS*10H + DI] - [ES * 10H + SI]
SI SI 1
DI DI 1
Du cng khi c DF = 1, du tr khi c DF = 0.
So snh chui theo t (Compare String Word)
- C php: CMPSW
- Thc hin: [DS*10H + DI] - [ES * 10H + SI]
59
PE
.P
TI
T.
ED
U
.V
SI SI 2
DI DI 2
Qut chui theo byte (Scan String Byte): Xc nh k t ch nh trc trong chui
- C php: SCASB
- Thc hin: AL - [DS*10H + DI]
DI DI 1
Qut chui theo t (Scan String Word)
- C php: SCASW
- Thc hin: AX - [DS*10H + DI]
DI DI 2
Np chui theo byte (Load String Byte)
- C php: LODSB
- Thc hin: AL [DS*10H + SI]
SI SI 1
Np chui theo t (Load String Word)
- C php: LODSW
- Thc hin: AX [DS*10H + SI]
SI SI 2
Lu chui theo byte (Store String Byte)
- C php: STOSB
- Thc hin: [ES*10H + DI] AL
DI DI 1
Lu chui theo t (Store String Word)
- C php: STOSW
- Thc hin: [ES*10H + DI] AX
DI DI 2
Cc lnh lp chui: Cc lnh lp chui thc hin cc lnh v chui, nhng lp li CX ln,
hoc cho n khi tho mn iu kin. Cc lnh ny bao gm:
- Cc lnh:
REP MOVSB
REP MOVSW
REP STOSB
REP STOSW ; cc lnh ny c lp li cho n khi CX = 0
- Cc lnh:
REPE CMPS hoc REPZ CMPS
REPE SCAS hoc REPZ SCAS
Lp li cho n khi ZF = 1 hoc CX = 0.
- Cc lnh:
REPNE CMPS hoc REPNZ CMPS
REPNE SCAS hoc REPNZ SCAS
Lp li cho n khi ZF = 0 hoc CX = 0.
60
PE
.P
TI
T.
ED
U
.V
3.2.3. Cc lnh iu khin chng trnh

1. Cc lnh iu khin c
Lnh chuyn gi tr thanh ghi c vo thanh ghi AH (Load AH with Flag).
- C php: LAHF
- Thc hin: AH F
Phc hi gi tr ca thanh ghi c t thanh ghi AH (Store AH into Flags).
- C php: SAHF
- Thc hin: F AH
Xo c nh : CLC
Lp c nh : STC
Ly b c nh : CMC
Xa c ngt : CLI
Lp c ngt : STI
2. Cc lnh nhy
Nhy khng iu kin (JMP)
- C php: JMP tc_t.
- Thc hin: chuyn iu khin chng trnh ti v tr xc nh bi tc t ch th trong lnh.
- Tc t = Short - Label; Near Label; Far Label; Mem16; Reg16; Mem32.
+ Vi Short label v Near Label: lnh s chuyn iu khin ti nhn cch lnh nhy
trong khong t 128 ti 127 byte. Ton hng s dng s tnh theo ch tng i, ch c gi
tr IP thay i, CS khng thay i.
+ Vi Mem16 v Reg16: lnh s chuyn iu khin tng i trong khong t 32768 ti
32767. Cng ch c gi tr trong IP b thay i.
+ Vi Mem32 v Far Label: lnh s chuyn iu khin qua on 64KB khc ca b nh. C
CS v IP u c gn gi tr mi.
Nhy c iu kin
Cc lnh nhy c iu kin s thc hin vic chuyn iu khin khi iu kin ch th trong
lnh c tho mn, nu iu kin khng tho lnh k tip trong chng trnh s c thc hin.
Cc lnh ny thc hin vic chuyn iu khin tng i trong khong 128 t 127 byte.
Cc iu kin s dng trong cc lnh ny bao gm:
- A: Ln hn (Above).
- B: Nh hn (Below).
- E: Bng (Equal).
- NA: khng ln hn.
- NB: khng nh hn.
- NE: khng bng.
- AE: ln hn hoc bng.
- BE: Nh hn hoc bng.
- NAE: khng ln hn hoc bng
- NBE: Khng nh hn hoc bng.
- C: CF = 1; NC: CF = 0; Z: ZF = 1; NZ: ZF = 0; S: SF = 1; NS: SF = 0; P: l; PE: chn; O:
OF = 1; NO: OF = 0.
- CXZ: nhy nu CX bng 0 .
Khi thc hin vic so snh cc s c du cn c cc iu kin nh:
- L: nh hn (Less Than).
61
LP TRNH HP NG CHO H VI X L INTEL
PE
3.3.
.P
TI
T.
ED
U
.V
- G: ln hn (Great than).
- LE: nh hn hoc bng.
- GE: ln hn hoc bng.
- NLE: khng nh hn hoc bng.
- NGE: khng ln hn hoc bng.
Vi cc iu kin trn 8088 c cc lnh nhy c iu kin sau:
JB Nhn; JNAE Nhn; JC Nhn; JAE Nhn; JNB Nhn; JNC Nhn; JBE nhn; JNA Nhn;
JNBE nhn; JA Nhn; JE Nhn; JZ Nhn; JNE Nhn; JNZ Nhn; JS Nhn; JNS Nhn; JO Nhn;
JNP Nhn; JP Nhn; JPE Nhn; JNP Nhn; JPO Nhn; JCXZ Nhn; JL Nhn; JNGE Nhn; JG
Nhn; JNLE Nhn; JLE Nhn; JNG Nhn; JGE Nhn; JNL Nhn.
3. Cc lnh cho chng trnh con
Cc lnh gi chng trnh con
- C php: CALL tc_t.
- Cc tc t trong lnh tng t nh trong lnh nhy khng iu kin bao gm: Near
Proc; Far Proc; Mem16; Reg16; Mem32.
- Thc hin: ct gi tr CS v IP vo nh ngn xp (trong cc lnh gi xa, trong cc lnh
gi gn ch ct IP vo ngn xp), v chuyn iu khin chng trnh ti nhn ch th bi tc
t trong lnh.
Cc lnh tr v t chng trnh con (Return)
RET ; a ch quay v t chng trnh con c ly ti nh ngn xp.
RET Disp16; a ch quay v t chng trnh con c ly ti v tr c a ch bng nh ngn
xp cng vi s di ch th bi ton hng Disp16 trong lnh.
4. Cc lnh vng lp
LOOP Short Label; gim CX i 1 v nhy tng i ti v tr xc nh bi Short Label
nu CX0 . Nu CX = 0 lnh k tip trong chng trnh s c thc hin.
LOOPE hoc LOOPZ Short Label; gim CX i 1 v chuyn iu khin chng trnh
nu CX 0 v ZF 0.
LOOPNE hoc LOOPNZ Short Label; gim CX i 1 v chuyn iu khin chng trnh
nu CX 0 v ZF = 0.
Mt s ngt ca DOS
Khi lp trnh bng hp ng trn cc my vi tnh IBM PC, n gin c th s dng cc
chng trnh iu khin thit b sn c ca BIOS v DOS. t nht trc ht cng cn chp nhn
cc th tc c sn ny s dng c cc thit b giao tip c bn vi my tnh nh bn phm,
mn hnh trong bc u lp trnh. Cn khi c y cc kin thc v hp ng, cng nh v
cu trc phn cng my tnh chng ta hon ton c th thc hin cc chng trnh iu khin cc
thit b bng cc lnh gi nh cn bn trong tp lnh, hoc vit cc chng trnh iu khin thit
b cho cc h thng phn cng ca ring mnh.
BIOS (Base Input Output System) l chng trnh trong b nh ROM, n s c thc hin
trc tin ngay khi khi ng my. BIOS s kim tra cc thit b c bn trong h thng sau n
chuyn iu khin cho h iu hnh. H iu hnh thng dng khi my tnh mi ra i l DOS
(Disk Operation System). Trong DOS v BIOS c cc chng trnh con vit sn cho vic iu
khin cc thit b. s dng chng trong chng trnh hp ng chng ta dng li gi ngt mm
62
PE
.P
TI
T.
ED
U
.V
(INT) km theo s hiu ngt. Cc s hiu ngt c qui nh sn cho cc thit b, mi ngt s c
cc qui nh khc nhau v cc bin vo v ra khi thc hin. Sau y l m t v mt s ngt
thng s dng trong chng trnh hp ng.
- Ngt 20H dnh ring kt thc chng trnh loi .COM. Hm ny ra lnh cho h iu hnh
kt thc chng trnh ang chy v chuyn iu khin v cho chng trnh gi.
- Ngt 21H:
Hm 01H: c mt k t t bn phm
Mt k t s c c vo t bn phm v hin ln mn hnh. Nu ti thi im gi hm cha
c k t sn sng, th hm s i cho ti khi c phm c nhn.
Vo: AH = 01
Ra: AL cha m ASCII ca phm nhn
Khi nhn c cc k t c m m rng AL = 0. Lc ny c th gi hm mt ln na c
c m m rng.
Khi k t vo l Ctrl C (m ASCII l 3) ngt 23H s c gi tr iu khin v DOS.
Ngoi AL, ni dung cc thanh ghi khc khng b thay i sau khi gi hm.
V d khi gi hm ny c th vit:
MOV AH,02
INT 21H
Hm 02H: Hin mt k t ln mn hnh.
Hm ny cho php hin mt k t ln mn hnh
Vo: AH = 02
DL cha m ASCII ca k t cn hin th.
Ra: khng.
Tt c cc thanh ghi khng b thay i sau khi gi hm, cc m c bit nh Backspace (xo
k t trc), Carriage Return (v u hng) v Line Feed (xung hng) s c ghi trn mn hnh
di dng lnh.
Hm 09: Hin chui k t ln mn hnh.
Vo: AH = 09
DX cha a ch offset ca chui cn hin th.
Ra:khng
Chui k t cn t trong b nh di dng mt chui cc byte ASCII, kt thc l k t $
(m ASCII l 36). Cc m c bit nh Backspace (xo k t trc), Carriage Return (v u
hng) v Line Feed (xung hng) s c ghi trn mn hnh di dng lnh. Ch c AL b thay
i sau khi gi hm.
Hm 4CH: kt thc chng trnh loi .EXE.
Hm ny kt thc chng trnh v truyn v mt m li, chng trnh gi c th nhn c
m li ny bng cch gi hm 4DH, b nh RAM cho chng trnh chim s c gii phng.
3.3.1. Lp trnh chuyn mng d liu

chuyn mt mng d liu t v tr ny qua v tr khc, trc ht cn mt thanh ghi gi a
ch ngun v mt thanh gi a ch ch ca cc vng nh d liu, d liu s c c t vng
nh ngun vo thanh ghi ca CPU v ghi ra vng nh ch s dng cc thanh ghi a ch. Sau
cc thanh ghi a ch c tng ln chun b cho chu k chuyn d liu k tip. Qu trnh trn
c lp li cho n khi gp iu kin kt thc. iu kin kt thc c th l gim ht s m k t
trong chui hoc gp k t kt thc chui.
V d : Vit chng trnh thc hin cc cng vic sau:
63

- Khai bo chui k t ASCII A1B2C3D4E5F6G7H8I9K0
- Chuyn chui d liu trn ti b nh mn hnh bt u ti a ch B8000H.
Gii :
ED
U
.V
.Model Tiny
.Code
Start: Jmp begin
St DB A1B2C3D4E5F6G7H8I9
Begin:
Mov es,0b800H ;ES gi a ch segment ca vng nh ch.
Mov di,0
;DI gi a ch offset ca vng nh ch.
Lea si,St
;SI gi a ch offset ca chui d liu ngun, DS gi a ch segment.
Std
;lp c nh hng DF chuyn d liu theo chiu a ch tng
Mov cx,20
;chuyn 20 k t
LoopMove:
Movsb
;chuyn mt byte d liu, tng cc thanh ghi SI v DI.
Loop LoopMove ;lp li cho n khi chuyn ht CX k t.
Int 20h
End start
PE
.P
TI
T.
3.3.2. Lp trnh chuyn i m

Cc m s dng thng dng trong cc h thng vi x l bao gm: m nh phn, hexa, thp
phn v ASCII. Vic chuyn i gia cc loi m ny c th s dng hai nguyn tc chnh: Khi
quan h gia cc m c lut s s dng cc cng thc tnh ton theo lut. Khi quan h gia cc m
khng c lut, thc hin vic chuyn i m bng cch tra cc bng d liu c nh ngha
trc.
V d: Vit chng trnh chay trn my tnh thc hin cc cng vic sau:
- Nhp vo t bn phm mt s Hexa t 0 n F.
- Hin th m ASCII tng ng.
- Hin th gi tr nh phn tng ng di dng 8 bit.
- Hin th gi tr thp phn tng ng.
- Hin th trn dng tip theo m LED 7 on kathode chung tng ng.
Gi s: Nhn D
Mn hnh hin D.
Dng tip theo hin 43H l m ASCII ca phm D.
Dng tip theo hin 00001101 = 0DH
Dng tip theo hin 13 = 0DH
Gii :
nhp mt k t t bn phm c th s dng hm 01 ca ngt 21H, kt qu tr v trong
thanh ghi AL = 43H l m ASCII tng ng ca k t D, mn hnh s hin th D.
hin th ln mn hnh c th s dng hm 02 ngt 21H vi thanh ghi DL cha m ASCII
ca k t mun hin, nh vy cn hin tun t hai m 34H v 33H l m ASCII ca s 4 v s 3.
hin th m nh phn cn i m ASCII thnh s Hex, bng cch tr i 30H vi cc k t
s t 0 n 9 v tr i 37H vi cc k t ch t A ti F, sau hin tun t tng bit ca s Hex
ny ln mn hnh.
hin th gi tr thp phn, cn i gi tr HEX thnh thp phn bng cch chia cho 10,
thng s s l s hng chc, s d s l hng n v.
64
PE
.P
TI
T.
ED
U
.V
i thnh m LED 7 on c th nh ngha trc bng m LED tng ng vi cc s t

0 ti F, sau c th dng lnh XLAT tra m tng ng vi s Hex .
.Model Small
.Stack 100h
.Data
CR equ 0dh
LF equ 0ah
Tb1 db CR, LF, Nhap vao mot s HEX (0 F) : $
Tb2 db CR, LF, Ma ASCII tuong ung la: $
Tb3 db CR, LF, Ma nhi phan tuong ung l : $
Tb4 db CR, LF, Ma thap phan tuong ung l : $
Tb5 db CR, LF, Ma LED 7 oan tuong ung l : $
MaAscii db ?
MaHex db ?
MaLed db ?
LedTable db 0fch,60h,0dah,0f2h,6eh,0b6h,0beh,0e0h,0feh,0f6h
.Code
Main proc
Mov ax,@data
;khi to ds
Mov ds,ax
Mov ah,09
;hin thng bo nhp k t
Lea dx,tb1
Int 21h
NHAP:Mov ah,01
; nhp k t t bn phm
Int 21h
Mov MaAscii,al ;ct vo bin MaAscii trong b nh
Call ASCII
;gi chng trnh hin th m Ascii
Call BINARY
;gi chng trnh hin th m nh phn
Call DECIMAL ;gi chng trnh hin th thp phn
Call LED7
;gi chng trnh hin th m LED 7 on
mov ax,4c00h
; tr v DOS
int 21h
Main endp
ASCII proc near
Mov ah,09
;hin thng bo hin m ASCII
Lea dx,tb2
Int 21h
Shr al,4
;dch phi ly 4 bit cao m ASCII ca k t
Add al,30H
;i thnh m ASCII
Mov dl,al
Call Hien
;Hin ln mn hnh.
Mov al,MaAscii ;Ly li m ASCII ca k t
And al,0fH
;che 4 bit cao ly 4 bit thp m ASCII ca k t
Add al,30H
; i 4 bit thp thnh m ASCII ca n hin th
Mov dl,al
Call Hien
;gi chng trnh hin th
65
;Hin th thng bo hin m nh phn
ED
;bit 0 th hin s 0 ln mn hnh
U
.V
;nu l k t ch A- F th tr i 37H
;ct m hex ca k t vo bin MaHex
;dch 8 ln hin th 8 bit
;kim tra xem c phi l phm s khng

;chuyn iu khin nu l ch
;Nu l s th tr i 30H
T.
;bit 1 th hin s 1 ln mn hnh
;hin th thng bo hin m thp phn
PE
.P
TI
Ret
ASCII endp
BINATY proc near
Mov ah,09
Lea dx,Tb3
Mov al,MaAscii
Cmp al,39H
Ja CHU
Sub al,30H
Jmp BIN
CHU: Sub al,37H
BIN: Mov MaHex,al
Mov cx,8
DICH: Shl al,1
Jc bit1
Mov dl,30H
Call Hien
Jmp Lap
Bit1: Mov dl,31H
Call Hien
Lap: Loop DICH
Ret
BINARY endp
DECIMAL proc near
Mov ah,09
Lea dx,tb4
Int 21H
Mov al,MaHex
Div 10
Add al,30H
Mov dl,al
Call Hien
Add ah,30H
Mov dl,ah
Call Hien
Ret
LED7 proc near
Mov ah,09
Lea dx,Tb5
Int 21H
Mov al,MaHex
Lea dx,LedTable
Xlat
Mov MaLed,al
Shr al,4
Call Hex_Ascii
;chia 10 i thnh gi tr thp phn

;i hng chc thnh m Ascii hin th
;i hng n v thnh m Ascii hin th
;hin th thng bo hin m LED

;ly m Hex ca k t hin th
;DX gi a ch offset ca bng m LED 7 on
;i m Hex thnh m LED 7 on tng ng.
;Ct tm m LED vo bin MaLed
;ly 4 bit cao ca m LED 7 on hin th.
;i 4 bit gi tr Hex ca m LED thnh m ASCII hin th
66

Mov dl,al
Call Hien
Mov al,MaLed
And al,0fH
Call Hex_Ascii
Mov dl,al
Call Hien
Ret
LED7 endp
Hex_Ascii proc near
Cmp al,9
Ja doichu
Add al,30H
Jmp EndH_A
Doichu:Add al,37H
EndH_A:ret
Hex_Ascii endp
Hien proc near
Mov ah,02
Int 21H
Ret
Hien endp
End main
;hin th ln mn hnh
;Ly 4 bit thp ca m LED

; i thnh m ASCII hin th
ED
;nu l ch th cng thm 37H
U
.V
;so snh xc nh 4 bit cao l s t 0 9 hay t A - F

;chuyn iu khin nu l ch
;nu l s th cng thm vi 30H thnh m Ascii tng ng
T.
;hin ln mn hnh bng hm 02 ngt 21H
PE
.P
TI
3.3.3. Lp trnh iu khin ngoi vi

Trong h thng vi x l vic lp trnh iu khin ngoi vi thng thng c thc hin bng
cc lnh IN v OUT. Lnh IN s dng c d liu t cc cng vo, cng OUT s dng ghi d liu
ti cc cng ra.
V d: Gi s cng my in ca my tnh giao tip ng ra vi 8 LED vi a ch cng 378H, bn
phm nhn ti cng c a ch 379H nh trn hnh 3.13. Vit chng trnh thc hin cc cng vic
sau:
- Kim tra phm nhn v hin th cc s 0 3 tng ng vi phm c nhn.
- Lm sng tt cc LED tng ng khi nhn cc phm t 0 7 tng ng trn bn phm.
Gii :
.Model Tiny
.Code
Start: Jmp Begin
Tb1 db 0ah,0dh,Nhap so thu nhat: $
Tb2 db 0ah,0dh, Nhap so thu hai : $
Tb3 db 0ah, 0dh, Tong cua hai so ? va ? la: $
MaLed DB 0ffh
SoHien DB 00000001B,00000010B,00000100B,00001000B,00010000B,00100000B
01000000B,10000000B
Tong DB ??$
Phim:
In al,379H
;nhp d liu t cng phm nhn
And al,0fh
;che 4 bit cao khng c d liu
67
;C C = 0 tm c phm
;cha c bit bng 0 th tng DL
;c bn phm
U
.V
;cng vi 30H i thnh m ASCII

;Hin th ln mn hnh
;so snh vi 0
;nh hn 0 th thot
;so snh vi s 7
;ln hn 7 th thot
;DX gi a ch cng iu khin Led
;BX gi a ch u bng SoHien
;ly m s tng ng vi phm nhn
;Ly m Led vo AL
;ly b bit m led tng ng vi phm nhn cc bit khc khng i
;ct m led mi
ED
Mov ah,01
Int 21h
Cmp al,30h
Jb thoat
Cmp al,37h
Ja thoat
Mov dx,378h
Lea bx,SoHien
Xlat
Mov ah,MaLed
Xor al,ah
Mov MaLed,al
Out 378h,al
ret
;DL tng ng vi phm nhn 0 - 3
Thoat:
Begin:
.P
TI
LED:
;nu tt c cc bit bng 1 th khng c phm nhn
T.
Cmp al,0fh
Je KhongCoPhim
Mov dl,0
Dich:
Shr al,1
Jnc CoPhim
Inc dl
Jmp Dich
CoPhim: add dl,30H
Mov ah,02
Int 21h
KhongCoPhim:Ret
Call Phim
Call LED
Int 20h
End Start
;Chng trnh qut phm hin th ln mn hnh.

;Chng trnh iu khin LED
;tr iu khin v h thng
PE
Tm tt ni dung chng:
Chng trnh ngun hp ng c thc hin di dng cc tp tin vn bn trn my tnh,
chuyn thnh chng trnh c th thc hin c trn cc h thng vi x l cn phi c
cc chng trnh hp dch. C rt nhiu chng trnh hp dch c th s dng cho cc
chng trnh vit cho h vi x l Intel nh: MASM, LINK, TASM. TLINK hay c mt s
chng trnh cho php son tho v chy m phng nh EMU86.
Thnh phn ca mt cu lnh c th bao gm: Nhn, lnh, cc ton hng v li ch gii.
Cc lnh vit trong chng trnh ngun c th l cc lnh b vi x l thc hin, nhng
cng c th l cc lnh ch dn cho qu trnh hp dch gi l ch th hp ng. Mt s ch
th hp ng quan trng thng c s dng nh: DB, DW, DD hoc DT s dng cho
vic khai bo cc bin ca chng trnh, EQU khai bo cc hng s. Cc ch th .data,
.stack, .code s dng khai bo cc on b nh.
68
ED
U
.V
C th thc hin chng trnh hp ng vi nhiu khun dng chng trnh khc nhau khi
bin dch ra hai dng chng trnh .COM v .EXE.
Tp lnh ca vi x l 80286 chia thnh cc nhm: cc lnh di chuyn d liu, cc lnh s
hc logic, cc lnh iu khin chng trnh v cc lnh x l chui.
Cc lnh di chuyn d liu bao gm: MOV, XCHG, XLAT, LEA, LDS, LES, PUSH,
POP, IN, OUT.
Cc lnh s hc v logic bao gm cc nhm: Cc lnh s hc, cc lnh logic v cc
lnh quay dch.
- Lnh s hc bao gm: cc lnh nhm cng: ADD, ADC, INC, DAA, AAA. Cc lnh
nhm tr: SUB, SBB, DEC, DAS, AAS, NEG v CMP. Cc lnh nhm nhn: MUL,
IMUL, AAM. Cc lnh nhm chia: DIV, IDIV, AAD.
- Cc lnh logic bao gm: AND, OR, XOR, NOT.
- Cc lnh quay dch bao gm: SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR.
Cc lnh iu khin bao gm cc lnh nhy, cc lnh chng trnh con, cc lnh ngt.
Cc lnh nhy bao gm nhy khng iu kin JMP, v cc lnh r nhnh: JA, JE, JB,
JNA, JNB, JNE, JG, JL, JNG, JNL, JC, JNC, JZ, JNZ, JPO, JPE, JS, JNS, JO, JNO.
Cc lnh chng trnh con bao gm lnh gi chng trnh con CALL v lnh quay v
t chng trnh con RET.
Cc lnh ngt gm gi ngt INT v quay v t chng trnh ngt IRET.
T.
BI TP:
PE
.P
TI
Bi 1: Bit ni dung thanh ghi DS = 4000H, hy cho bit a chi vt l m 8088 s truy cp khi
thc hin lnh MOV AL,[3897H].
Bi 2: Bit ni dung thanh ghi DS = 7000H, hy vit dng lnh 8088 thc hin vic sao chp
d liu ca thanh ghi DL vo nh c a ch vt l 74B2CH.
Bi 3: Hy cho bit ch a ch v m t hot ng ca 8088 khi thc hin cc lnh sau:
a) MOV AX,[BX]
b) MOV CX,[1234H]
c) SUB AX,DX
d) XOR CL,BH
e) AND AH,CH
f) SHL DX,CL
g) DEC BP
h) POP DS
i) MOV BX,6783H
k) LEA CX,[BX+DI]
l) NEG AH
m) PUSH AX
n) XLAT
o) XCHG DX,CX
p) ROR BL,1
q) MUL CX
r) DIV CL
s) MOVSB
t) JAE N1
u) CALL L1
Bi 4: Vit cc lnh hp ng thc hin cc cng vic sau:
a) Np s 3654H vo thanh ghi BP.
b) Sao chp ni dung thanh ghi BP ti thanh ghi SP.
c) Sao chp ni dung thanh ghi AX ti nh c a ch offset = 9876H.
d) Tng ni dung thanh ghi CX ln 1.
e) Cng 07H vi DL.
f) Lp bit MSB ca AX ln 1 nhng khng lm nh hng ti cc bit khc.
69
PE
.P
TI
T.
ED
U
.V
g) Lp LSB ca AX ln 1 nhng khng lm nh hng ti cc bit khc.

h) Che 4 bit cao ca thanh ghi CL.
i) Nhn gi tr trong AH vi 08.
j) Nghch o 4 bit thp ca thanh ghi DX m khng lm nh hng ti cc bit khc.
k) Ly b 2 ni dung thanh ghi BP.
Bi 5: Cho bit ni dung cc thanh ghi AX, BX, CX, DX sau khi 8088 thc hin cc lnh sau:
MOV AX,1234H
MOV BX,5678H
MOV CX,9ABCH
MOV DX,0EF3H
PUSH AX
PUSH BX
PUSH CX
PUSH DX
POP AX
POP BX
POP CX
POP DX
Bi 6 : Cho bit gi tr cha trong thanh ghi AX sau khi 8088 thc hin cc lnh sau:
MOV AX,0
MOV BX,2
MOV CX,50
@: ADD AX,BX
ADD BX,1
LOOP @
Bi 7: Cho bit ni dung cc thanh ghi nh sau:
CS = 2000
SP = FFFF
AX = A407
DS = 3000
BP = 0009
BX = 24B3
SS = 4000
SI = 4200
CX = 0002
ES = 6000
DI = 6116
DX = 2764
Hy cho bit ni dung ca cc thanh ghi trn v cc c trng thi ca 8088 sau khi thc hin
mt trong cc lnh sau:
a) MOV AH,AL
b) ADD DL,AH
c) MUL BP
d) OR CX,CX
e) XOR CX,CX
f) CMP DX,SI
Gii s rng trc khi cc lnh trn c thc hin tt c cc c c xo v 0.
Bi 8: Hy cho cc v d minh ho cc ch a ch : Tc thi, trc tip, trc tip thanh ghi, gin
tip thanh ghi, tng i ch s, tng i c s, tng i ch s c s.
Bi 9: M t cc ch a ch c th s dng cho lnh JMP.
Bi 10: Vit chng trnh hp ng nhp mt k t t bn phm v hin th n ln mn hnh trn
dng tip theo.
Bi 11: Vit chng trnh nhp mt k t t bn phm v hin th n ln mn hnh 25 ln theo ct
dc.
Bi 12: Vit chng trnh nhp v hin th chui k t cho n khi gp ESC th dng.
Bi 13: Vit chng trnh nhp t bn phm mt chui k t kt thc bng phm ENTER, hin th
chui trn dng tip theo vi trnh t t nh n ln.
70
PE
.P
TI
T.
ED
U
.V
Bi 14: Vit chng trnh nhp t bn phm mt chui k t, hin th trn dng tip theo di
dng ch in hoa.
Bi 15: Vit chng trnh nhp vo t bn phm hai chui k t (cc chui kt thc bng phm
ENTER), sau hin th trn dng tip theo cc k t cng xut hin trong c hai chui
trn.
Bi 16:Vit chng trnh nhp t bn phm mt chui k t bt k kt thc bng phm ENTER,
sau hin th m ASCII ca cc k t nhp trn dng tip theo. V d nhp 0 hin
30H, nhp A hin 41H
Bi 17: Vit chng trnh hin cc s t nhin t 1 ti 99.
Bi 18: Vit chng trnh nhp t bn phm mt s HEXA c 3 ch s, hin th trn dng tip
theo gi tr thp phn ca n.
Bi 19: Vit chng trnh gii phng trnh bc nht ax+b=c, vi a, b, c l cc s nguyn c mt
ch s.
Bi 20:Vit chng trnh nhp vo t bn phm mt lnh gi nh ca vi iu khin 8051, hin th
lnh m my ca n trn dng tip theo.
Bi 21: Vit chng trnh nhp t bn phm mt chui k t, sau hin th chng di dng
ch tri t tri qua phi.
Bi 22: Vit chng trnh tnh tng 100 s t nhin u tin.
Bi 23 : Vit chng trnh nhp t bn phm mt k t, sau hin th n di dng ma trn 5 ct
8 hng bng cc du *.
Bi 24: Vit chng trnh tnh c s chung ln nht ca hai s thp phn (c nhiu nht hai ch
s nhp t bn phm.
Bi 25: Vit chng trnh nhp v hin th mt chui k t dng u tin ca mn hnh, sau
cho cc ch ri theo chiu dc xung hng cui cng ca mn hnh nu ch c nhp
li t bn phm (ch to tr mt thng thy c ch ri).
Bi 26: Vit chng trnh hin th k t theo ng cho trn mn hnh.
Bi 27: Vit chng trnh hin th tt c cc s nguyn t c hai ch s.
Bi 28: Vit chng trnh hin th bng cu chng.
Bi 29: Vit chng trnh nhp t bn phm s nh phn 8 bit, hin th trn dng tip theo dng
HEXA ca n.
Bi 30: Vit chng trnh hin th b m thp phn 3 ch s trn mn hnh, bt u gi tr ca b
m l 000. Khi nhn phm T gi tr b m tng ln, khi nhn phm G gi tr ca b
m gim i.
Bi 31: Vit chng trnh nhp t bn phm mt s thp phn c mt ch s, hin th m LED 7
on cathode chung tng ng ca n trn dng tip theo.
71
Chng 4: Thit k h thng vi x l chuyn dng.
CHNG IV: THIT K H THNG VI X L CHUYN

DNG
TRNH T THIT K H THNG VI X L CHUYN DNG
TI
4.1.
T.
ED
U
.V
Gii thiu:
Trc ht chng ny gii thiu v trnh t thit k cc h thng vi x l chuyn dng, y l
ci nhn tng qut nht v cc bc thc hin mt h thng vi x l chuyn dng ng dng
trong thc t.
V t chc phn cng h thng vi x l cn ch n cc kha cnh la chn b vi x l,
la chn dung lng nh v loi vi mch nh, la chn cc vi mch vo ra thch hp v kh nng
pht trin ca h thng. Cng vic ny rt quan trng trong thc t, v nu la chn mt cu hnh
qu mnh so vi yu cu s tng gi thnh h thng, nu la chn cu hnh yu s khng p ng
c yu cu. V phn cng sinh vin cng cn c bit ch ti cc nguyn tc kt ni h thng
phn cng, kt ni gia CPU v cc vi mch nh, kt ni gia CPU v cc vi mch vo ra, m
bo sao cho h thng khng b xung t BUS d liu khi CPU thc hin cc chu k my truy xut
b nh v vo ra. V quan trng nht trong vic kt ni phn cng cho mt h thng vi x l l
vic gii m a ch cho cc vi mch nh v vi mch vo ra trong h thng.
V vic xy dng phn mm cho h thng vi x l, th cng vic quan trng trc tin l phi
bit chia nhim v cn thc hin ca h thng thnh cc nhim v nh, sau phi bit bin i
cc nhim v ny thnh cc gii thut lp trnh. Cn ch v cc cu trc gii thut lp trnh c
bn, nht l cc cu trc la chn v cc cu trc lp.
PE
.P
Cc h thng vi x l chuyn dng l cc h thng vi x l c thit k chuyn phc v

cho mt tnh nng k thut c th, hay iu khin hot ng cho mt my mc thit b c th no
. V c thit k chuyn dng nn chng c cc c im sau:
- C cu hnh phn cng n gin nht c th thc hin c nhim v yu cu.
- C tc x l cao.
- Thng thng khng s dng cc h iu hnh thng dng, m c chng trnh iu
khin ring.
thit k cc h thng vi x l chuyn dng cn thc hin cc bc sau:
Bc 1: Phn tch cc chc nng, nhim v ca h thng vi x l cn thit k
Chc nng, nhim v ca h thng tu thuc vo cc yu cu k thut m h thng phc v.
Ngi thit k cn xem xt phn tch k cc yu cu ny xc nh cc chc nng ca h thng
vi x l, cn xc nh r cc chc nng no c thc hin bng phn cng v cc chc nng no
c thc hin bng phn mm. Mt s chc nng phn cng khng th thay th bng phn mm
nh CPU, b nh cn c xc nh s lng, dung lng. Mt s chc nng s khc c th
c thay th bng phn mm, tuy nhin cn ch ti yu t tc , thng thng cc chc nng
thc hin bng phn cng s c tc thc hin cao hn.
Bc 2: Thc hin phn cng cho h thng
Sau khi c phn tch bc 1, bc 2 s thc hin mch phn cng c th cho h thng,
bc ny c th thc hin theo trnh t nh sau:
72
PE
.P
TI
T.
ED
U
.V
Xy dng s khi cho h thng vi mi chc nng c c trng bng mt khi. Xc

nh cc tn hiu vo ra cho cc khi chc nng .
- La chn cc linh kin s dng cho cc khi mch bao gm:
+ CPU: cn chn loi c tc , chc nng x l, ln Bus d liu ph hp.
+ B nh: xc nh cc loi chip nh vi dung lng v tc ph hp.
+ Vo ra: la chn cc b vo ra ph hp vi cc thit b giao tip vi h thng nh song
song, ni tip, ADC, DAC hay cc IC giao tip chyn dng khc. Xc nh c ch iu
khin cc thit b trong h thng l qut vng, ngt hay DMA ph hp vi cc yu
cu k thut ca h thng.
- Thit k s i kt ni chi tit cc linh kin phn cng h thng. Cn ch ti vic gii
m a ch cho cc IC nh v vo ra trnh xung t khi h thng hot ng.
- Thc hin mch phn cng ca h thng.
Bc 3: Thc hin phn mm cho h thng
Trong bc ny cn thc hin cc ni dung sau:
- Phn chia nhim v cn thc hin ca h thng thnh cc khi chc nng nh, cc chc
nng nh phc tp c th chia thnh cc khi chc nng nh hn na sao cho c th d
dng biu din bng ngn ng phn mm. Xc nh trnh t thc hin cc chc nng, chc
nng no cn thc hin trc, chc nng no cn thc hin sau, chc nng no cn c
u tin hn, ch r gii hn d liu vo ra cho cc chc nng lm c s cho vic thit k
gii thut.
- Thit k lu gii thut cho phn mm h thng, trc cn l gii thut chng trnh
chnh sau l gii thut cc chng trnh con hoc cc chng trnh ngt thc hin cc
khi chc nng nh.
- Vit chng trnh ngun bng mt ngn ng nht nh, thng thng cc chng trnh
ngun cho cc h thng chuyn dng c vit bng hp ng, do cc trnh hp dng kh
thng dng i vi tt c cc loi CPU trn th trng. Tuy nhin, cng ngy cng c
nhiu nh cung cp cc cng c thc hin phn mm cho cc CPU bng cc ngn ng cp
cao. Vi cc ngn ng cp cao, chng trnh s c thc hin nhanh chng hn nh cc
hm chun, tuy nhin n lun to ra chng trnh m my c kch thc ln hn v thc
hin chm hn so vi cc chng trnh ngun thc hin bng hp ng.
- Dch chng trnh ngun, sa li, v hiu chnh c chng trnh m my cung cp cho
h thng vi x l hot ng. Khi c cc cng c m phng c th chy m phng trc
hiu chnh chng trnh.
Bc 4: Np v chy th chng trnh trn h thng vi x l
Vi cc h thng thit k c h iu hnh, cc chng trnh iu khin hot ng ca h thng
c th cha trong cc b nh ngoi, h iu hnh s np cc chng trnh t b nh ngoi vo b
nh RAM thc hin. Cc h thng ny thng thng s dng my PC hoc c th thit k
s dng cc h iu hnh trn PC, cng c th c thc hin cc h iu hnh ring. H iu
hnh thng dng cho cc h thng chuyn dng hin nay l Linus, y l mt h iu hnh m
ngun m do c th s dng cc on cn thit cho h thng. thc hin c cc h thng
c h iu hnh, cn hiu r v cc chc nng ca chng, trong ni dung ca bi ging ny s
khng m t cc h thng nh vy.
Vi cc h thng khng c h iu hnh chng trnh cn c np vo cc b nh ROM
bng mt mch np giao tip vi my tnh. Qu trnh np, chy th v hiu chnh chng trnh c
th thc hin nhiu ln v mi ln hiu chnh li cn dch v np li. Khi khng c mt thit k
phn cng tt c th phi hiu chnh li c phn cng trong bc ny. Cng vic chy th v hiu
73

chnh h thng chim thi gian kh ln trong ton b qu trnh thit k h thng, do thc
hin cng vic ny mt cch nhanh chng cc tn hiu vo ra cn c gi lp, v d cc cng tc
cho cc ng vo, cc LED cho cc ng ra.
4.2. XY DNG PHN CNG CHO CC H THNG VI X L

CHUYN DNG
T.
ED
U
.V
4.2.1. La chn b vi x l
Vic la chn b vi x l da vo cc yu t sau:
- Tc x l ca h thng: i vi cc h thng thc hin nhiu chc nng hoc cc h
thng yu cu hot ng vi tc cao th tc ca CPU ng vi tr quan trng. Khi
cn tnh ton tc x l yu cu la chn CPU thch hp vi gi thnh thp nht.
- ln Bus d liu: ln Bus d liu ca CPU tu thuc vo cc thit b ngoi vi m h
thng cn s dng, ngoi ra ln Bus d liu ca CPU cng quyt nh ti tc hot
ng ca h thng.
- Cc cng c pht trin cho b vi x l: y l yu t ch yu tc ng ti thi gian
thc hin h thng. Khi c cc cng c h tr vic dch, g ri sa sai, m phng hot
ng, thi gian thc hin phn mm h thng s nhanh chng hn rt nhiu. C cc cc
CPU c c cc phn mm t ng to ra cc m lnh cho cc tnh nng thng dng. Trong
thc t cc CPU c cc cng c h tr mnh thng c la chn s dng nhiu hn.
- Ngoi ra yu t thng dng trn th trng cng cn phi xem xt n khi thit k h
thng vi x l.
PE
.P
TI
4.2.2. T chc khng gian nh thc v nh v cho cc b nh ROM, RAM

Trong cc h thng vi x l, b nh cha cc d liu v chng trnh bao gm b nh
chnh l cc loi b nh bn dn ROM v RAM v b nh ngoi nh a cng, a mm, th nh
c gi l cc b nh ngoi. Tuy nhin, cc b nh ngoi c c xem nh cc thit b
ngoi vi ca h thng, khi thit k b nh cho h thng vi x l, c ngha l la chn dung lng
v kt ni cc IC nh bn dn ROM v RAM vi CPU. Trong cc h thng vi x l chuyn dng,
b nh ROM thng cha cc chng trnh iu khin ton b hot ng ca h thng. Vi cc
h thng s dng h iu hnh, ROM s cha cc chng trnh iu khin cc chc nng c bn
ca h thng, h iu hnh v chng trnh iu khin hot ng h thng thng nm b nh
ngoi. B nh ROM cn c s dng cha cc d liu khng i trong chng trnh. B nh
RAM s dng cho vic lu tr cc bin ca cc chng trnh phn mm.
i vi cc h thng s dng dung lng nh nh, khng nht thit phi thit k ht dung
lng qun l ca CPU. Tuy nhin, mi loi CPU s quy nh c th a ch lnh u tin m
CPU thc hin (ngay sau khi cp ngun hoc Reset). V vy, b nh ROM phi c thit k nm
trong vng nh c a ch ny. Cc b nh RAM c th nm ti cc v tr bt k trn cc vng nh
cn li, nhng chng cn c xc nh r vng a ch khng s dng sai khi thc hin phn
mm.
Cc h thng k thut thng c xu hng ci tin v pht trin trong qu trnh s dng, do
khi thit k b nh, cn d phng cho vic tng thm dung lng nh ca h thng c d
dng trong tng lai.
74

Do CPU s dng mt Bus d liu duy nht lm vic vi tt c cc b nh v vo ra, v th
cc IC nh cn c gii m a ch sao cho ch c mt b nh c chn tng ng vi mt a
ch b nh m CPU cung cp.
D15 - D0
A23-A0
A23 - A0
D15 - D0
Kt ni BUS
h thng
80286
MRDC
MWTC
ED
U
.V
B nh
RD
WR
T.
Hnh 4.1: Cc tn hiu gia BUS h thng ca CPU v b nh.

D0
TI
A 23 - A 0
.P
23 - A 0
D 15 - D 0
Kt ni BUS
h thng
80286
PE
B nh
MRDC
RD
MWTC
WR
CS
Hnh 4.2: S kt ni vi mt b nh.
Cc tn hiu kt ni gia BUS h thng ca CPU ti cc b nh c th m t trn hnh 4.1.

Khi truy cp b nh, CPU cung cp a ch (A23 A0) xc nh v tr cn truy cp, cung cp
tn hiu MRDC hoc MWTC tng ng vi chu k c hoc ghi v truy cp d liu thng qua
BUS d liu D15 - D0. Vi h thng 80286 dung lng nh thc cc i c th qun l c s
l 224 = 16MB.
75
PE
.P
TI
T.
ED
U
.V
Khi mt chip nh chim ton b dung lng nh ca h thng khi s khng cn gii m
a ch b nh, b nh c th lun c chn (CS =0) nh hnh 4.2. Ton b dung lng nh t
a ch 000000H FFFFFFH.
Khi ch s dng mt chip nh nhng vi dung lng mt na (223 = 8MB), h thng cng
khng cn phi gii m a ch, b nh c th lun c chn (CS =0), BUS h thng cung cp
ti b nh cc a ch t A0 A22, ng A23 c th b trng. Khi h thng c gi l gii
m thiu cc a ch t 000000H ti 7FFFFFH, s trng vi cc a ch 800000H FFFFFFH,
mt nh s c hai a ch, v d a ch 000000H trng vi a ch 800000H.
Khi h thng s dng 2 chip nh 8MB, cc tn hiu A0 A22 c ni ti c hai chip nh,
khi A23 b trng v nu cc chip nh lun c chn, khi nu CPU cung cp mt a ch
truy cp b nh s c ng thi 2 nh trn 2 chip nh ng thi c truy cp, BUS d liu s
b xung t khi trng thi mt bit t 2 nh khc nhau. BUS d liu khng b xung t, vi
mt a ch CPU cung cp ch c mt trong hai b nh c php hot ng, vic ny c th thc
hin bng mt cng NOT nh trn hnh 4.3. i vi mi b nh a ch s c tnh t 000000H
7FFFFFH, cn i vi CPU cc a ch 000000H 7FFFFFH c A23 = 0 l ca b nh trn,
cn cc a 800000H FFFFFFH c A23 = 1 l ca b nh pha di. Vic s dng cc mch s
chn mt trong cc b nh ca h thng c gi l gii m a ch b nh. Khi h thng s
dng nhiu chip nh chng ta cng cn mt mch gii m cho php mt trong cc chip nh
hot ng ng vi mt a chi m CPU cung cp. Hnh 4.4 m t vic gii m a ch cho h
thng 80286 s dng dung lng nh 1MB vi 4 chip nh s dng IC gii m a ch 2 4.
Hnh 4.3: Kt ni 2 b nh 8MB vi h thng 80286.
76
PE
.P
TI
T.
ED
U
.V
Hnh 4.4: H thng 80286 vi 4 chip nh 256KB.
Ngoi ra trong cc h thng vi x l tng chip nh c th c b gii m ring bng cc cng

logic. Trn hnh 4.5, b nh EPROM 2716 s c chn khi A11 A19 = 1 v MRDC = 0. Cc
b nh khc cng h thng vi n s c trng thi cc ng i ch vo A11 A19 khc i. Cc
b nh RAM cn c ghi d liu s khng s dng ng iu khin MRDC.
77
ED
U
.V
T.
Hnh 4.5. Gii m a ch ring cho tng chip nh bng cng logic.
PE
.P
TI
4.2.3. Thit k cc ngoi vi theo yu cu

Thit b ngoi vi ng vai tr l cc thit b phc v vic giao tip gia ngi, hoc cc thit
b sn xut chp hnh s iu khin vi h thng vi x l. kim sot vic truyn d liu gia
CPU v cc thit b ngoi vi, trong h thng vi x l s dng cc vi mch vo ra. Tu theo cch
hot ng ca cc thit b ngoi vi cn phi s dng cc vi mch vo ra thch hp.
Theo kiu truyn d liu s c th phn bit hai loi v ra: song song v ni tip. Theo trng
thi vt l tn hiu ca thit b c: vo ra s v vo ra tng t. Theo nguyn tc iu khin ca
CPU, th ng hoc c giao thc c th phn bit hai loi vo ra: vo ra c bn v vo ra c lp
trnh.
Hu ht cc loi vi x l u c cc tn hiu phn bit gia vic truy cp b nh v truy cp
vo ra. V d, vi CPU 80286 tn hiu IO/M s dng cho chc nng ny. Khi IO/M = 0, 80286
thc hin cc chu k truy cp b nh, IO/M = 1 n thc hin cc chu k truy xut vo ra. Tn hiu
IO/M cng vi trng thi ca Tuy nhin khi kt ni phn cng tu theo tng ng dng c th s
dng vic gii m a ch cho b nh v vo ra mt cch ring r, hoc c th s dng chung. V
d, c th s dng chung vng a ch 16 MB ca 80286 va cho b nh va cho vic truy cp
vo ra, tuy nhin lc ny vic truyn d liu vi vo ra cng s s dng cc lnh truy cp b nh
nh MOV, XCHG m khng s dng cc lnh IN/OUT.
a ch cng
a ch cng
MRDC
MWTC
Chn cng ch c
Chn cng ch ghi
Hnh 4.6: Mch gii m a ch c bn cho cc cng vo ra.
78
A
B
C
A0
A1
A2
Y0
ED
A0
A1
A2
U
.V
Vic gii m a ch vo ra, cng tng t nh gii m a ch cho b nh. Nhng khc vi
cc b nh (thng thng c b nh ROM ch c, b nh RAM c th c ghi c, rt t khi c
b nh ch ghi), cn cc thit b vo ra th rt nhiu thit b ch c hoc ch ghi d liu. Nn
ngoi cc kiu gii m cho php va c va ghi d liu, c th s dng thm cc tn hiu MRDC
v WRTC gii m cho cc cng vo ra ch c hoc ch ghi, khi s tng thm khng gian
a ch cho cc thit b ngoi vi (v cng mt a ch c th s dng cho hai thit b, mt ch c
v mt ch ghi).
Cc b gii m vo ra chn mt a ch nht nh no trong h thng c th thc hin bng
cc cng logic c bn. Hnh 4.6 m t cc b gii m dng cng NAND. Trong hnh v, cng vo
ra s c chn khi tt c cc a ch cung cp ti cng NAND mc 1, c cc a ch khc c
th s dng thm cc cng NOT o trng thi cc tn hiu a ch thch hp trc khi a vo
NAND.
A
B
C
Y0
A3 A7
A3 A7
G2A
IO/M
G1
Y7
G2A
IO/M
G1
.P
Gii m ch c
PE
A2 A6
A0
A1
IORC
G2B
IOWC
TI
IORC
T.
G2B
Y7
Gii m ch ghi
A
B
C
Y0
G2B
IO/M
IOWC
A7
G2A
G1
Y7
Y0 Y3 ch c, Y4 Y7 ch ghi
Hnh 4.7: Gii m vo ra bng vi mch 74LS138
79
U
.V
Khi s dng nhiu cng vo ra vi a ch lin tip, c th s dng cc vi mch gii m nh

74LS138, 74LS154 . Hnh 4.7 m t mt s cch gii m khc nhau dng vi mch 74LS138.
Cc cng vo ra song song c bn c thc hin theo nguyn tc ca cc b m (buffer),
ci (latch) trn hnh 4.8. Vi cng m, khi tn hiu cho php OC trng thi khng tch cc
(mc 1), ng ra s trng thi tr khng cao, khi tn hiu cho php OC tch cc (mc 0), ng ra s
c mc logic ging ng vo. Cn i vi cc cng ci, khi tn hiu cho php G khng tch cc,
ng ra gi nguyn trng thi hin ti ca n, nu tn hiu cho php tch cc trng thi logic ng ra
s tng ng vi logic ng vo. Trong cc h thng vi x l, cc b m ci ny mt u s ni
ti Bus d liu ca CPU, u cn li ni ti thit b, ng vo cho php s c ni ti ng ra ca
gii m a ch. Khi truy cp d liu, CPU cung cp a ch tng ng lm ng vo cho php ca
cc cng ny tch cc, sau n s truyn d liu vi thit b qua cng. Gii m a ch m bo
cho ng vi mt gi tr a ch ca CPU cung cp, ch c mt cng vo ra duy nht c cho php
hot ng
D Q
Cng m 3 trng thi
ED
OC
Cng ci
T.
Hnh 4.8: Cc thnh phn to nn cc cng vo ra song song c bn.
.P
TI
Vi nguyn tc ca cc cng m ci nu trn, c rt nhiu mch tch hp mt va c

sn xut s dng lm cc cng vo ra c bn trong h thng vi x l. Thng thng cc vi mch
ny c 8 hoc 16 ng vo ra, hnh 4.9 m t cu trc ca cc vi mch m 74LS244 v ci
74LS373.
74LS244
D0
...
PE
...
Q0
D7
...
74LS373
D0
D Q
...
Q7
OC
Hnh 4.9: Cc vi mch vo ra c bn.
Q0
OC
Hnh 4.10 m t kt ni gia mt thit b vo bao gm 8 cng tc nhn vi h thng vi x l,

cc nt nhn s cung cp mc 0 khi c nhn v mc 1 nu khng nhn. Khi CPU thc hin
lnh OUT, tn hiu iu khin IORC s tch cc mc thp, nu lnh OUT cung cp a ch F000H,
ng ra cng NAND s c mc logic 0, 74LS245 s c cho php hot ng, vi tn hiu DIR = 0
trng thi cc nt nhn s chuiyn qua 74LS245 vo BUS d liu v a ti thanh ghi bn trong
CPU. kim tra c nt no c nhn khng c th thc hin on lnh sau:
MOV DX,0F000H
80

L1:
IN AL,DX
CMP AL,0FFH
JE L1
.
Nu khng c nt no nhn, thanh ghi AL s c gi tr bng 0FFH v lnh JE s quay li tip
tc nhn d liu v kim tra cho ti khi c phm c nhn.
U
.V
DIR
T.
IORC
IOWC
B0
B1
B2
B3
B4
B5
B6
B7
ED
80286
system
A0
A1
A2
A3
A4
74 LS245
A5
A6
A7
D7
D6
D5
D4
D3
D2
D1
D0
5V
A23
A22
:
A0
.P
TI
A A A A A A A A A A A A A A A A IORC
1111119876543210
543210
Hnh 4.10: Kt ni cc nt nhn vi h thng 80286
PE
Hnh 4.11 m t vic kt ni mt thit b ra c bn bao gm cc led k ni vo h thng

80286. Cc LED s c ni ti ng ra ca b ci bao gm 8 D Flip Flop, v s sng khi ng ra
Cc D Flip Flop trng thi 0. B ci s cho php truyn d liu t Data BUS ti ng ra khi
tn hiu SEL = 0, tn hiu ny l mt ng ra ca b gii m a ch vo ra. Nh vy, khi Cpu thc
hin mt lnh OUT cung cp ng a ch ca cng ci, cng ci s m d liu cung cp t
CPU chuyn ti LED. C th iu khin cc LED bng on lnh sau:
MOV AL,55H
MOV DX, Port
OUT DX,AL
Vi cc mch vo ra c bn, d liu truyn gia CPU v thit b ngoi vi hon ton th ng.
V d, khi CPU cp a ch c d liu t mt cng no , c th cng cha sn sng lm
vic, khi CPU s nhn c mt d liu sai m khng xc nh c. vic truyn d liu
vi cc thit b c m bo hn, trong cc h thng vi x l thng s dng cc b vo ra lp
trnh. Cc vi mch vo ra lp trnh cho php cung cp cc tn hiu bt tay gia mch vo ra v
81
ED
U
.V
thit b ni ghp vi n, khi cc b vo ra c th thng bo cc trng thi hot ng khc nhau

ca thit b cho CPU bit, v vi c ch ny d liu truyn gia CPU v thit b s c m bo.
4.3.
T.
Hnh 4.11: Kt ni cc LED n vi h thng vi x l
XY DNG PHN MM CHO H THNG VI X L
PE
.P
TI
4.3.1. Xy dng thut ton v lu gii thut cho h thng vi x l

thc hin mt cng vic c th mt cch nhanh chng v khoa hc, cn xy dng mt
thut ton thc hin cho n. Trong thc t, cc thut ton cho cc cng vic c th thc hin bng
cc t chc, con ngi, thit b my mc, cng c khc nhau. i vi cc h thng vi x l
chuyn dng cng vy, thc hin mt nhim v c th, cn phi xy dng mt thut ton tng
ng cho nhim v .
V d, cn thc hin mt h thng vi x l cho vic nhn dng thu bao ch gi, trong h
thng in thoi, th thut ton bao gm chc nng v c bn:
- Nhn s thu bao ch gi gi ti t tng i.
- Hin th s thu bao ch gi ti in thoi thu bao b gi.
hin th s thu bao gi ti (ch gi), trc ht cn ng k dch v ti bu in. Khi
ng k dch v, tng i s gi s thu bao ch gi theo ng dy thu bao ti my b gi gia
hai ln chung bng tn hiu c m ho FSK hoc DTMF. Nh vy, h thng nhn s s ch
hot ng sau khi mt hi chung , v s ngt trc khi c hi chung k tip.
Ngoi ra, khi h thng yu cu lu tr li ci s thu bao gi trc , h thng cn thm
cc chc nng lu tr v hin th li cc s gi.
Mi nhim v trong thut ton cn thc hin bng cc s thut ton ring, cc s thut
ton ny s c thc hin bng cc cu trc lp trnh c bn. Cc s thut ton cn c thc
hin sao cho n d dng chuyn qua ngn ng lp trnh. Vi cc nhim v phc tp, cn phi chia
nh thnh cc nhim v n gin hn, nu cc nhim v ny cn phc tp th cn chia thnh cc
nhim v n gin hn na, c cc lu thut ton n gin hn cho vic lp trnh.
82
PE
.P
TI
T.
ED
U
.V
Cc nhim v chnh c v thnh s gii thut chng trnh chnh, cc nhim v nh

c m t bng cc s gii thut ca cc chng trnh con. Chng trnh chnh s gi cc
chng trnh con, trong cc chng trnh con c th gi cc chng trnh con khc.
Cc cu trc lp trnh c bn
Cc khi chc nng thnh phn thng c thc hin bng cc cu trc lp trnh c bn.
Phng php chia chng trnh thnh cc khi chc nng thnh phn nh trn lm cho chng
trnh tr nn c cu trc, d dng trong vic hiu chnh, ci tin v lp ti liu lu tr cho nhiu
ngi s dng. C ba cu trc lp trnh c bn thng c s dng khi gii quyt cc cng vic
khc nhau l :
+ Cu trc tun t.
+ Cu trc la chn.
+ Cu trc lp.
c im chung ca tt c cc cu trc lp trnh c bn l tnh cu trc: tc l ch c mt li
vo v mt li ra cho cu trc . Cc cu trc ny thng c chun ho cc ngn ng cp
cao, trong phn ny s m t vic thc hin chng trong hp ng.
Cu trc tun t
Cu trc tun t l cu trc thng dng v n gin nht. Trong cu trc ny cc lnh c
thc hin mt cch tun t, lnh n k tip lnh kia. Sau khi thc hin xong lnh cui cng th
cng vic phi c hon tt.
V d on chng trnh tnh gi tr ca biu thc b2 4ac vi a, b, c l cc bin 8 bit nm
trong cc thanh ghi BH, BL, CH c th thc hin nh sau:
MOV AL,BL
MUL BL
; AL=AL*BL vi gi thit kt qu l 8 bit
MOV CL,AL
MOV AL,4
MUL BH
MUL CL
; AL=4ac vi gi thit kt qu l 8 bit
SUB CH,AL
Cu trc la chn
Cu trc IF THEN
Ng php:
IF iu kin THEN Cng vic.
Trong cu trc ny nu iu kin tho cng vic s c thc hin, nu khng cng vic s b b
qua. Trong hp ng cu trc ny c th thc hin bng cc lnh nhy c iu kin. Gii thut ca
cu trc biu din trn hnh 4.12.
Sai
iu kin
ng
Cng vic
Hnh 4.12: Gii thut cu trc IF THEN.
83

V d : Vit on chng trnh xo AH v 0 khi gi tr ca n ln hn 03
CMP AH,03
JNA THOAT
MOV AH,0
THOAT:
Sai
iu kin
ng
Cng vic 2
ED
Cng vic 1
U
.V
Cu trc IF THEN ELSE

Ng php: IF iu kin THEN Cng vic1 ELSE Cng vic 2.
Gii thut ca cu trc trnh by trn hnh 4.13 trong cu trc ny nu tha iu kin th cng
vic 1 c thc hin, nu khng th cng vic 2 c thc hin. Trong hp ng iu ny tng
ng vi vic s dng cc lnh nhy c iu kin v khng iu kin n cc nhn khc nhau.
Hnh 4.13: Gii thut cu trc IF THEN ELSE.
PE
.P
TI
T.
V d : Tm s nh hn trong hai s cha trong AH v BH gn cho AL.

CMP AH,BH ;AH<BH?
JNL GAN
; Nu ng gn AH cho AL
MOV AL,BH
; Nu khng ly s nh hn trong BH vo AH
JMP RA
GAN:MOV AL,AH
; AL s cha s nh hn.
RA:
Cu trc CASE
Ng php: CASE Biu thc
Gi tr 1: Cng vic 1
Gi tr 2: Cng vic 2
Gi tr N: Cng vic N
END CASE
Gii thut ca cu trc biu din trn hnh 4.14. Trong cu trc ny nu biu thc c gi tr 1
th cng vic 1 c thc hin, nu biu thc c gi tr 2, cng vic 2 c thc hin . Trong
hp ng c th s dng cc lnh nhy c iu kin v khng c iu kin chuyn iu khin
ca chng trnh ti cc nhn khc nhau.
V d : Xt gi tr ca AX thc hin cc cng vic khc nhau:
- Nu AX = 1 th CX := CX+7
- Nu AX = 2 th CX:= CX+DX
- Nu AX = 3 th CX:= CX-9
on chng trnh c thc hin nh sau:
CMP AX,01
JNE @
84
ADD CX,07
JMP RA
@: CMP AX,02
JNE @@
ADD CX,DX
JMP RA
@@: CMP AX,03
JNE RA
SUB CX,09
RA:
Cng vic 1
U
.V
Biu thc
Cng vic
Cng vic N
ED
Hnh 4.14: Gii thut cu trc CASE.
.P
TI
T.
Cu trc lp.
Cu trc FOR DO
Ng php: FOR S ln lp DO Cng vic.
Gii thut ca cu trc trnh by trn hnh 4.15. Trong cu trc ny cng vic s c thc
hin nhiu ln (bng s ln lp c khai bo). Trong hp ng cng vic ny c th dng lnh
LOOP, hoc cp lnh gim (DEC) v nhy khi cha bng 0.
V d : vit chng trnh tnh tng cc s t nhin t 1 ti 99.
MOV AX,0
;Khi ng tng bng 0
MOV DX,1
; S th nht
MOV CX,99
; Tt c bao gm 99 s
LAP: ADD AX,DX ; Tng := Tng + 1
INC DX
; Tng c s tip theo
LOOP LAP
; Lp cho ti khi ht 99 s.
PE
Khi ng b m
Cng vic
Gim b m
Sai
iu kin
ng
Hnh 4.15: Gii thut cu trc FOR DO.
Cu trc lp WHILE DO
Ng php: WHILE iu kin DO Cng vic.
85

Gii thut ca cu trc trnh by trn hnh 4.16. Trc ht iu kin s c kim tra, cng
vic s c lp li khi iu kin cn ng. Trong hp ng cu trc ny c th thc hin bng
cch s dng lnh CMP hoc mt lnh no kim tra iu kin, sau dng lnh nhy c
iu kin thot khi vng lp.
iu kin
ng
U
.V
Cng vic
Sai
Hnh 4.16: Gii thut cu trc WHILE - DO.
PE
.P
TI
T.
ED
V d: c v hin th cc k t nhp t bn phm cho n khi gp ESC th dng, m s k t

c c.
XOR CX,CX ; Xo s m
MOV AH,1
; Hm c k t t bn phm ca INT 21H c hin
TIEP:INT 21H ; gi ngt 21H AL cha m k t
CMP AL,27H ;Kim tra k t va hin c phi l ESC khng
JE RA
INC CX
; tng s m
JMP TIEP
RA:
Cu trc lp REPEAT UNTIL
Ng php: REPEAT cng vic UNTIL iu kin.
Gii thut ca cu trc trnh by trn hnh trn hnh 4.17. Trong cu trc ny cng vic c
thc hin trc t nht mt ln, sau iu kin s c kim tra. Nu iu kin tho cng vic
tip tc c lp li. Trong hp ng iu kin thng c kim tra bng lnh CMP, v cng vic
s c tip tc bng mt lnh nhy c iu kin.
V d : Xc nh xem c bao nhiu s t nhin bt u t 1 c tng nh hn 1000 ?
MOV AX,0
;khi ng tng bng 0
MOV DX,1
;khi ng s u tin cng
TIEP: ADD AX,DX ;cng c tng
INC DX
;tng c s tip theo v cng chnh l s m
CMP AX,1000 ; tng cn nh hn 1000 th cng tip
JB TIEP
RA:
Cng vic
ng
iu kin
Sai
Hnh 4.17: Gii thut cu trc REPEAT UNTIL.
86
U
.V
4.3.2. Vit chng trnh ngun bng Assembly cho h vi x l

Khi nhim v cn thc hin c m t bng cc s gii thut cho chng trnh chnh
v cc chng trnh con, chng c th chuyn thnh mt ngn ng lp trnh bt k. Tuy nhin, do
cc lnh hp ng ch thc hin cc tc v c bn, nn cc s gii thut cn c m t chi tit
hn, c cc cng vic ch cn thc hin bng mt lnh ngn ng cp cao, cng cn mt thut ton
trong hp ng.
Ging nh cc ngn ng khc, cc chng trnh hp ng cng cn tun theo cc quy nh ca
trnh dch hp ng. Ngoi cc lnh hp ng, ngi lp trnh cn phi hiu thm v cc lnh ch
dn trong hp ng. V lp trnh tt mt ngn ng no , ngi lp trnh cn phi c thi gian
thc nghim vi ngn ng . Hy bt u vi vic chy th cc chng trnh mu, sau thc
hin cc chng trnh t d n kh, v cui cng l thc hin cc cng vic c th.
4.4. DCH V NP CHNG TRNH VO ROM CHO H THNG

VI X L
PE
.P
TI
T.
ED
thc hin cc chng trnh trn cc h thng vi x l chuyn dng, trc ht cc chng
trnh cn c dch ra m my. Hin c rt nhiu phn mm h tr vic lp trnh cho cc h vi x
l khc nhau, mi loi cng c s c cc chng trnh h tr bin dch ring.
V d i vi cc h thng 80286 trc ht cn vit cc chng trnh hp ng bng mt phn
mm son tho vn bn loi Text nh Notepad. Cc chng trnh hp ng thng c ghi li
di dng .ASM.
Hnh 4.18: Qu trnh dch mt chng trnh hp ng.

Tip theo c th dng trnh bin dch MASM.EXE dch ra file m i tng bng cch chy
dng lnh sau di du nhc DOS.
MASM file.ASM
87
PE
.P
TI
T.
ED
U
.V
Nu chng trnh c li, cc thng bo li s hin trn mn hnh, sau khi cc li c sa c

th dch li chng trnh. Ch mt li khi lp trnh, c th to ra nhiu hng thng bo li khi
bin dch. V d khi vit sai mt nhn th ton b cc lnh nhy ti nhn ny u c thng bo li.
Cng c th xem cc thng bo li trong mt file vn bn .LST bng cch thm /l vo hng lnh
dch hp ng.
MASM file.ASM/l
Khi chng trnh ngun c sa ht li v bin dch s to ra file .OBJ, ngi lp trnh c
th to ra nhiu chng trnh ngun cho mt nhim v, sau dng chng trnh lin kt kt
ni thnh mt file m my duy nht. Chng trnh lin kt cho cc vi x l h Intel thng s
dng l LINK.EXE, c th dch mt file.OBJ bng dng lnh sau di du nhc DOS:
LINK file.OBJ
Qu trnh dch chng trnh hp ng c th m t trn hnh 4.18. Qu trnh lin kt c th kt
hp cc file i tng vi cc file dng th vin. Cc th vin c th to ra bng chng trnh
LIB t cc chng trnh .OBJ.
Khi mt chng trnh c dch ra m my, i vi cc chng trnh vit cho h Intel, nu
chng vit tng thch vi phn cng my tnh, chng c th thc hin di mt h iu hnh.
i vi cc chng trnh c vit cho cc h thng c phn cng c thit k ring, hoc c
cho cc h vi x l khng tng thch vi my tnh, kim tra li chng trnh c th chy
chng trn cc phn mm m phng.
thc hin cc chng trnh m my trn cc h thng vi x l thit k chuyn dng, cn
np chng vo b nh ca h thng. C th thc hin sn cc chng trnh truyn d liu gia
my tnh v cc h thng vi x l vi x l chuyn dng, mt chng trnh nm trn my tnh, mt
chng trnh nm trong ROM ca h thng vi x l, cc chng trnh ny s truyn chng trnh
m my t my tnh xung b nh Ram ca h thng vi x l chuyn dng, sau iu khin s
c chuyn ti chng trnh ny thc hin. Tuy nhin cc h thng nh trn thng thng ch
chy th nghim cc chng trnh trn phn cng, do cc chng trnh trn Ram s b mt khi
mt ngun cung cp.
Hnh 4.19: Qu trnh bin dch cc file th vin.

Cc h thng chuyn dng ph bin hn thng c chng trnh ghi cc chng trnh m my
nhn t my tnh vo cc b nh EEROM ca chng. Cc b iu khin lp trnh trong cng
nghip PLC (Programmable Logic Control) l cc h thng vi x l nh th.
88
cc h thng n gin hn, khng c chng trnh truyn nhn d liu vi my tnh, np
cc chng trnh m my vo b nh h thng, cn phi c mt b np chng trnh vo ROM
giao tip vi my tnh. Cc b np ny thng thng giao tip vi my tnh qua cc cng COM,
LPT, USB hoc cc khe cm trn my tnh. Cc b np ny cng cn c cc chng trnh vit
ring chy trn my tnh.
np cc chng trnh vo ROM, trc ht cn xo ht cc d liu trong n. i vi cc
loi ROM in, cc d liu c c th xo trc tip trn b np bng lnh t phn mm chy trn
my tnh. Cn i vi cc b nh EPROM, cn xo cc d liu c trong chng bng n tia cc
tm.
PE
.P
TI
T.
ED
U
.V
Tm tt ni dung chng:
thit k cc h thng vi x l chuyn dng cn tin hnh theo bn bc chnh l:
- Bc 1: Phn tch cc chc nng nhim v ca h thng: Trong bc ny cn phn tch
nhim v yu cu thnh cc chc nng chnh ca h thng, sau xc nh chc nng no
c thc hin bng phn cng, chc nng no s c thc hin bng phn mm.
- Bc 2: Xy dng phn cng h thng vi x l: Trong bc ny trc cn la chn cc
thnh phn ca h thng phn cng nh: CPU, b nh v vo ra. Vic la chn CPU c th
da vo cc yu t chnh nh: tc x l, hiu qu thc hin nhim v, gi thnh h thng,
cc cng c phn mm h tr v ngun cung cp tin cy trn th trng. V b nh cn la
chn dung lng cho cc loi b nh ROM v RAM, theo dung lng yu cu cho chng
trnh v d liu khai bo trong chng trnh. V ngoi vi, trc ht cn xc nh tnh nng
ca cc ngoi vi yu cu nh: ni tip, song song, ADC, DAC hay cc vi mch c bit khc,
theo yu cu ca nhim v cn thc hin. Sau cn xc nh s lng cho mi loi ngoi vi
.
Kt ni h thng phn cng vi x l bao gm vic kt ni b nh v kt ni ngoi vi. V kt
ni gia CPU v b nh, trc ht kt ni BUS d liu v cc tn hiu yu cu c ghi b nh
(MRDC, MWTC) t CPU ti tt c cc vi mch nh. Nu BUS d liu ca CPU ln hn BUS
d liu ca b nh, th cn nhiu vi mch nh kt ni ht BUS d liu. Tip theo s kt ni
cc ng a ch thp t CPU ti mi b nh. Cui cng s dng cc ng a ch cao cung
cp ti b gii m a ch, v mt ng ra ca b gii m a ch s s dng cho php chn
mch cho mt vi mch nh. V kt ni gia CPU v vo ra cng tng t nh i vi b nh,
tuy nhin cc vo ra c bn c th khng c cc ng nhn yu cu c ghi, khi n ch
truyn d liu theo mt chiu, c th khng c hoc rt t ng vo a ch.
V thit k phn mm chng ta phi bin i nhim v yu cu thnh cc cu trc lp trnh c
bn, sau da vo cc cu trc lp trnh thit k thc hin chng trnh cho h thng. Cc
cu trc lp trnh c bn bao gm cu trc tun t v cu trc iu khin. Cc cu trc iu
khin bao gm cu trc lp v cu trc la chn.
Cc cu trc la chn gm: IF . THEN ; IF THEN ELSE.; CASE.
Cc cu trc lp bao gm: FOR; WHILE, REPAET.
89

BI TP:
1. Thc hin kt ni h thng 80286 vi cc dung lng nh sau:
EPROM (4M)
EPROM (4M)
SRAM (8M)
SRAM (4M)
EPROM (4M)
SRAM (8M)
SRAM (4M)
EPROM (4M)
EPROM (4M)
SRAM (2M)
SRAM (2M)
SRAM (2M)
SRAM (4M)
SRAM (4M)
SRAM (2M)
EPROM (8M)
EPROM (8M)
EPROM (4M)
SRAM (4M)
U
.V
SRAM (2M)
SRAM (4M)
EPROM (2M)
T.
ED
Cho bit vng a ch ca tng b nh trong cc bn (cc b nh u c 16 bit d liu).

Bi 2: Thit k h thng vi x l vi cc b vo ra c bn (s dng cc vi mch m, ci) iu
khin 8 phm nhn v 8 led n vi s khi nh hnh B5.3a. Bit rng cc phm vi
mch in nh hnh B5.3b khi nhn s cung cp mc 0, khi khng nhn cung cp mc 1.
Cc led n s sng khi cung cp mc 1. Hy vit chng trnh khi ngi s dng nhn
mt phm s tng ng vi mt kiu sng tt khc nhau ca cc LED n.
H thng vi x l
s dng CPU
8088
8 LED
n
S1
Ti cng
vo
.P
TI
8 phm
nhn
Vcc
PE
Hnh B5.3: H thng cho yu cu thit k bi 2.

Bi 3: Thit k phn cng h thng vi x l cho nhim v bo trm trong mt to nh vi: ng
vo l 16 cng tc t ti cc ca nh, khi mt ca b m s c mt n LED tng ng
sng thng bo v bt c ca no m ci bo ng s c ng. Ngoi ra h thng yu
cu mt cng tc tt bo ng khi cn.
Bi 4: Xy dng cc lu gii thut phn mm cho h thng trong bi 3.
Bi 5: Vit chng trnh phn mm cho h thng bi 3.
Bi 6: Tm hiu v s khi phn cng v xy dng s gii thut phn mm cho h thng
tnh cc in thoi t ng.
Bi 7: Thit k h thng phn cng vi x l thc hin vic gim st v ng m n qut cho mt
to nh bao gm 5 phng (mi phng c 8 n v 8 qut). Khi mt thit b chy s c mt
n LED tng ng sng. Ngi s dng c th tt m bt k mt thit b no t trung tm
hoc ng m in cho tng phng.
Bi 8: Xy dng gii thut phn mm cho h thng trong bi 7.
Bi 9: Vit chng trnh phn mm cho h thng bi 7.
90

Bi 10: Cho s mch iu khin ng c DC nh hnh B5.10. Bit rng, khi cp ti ng vo
(Vin) ca mch, in p bng Vcc th hai u ng c c in p bng 0 (ng c
khng quay), khi Vin > Vcc Q2 v Q3 dn ng c quay theo chiu thun, khi Vin <
Vcc Q1 v Q4 dn ng c quay theo chiu ngc. Khi in p cng khc xa gi tr
Vcc, cc transistor dn cng mnh, ng c quay cng nhanh.
VCC
VCC
VCC
11
6
5
R4
U
.V
R7
MOTOR DC
4
R6
Vin
R3
R8
Q2
11
Q1
R5
R2 VCC
VCC
Q3
Q4
ED
R1
Hnh B5.10: S iu khin ng c DC cho bi 10.
PE
.P
TI
T.
Thit k s khi h thng cung cp in p DC cho mch ng c khi ng vi tc

tng dn theo chiu thun cho ti tc nhanh nht khi nhn nt Start, v s gim dn tc cho
ti khi dng hn khi nhn nt Stop.
Bi 11: Thit k s khi mt h thng vi x l iu khin mt l nhit. Vit chng trnh iu
khin nhit trong l theo qui trnh sau:
- Duy tr nhit 50oC trong thi gian 30 pht.
- Tt l.
Bi 12: Thc hin s khi mt h thng vi x l o lng in p AC trong di 0 220V, vi
cc d liu o hin th ln cc LED 7 on. Vit chng trnh c d liu t ADC, tnh
ton chuyn i ra m hin th tng ng cung cp cho cc LED.
Bi 13: Thit k mt h thng vi x l iu khin ng c bc c cc thng s k thut: 12V/2A
mi bc 1o. Bit rng, ng c c 4 dy cp in theo xung, n quay theo chiu kim
ng h cn cung cp d liu vo 4 u dy theo d liu trong bng sau:
Dy 1
Dy2
Dy3
Dy4
Hexa
1
0
0
1
09
0
1
0
1
05
0
1
1
0
06
1
1
0
0
0A
Khi mun ng c quay ngc chiu kim ng h c th xut d liu vi chiu ngc li ca
bng trn. Hy vit chng trnh iu khin ng c quay 1 vng theo chiu kim ng h v 90o
theo chiu ngc li.
Bi 14: Thit k mt h thng vi x l iu khin 4 LED ma trn 8 hng 5 ct hin th cc ch
ABCD tri theo chiu t phi qua tri v ngc li.
91
Chng 5: Cc vi mch h tr trong h thng vi x l
CHNG V: CC MCH TCH HP H TR TRONG H

THNG VI X L
VO RA SONG SONG LP TRNH 8255
TI
5.1.
T.
ED
U
.V
Gii thiu:
Ni dng chng ny gii thiu v cc IC vo ra song song v ni tip c th lp trnh c.
Trc ht cn ch ti khi nim IC lp trnh, khi c cung cp cc t iu khin khc nhau,
chng s c cc ch hot ng khc nhau.
V vi mch vo ra song song lp trnh 8255, mun s dng c cn phi nm c cch kt
ni n vi CPU trong h thng vi x l, tip theo cn tm hiu v cch lp trnh cho n, v cc
dng t iu khin c th s dng. Cui cng cn tm hiu v cc ch hot ng ca 8255 v
vic ng dng cc ch ny trong thc t nh th no.
V vi mch vo ra ni tip 8251, cng ging nh 8255 u tin cn tm hiu cc ghp ni n
trong h thng vi x l, vi vi mch ny cn c bit ch ti cch lp trnh cho n s phc tp
hn so vi 8255. Trong cc ch truyn nhn d liu cn quan tm ti cc gii thut kim tra
sn sng, kim tra li trc khi nhn d liu hoc ghi d liu ti truyn ni tip ra bn ngoi.
Trong cc vi mch vo ra lp trnh, cn ch ti cc tn hiu iu khin bt tay gia b vo ra
v thit b ngoi vi, chn chn mt d liu c truyn nhn xong trc khi thc hin vic
truyn nhn mt d liu khc. hiu c tc ng ca cc tn hiu bt tay ny c th xem xt
cc gin thi gian hot ng ca tng ch .
PE
.P
5.1.1. Cu trc ca b vo ra lp trnh 8255

Vi mch 8255 c gi l mch ni ghp vo ra lp trnh c (programmable peripheral
interface PPI) c s khi biu din trn hnh 5.1.
Hnh 5.1: S khi b vo ra lp trnh 8255
92
RD\
X
0
1
0
1
0
1
1
0
WR\
X
1
0
1
0
1
0
0
1
Ch hot ng
Khng chn mch
c PA
Ghi PA
c PB
Ghi PB
c PC
Ghi PC
Ghi t iu khin
Cm
U
.V
A1
X
0
0
1
1
0
0
1
1
ED
A0
X
0
0
0
0
1
1
1
1
T.
CS\
1
0
0
0
0
0
0
0
0
8255 c ba cng vo ra song song PA, PB v PC c chia thnh hai nhm 1 v 2 iu

khin. Cc cng PA v PB c m ci c ng vo v ng ra, cn cng PC m ci ng ra, ng vo
ch c m. Cc cng c cc ch hot ng khc nhau ph thuc vo s iu khin ca cc b
iu khin nhm 1 v 2. B m Bus d liu tng thch mc logic gia CPU v thit b, ng
thi ng vai tr kim sot vic truyn d liu gia cc cng vo ra v CPU. Khi logic iu
khin, c ghi cung cp tn hiu chn cng v chn chiu truyn d liu, tng ng theo trng
thi ca cc tn hiu iu khin ng vo nh m t trong bng sau:
PE
.P
TI
5.1.2. Cc ch lm vic ca 8255

Tu theo trng thi thit lp ch trong thanh ghi iu khin, 8255 s c 3 ch lm vic:
- Ch 0: vo ra d liu c bn, cc cng ging nh cc b m ci thng thng c chn
theo trng thi ca cc ng vo a ch A0 v A1. Ty theo vic lp trnh t iu khin, cc
cng ny hoc ch vo, hoc ch ra.
- Ch 1: l ch truyn d liu mt chiu c bt tay, ch ny ch s dng cho cc cng
PA v PB cng PC s dng cho cc tn hiu bt tay.
- Ch 2: l ch truyn d liu hai chiu c bt tay, ch ny ch s dng cho PA, PC
ng vai tr l tn hiu bt tay, PB lc ny c th hot ng trong ch 0 hoc 1.
Ch 0:
Hnh 5.2: Gin thi gian c d liu trong ch 0 ca 8255.
93
ED
U
.V
Trong ch 0 cc cng PA, PB v PC c c ghi t CPU bng cc tc ng cc tn hiu

iu khin mt cch tng ng. Hnh 5.2 m t gin thi gian c cc cng trong ch 0: Tn
hiu CS\ c cp mc 0 cho php 8255 hot ng, A1 A0 cung cp trng thi thch hp chn
cng c, khi RD\ c cp mc 0 d liu t cng c chn s chuyn vo bus d liu (D7
D0).
Hnh 5.3 m t gin thi gian ghi cc cng ca 8255: Chu k ghi tng t nh chu k c,
CS\=0 chn chip, A1 A0 chn cng, d liu cung cp ti bus v WR\=0 ghi d liu ti cng.
Hnh 5.3: Gin thi gian ghi d liu ti cc cng ca 8255
PE
.P
TI
T.
Ch 1:
Trong ch 0, d liu c truyn gi 8255 v thit b mt cch th ng. V d khi CPU
ghi d liu ti 1 cng, thit b ni vi cng c nhn c d liu hay khng, CPU cng khng
bit. Trong ch 1, ngoi d liu truyn nhn gia cc cng vi thit b cn c thm cc tn hiu
bt tay chc chn rng d liu c truyn nhn.
Hnh 5.4 m t tc ng ca cc tn hiu bt tay ca mt cng truyn d liu. Cc tn hiu bt
tay cho cng truyn bao gm:
- OBF (Output Buffer Full): l tn hin ng ra tc ng mc thp thng bo b m ng ra y.
Tn hiu ny s tch cc khi CPU ghi ti cng truyn 1 byte d liu, v bn nhn cha ly d
liu ny i. CPU tc ng tn hiu WR\ ghi d liu ti cng, cnh ln ca tn hiu WR\ (ghi
xong d liu) s tc ng OBF = 0. V ng vo ACK = 0 gi ti t bn nhn d liu, thng
bo d liu c ly, s lm OBF\ tr v mc 1. Tn hiu ny s c ni ti STB ca
cng nhn, cht d liu vo cng nhn.
- ACK (acknowledge): l tn hiu ng vo tc ng mc thp s dng cho vic nhn tn hiu tr
li t cng nhn, thng bo cng truyn bit cng nhn ly xong d liu, lc ny cng
truyn c th truyn tip mt d liu khc.
- INTR (interrupt): l tn hiu ra tc ng mc cao thng bo mt byte CPU ghi ti cng truyn
c truyn xong ti thit b. Tn hiu ny c th s dng yu cu ngt CPU thc hin
vic ghi ti mt d liu khc. Mc thp t WR\ m CPU gi ti s xo INTR v 0, v khi
OBF\ v ACK\=1 (INTE c lp) tn hiu ny s tip tc c tc ng.
- INTE (Interrupt Enable): l c cho php ngt truyn bn trong 8255, n c th lp xo bng
bit PC5 cho cng A v PC6 cho cng B (khi truyn). Khi INTE b xo, yu cu s khng c
gi ti CPU khi 8255 truyn xong mt d liu.
94
U
.V
Hnh 5.4: Gin thi gian cng truyn d liu 8255 ch 1.
PE
.P
TI
T.
ED
Hnh 5.5 m t tc ng ca cc tn hiu cng nhn d liu ca 8255 trong ch 1. Cc tn

hiu cho cng nhn bao gm:
- STB (Strobe): l ng vo, khi ng vo ny tc ng d liu trn cc ng ni ti cng nhn
s c cht vo b m ng vo . Tn hiu ny c cp t OBF ca cng truyn.
- IBF (Input Buffer Full): l tn hiu ng ra tc ng mc cao thng bo d liu c cht
vo b m nhn, mc thp t STB\ s a IBF ln mc cao v khi CPU c xong d liu
nhn (cnh ln ca RD\) s xo tn hiu ny v 0. IBF s dng ni ti ACK\ ca cng
truyn thng bo d liu c nhn xong.
Hnh 5.5: Gin thi gian cc tn hiu cho cng nhn d liu ca 8255 trong ch 1
INTR (Interrupt Request): l tn hiu yu cu ngt, thng bo cho CPU bit c mt d liu
sn sng CPU c. Tn hiu ny s c lp ln 1 khi STB\ v IBF ng thi bng 1 (INTE
bng 1), v c xo khi CPU thc hin mt chu k c ko tn hiu RD ca n xung
mc thp.
INTE (Interrupt Enable):c cho php ngt trong 8255 c lp xo thng qua vic lp xo bit
PC4.
95
U
.V
ED
Hnh 5.6: Cc tn hiu truyn nhn trn cc cng ca 8255 trong ch 1.
T.
Hnh 5.6 trnh by chi tit cc tn hiu bt tay cho cc cng PA v PB cc ch truyn v
nhn d liu trong ch 1. Hnh 5.7 m t mt v d kt ni truyn nhn d liu gia hai cng
8255 ch 1, trong 8255 bn tri c cng A truyn, cng B nhn, ngc li 8255 bn phi
c cng A nhn, cng B truyn d liu.
D0 D7
.P
TI
PA0 PA7
INTE
PC7 OBFA
ACKA
PC6
WR
PE
INTA
INTB
STBA
IBFA
PA0 PA7
INTE
PC4
RD
PC5
PC3
INTE
PC3
PC2
PC1
STBB
IBFB
OBFB
ACKB
PC1
INTA
INTE
PC2
PC0
RD PB0 PB7
D0 D7
PC0
INTB
PB0 PB7
Hnh 5.7: Kt ni truyn d liu bng 8255 ch 1.

Qu trnh truyn nhn trong ch 1 c thc hin nh sau: trc ht khi cng truyn cn
trng, OBF\=1, ACK\ = IBF ca bn nhn bng 1, nu INTE c lp trc bng 2, 8255 truyn
s yu cu CPU ghi mt d liu ti cho n bng tn hiu yu cu ngt INTR=1. Khi CPU ghi d
96
U
.V
liu (mt xung mc thp cung cp ti ng vo WR\ ca 8255), ng ra OBF\ ca cng truyn c
ko xung mc thp a ti ng vo STB ci d liu vo cng nhn. Khi nhn c d liu,
cng nhn thng bo tr li cho cng truyn bng tn hiu IBF mc cao a ti ng vo ACK\, v
ng thi yu cu CPU iu khin nhn c d liu bng tn hiu INTR mc cao. Khi CPU cha
c, b nhn vn duy tr IBF = ACK\ = 1, do OBF ca b truyn vn tc ng. CPU c d
liu ko RD ca 8255 xung mc thp xa tn hiu yu cu ngt, ng thi IBF tr v mc 0 bn
truyn s dng tc ng tn hiu OBF v yu cu ngt CPU ghi ti mt d liu mi.
Ch 2:
Trong ch 2, cng A c s dng truyn d liu theo c hai chiu km theo cc tn
hiu bt tay. Cc tn hiu bt tay trong ch 2 cng tng t nh ch 1, gin thi gian tc
ng cc tn hiu c m t trn hnh 5.8. V tr cc tn hiu trn chip trn hnh 5.9.
WR
OBF
INTR
ED
ACK
STB
IBF
T.
Data
RD
PE
.P
TI
Hnh 5.8: nh thi tn hiu bt tay trong ch 2.
Hnh 5.9: Cc tn hiu s dng cho vic truyn d liu trong ch 2 ca 8255
97

Kt ni cho vic truyn nhn d liu gia hai h thng s dng vo ra song song 8255 ch
2 c m t trn hnh 5.10. Cc tn hiu bt tay cho ch ny c ngha tng t nh trong
ch 1, ring tn hiu yu cu ngt INTR s dng chung c hai chiu truyn v nhn.
D0 D7
PA0 PA7
INTE
A
WR
PC7 OBFA
PC6
D0 D7
PA0 PA7
ACKA
STBA PC4
IBFA
RD
PC5
RD
INTE
INTEB
PC2
IBFB
OBFB
ACKB
INTEA
PC1
PC2
INTA
PC3
INTA
TI
PC3
T.
ED
PC1
STBB
U
.V
WR
Hnh 5.10: Kt ni truyn d liu bng 8255 ch 2.
PE
.P
5.1.3. Kt ni 8255 vi h thng vi x l
Hnh 5.11: Kt ni 8255 trong h thng vi x l.
98
U
.V
Cc tn hiu kt ni gia 8255 v h thng vi x l 80286 m t trn hnh 5.11. Bus d liu
D0-D7 c ni ti Bus d liu ca h thng. RD\ v WR\ ca 8255ni ti IORC\ v IOWC\
xc nh chiu truyn d liu. A0, A1 c th ni ti 2 ng a ch bt k ca h thng CPU
chn cng ca 8255. RESET ni ti RESET ca h thng 8255 c khi ng li cng vi
CPU. CS\ c ni ti b gii m a ch vi k ni trn hnh v, 8255 c php lm vic khi
CS\ ca n mc 0 tng ng vi A4A3A7= 001 chn ng ra Y1, A6 = 1, A5=0 v A0 = 0 cho
php 74LS138 gii m a ch.
Kt hp vi a ch chn cng A2A1 cp ti A1A0 ca 8255 cc cng s c a ch nh sau:
- Cng A: A7 A6 A5 A4 A3 A2 A1 A0 = 11000 00 0 = C0H.
- Cng B: A7 A6 A5 A4 A3 A2 A1 A0 = 11000 01 0 = C2H.
- Cng C: A7 A6 A5 A4 A3 A2 A1 A0 = 11000 10 0 = C4H.
- Cng K: A7 A6 A5 A4 A3 A2 A1 A0 = 11000 11 0 = C6H.
PE
.P
TI
T.
ED
5.1.4. Lp trnh khi to ch lm vic cho 8255

Cc cng ca 8255 ch c th truy cp c khi n c lp trnh trc, vic lp trnh cho
8255 c thc hin bng cch ghi t iu khin ti a ch cng iu khin ca n. 8255 c hai
dng t iu khin l t iu khin lp xo bit cng C v t iu khin ch , hai loi t iu
khin ny c xc nh bng trng thi bit D7 ca chng.
T iu khin lp xo bit cng C biu din trn hnh 5.12, bit D7 cho t iu khin ny lun
bng 0, cc bit D6 D5 D4 c th mang gi tr bt k, cc bit D3 D2 D1 = C2 C1 C0 m ho v tr bit
cng C c lp xo, bit D0 = S/R (Set/Reset) xc nh vic lp hoc xo bit. V d, mun lp bit
PC2 ca cng C ln 1 c th ghi d liu 00000101 ti a ch ca cng iu khin.
V d 5.1:
Gi s 8255 c kt ni vi h thng vi x l 80286 nh trn hnh 5.11. Lp trnh 8255 thc
hin cc cng vic sau:
A) Lp PC2 ln mc cao.
B) To sng vung c 66% chu k nhin v trn PC6.
Gii
A)
MOV AL,00000101B
OUT 0C6H,AL
B)
AGAIN: MOV AL,0xxx1101B
OUT 0C6H,AL
CALL DELAY
CALL DELAY
MOV AL,0xxx1100B
OUT 0C6H,AL
CALL DELAY
JMP AGAIN
99
U
.V
Hnh 5.12: T iu khin lp xo bit cng C ca 8255.
ED
T iu khin chn ch cho 8255 biu din trn hnh 5.13: bit D7 ca n lun bng 1, D6
D5 = MA1 MA0 chn ch cho nhm 1 bao gm PA v phn cao PC (00: ch 0; 01: ch 1;
1x: ch 2), D4 = A s dng chn chiu truyn d liu cho PA (1: vo; 0: ra), D3 = CH chn
chiu truyn d liu cho PC phn cao, D2 = MB chn ch cho nhm 2 gm cng PB v PC
phn thp (0: ch 0; 1: ch 1), D1 = B chn chiu truyn cho PB v D0 = CL chn chiu
truyn cho PC phn thp.
PE
.P
TI
T.
Hnh 5.13: T iu khin chn ch ca 8255.
V d 5.2: B iu khin 8255 c kt ni vi h thng 80286 nh hnh 5.14.

- Xc nh a ch cc cng 8255.
- Tm t iu khin 8255 PA l ng vo, PB v PC l ng ra.
- Lp trnh ly d liu t PA v a ra PB v PC.
100
Hnh 5.14: Kt ni 8255 cho v d 5.2.
010100
010100
010100
010100
0
0
1
1
0
1
0
1
a ch
Hex
50H
51H
52H
53H
Cng
PA
PB
PC
K
T iu khin cho cu hnh yu cu s l: 1001 0000B = 90H

on lnh ly d liu cng A gi ra cng B v C nh sau:
MOV AL,90H
OUT 53H,AL
IN AL,50H
OUT 51H,AL
OUT 52H,AL
GIAO TIP NI TIP 8251
.P
5.2.
TI
T.
A1 A0
U
.V
CS\
ED
Gii:
a ch ca cc cng nh sau:
PE
5.2.1. Ch truyn tin ni tip ng b v cn ng b

Nh gii thiu, mi hot ng truyn d liu ca CPU vi th gii bn ngoi thng qua
Bus d liu bao gm nhiu ng dy dn in, c gi l truyn d liu song song. Khi truyn
d liu ti cc thit b xa, th vic truyn bng nhiu ng dy nh vy s khng kinh t, mt
khc tn hiu truyn c tin cy km do chu nhiu bn ngoi v nhiu ln nhau. T cc i hi
trn xut hin phng php truyn d liu ni tip, trong phng php ny, u pht, d liu
song song s c chuyn thnh chui bit ni tip, truyn i trn mt ng dy ti bn thu.
u thu, d liu ni tip s c bin i ngc li thnh dng song song cung cp cho h
thng vi x l. Hnh 5.15 m t kt ni ca cc kiu truyn d liu ni tip trong cc h thng vi
x l.
Vic truyn nhn d liu ni tip c th thc hin bng thanh ghi dch nh m t trn hnh
5.16 khi bn truyn s ni ti bn nhn 2 ng, mt cho d liu v mt cho xung clock
truyn. Trn hnh v ti mi cnh xung ca xung clock, b truyn s dch ra ng d liu 1
bit (0 hoc 1), tng ng nh vy, ti mi cnh xung xung clock nhn c b nhn s ly
vo trng thi cho mt bit. Phng php ny vic truyn nhn d liu c thc hin kh n
gin, tuy nhin nu ch sai 1 clock th ton b d liu truyn s b sai. vic truyn nhn d
101
liu ni tip thc hin tt hn, trong h thng vi x l ngi ta thng thc hin cc khung
truyn d liu ng b v cn ng b.
Bn song cng
(Half Duplex)
B truyn
(Transmitter)
B nhn
(Receiver)
B truyn
(Transmitter)
B nhn
(Receiver)
n cng
(Simplex)
B truyn
(Transmitter)
Song cng
(Duplex)
ED
B nhn
(Receiver)
B truyn
(Transmitter)
U
.V
B nhn
(Receiver)
B nhn
(Receiver)
B truyn
(Transmitter)
.P
TI
T.
Hnh 5.15: Cc kiu kt ni truyn d liu ni tip trong h thng vi x l
Hnh 5.16: Truyn d liu ni tip theo nguyn tc thanh ghi dch
PE
5.2.1.1. Truyn nhn ni tip cn ng b

Ch truyn cn ng b
Trong ch ny, khi c mt k t gi ti t CPU, b truyn ni tip s t ng cng thm
mt Start bit mc thp, sau l cc bit d liu (bit c trng s thp nht trc tin), tip theo s
l bit chn l (nu c lp trnh), v cui cng l cc bit Stop (c th c 1; 1,5 hoc 2 bit stop).
Sau cc bit trn s c dch ti ng ra thnh mt chui bit ni tip, chui d liu c dch ra
mi cnh ln ca xung clock cung cp cho b truyn. Nu c php, cc k t ngng truyn
(thng l cc bit 0 lin tc) s c truyn tip ti ng ra, nu khng c yu cu truyn mt d
liu mi. Khi khng lp trnh cho php k t ngt, khi ht d liu truyn, ng ra s c gi
mc cao. Hnh 5.17 m t khung truyn d liu trong ch truyn cn ng b:
Ch nhn cn ng b
ng nhn bnh thng trng thi cao, khi xut hin mt cnh xung trn ng ny l
bt u Start bit ca mt k t mi, gi tr Start bit s c kim tra li mt ln na vo thi
im gia ca n. Khi kim tra li nu vn tm thy mc thp th Start bit c coi l hp l, v
b m bit d liu bt u hot ng. B m s tng gi tr ca n ti thi im gia ca cc bit
102

d liu (k c bit chn l v bit stop nu c). Nu c li chn l th c bo li chn l s c
thit lp. D liu v bit chn l s c ly mu ti chn vo ti mi cnh ln ca tn hiu
clock cung cp cho b nhn. Nu mc thp xut hin ti v tr Stop bit th c bo li sai khung s
c thit lp, li sai khung c th xy ra do nhiu, hoc do vic lp trnh giao thc khung gia
bn truyn v bn nhn khc nhau. V d bn truyn lp trnh truyn cc k t c chiu di 5 bit,
m bn nhn lp trnh cc k t c chiu di 8 bit th s xy ra li sai khung. Bit Stop s thng
bo nhn xong mt k t.
Start bit
Cc bit d liu c CPU

gi ti
Bit chn l
Stop bit
U
.V
Making
lm du
TxD
B truyn to ra khi
c lp trnh
ED
Hnh 5.17: Khung truyn d liu bn truyn trong ch cn ng b.
T.
Ch l bn nhn ch yu cu 1 stop bit m khng quan tm ti s stop bit c lp trnh

bn nhn. K t nhn c s np vo b m song song ca b nhn ni tip. Mt tn hiu
thng bo s tc ng kh inhn xong mt k t, thng bo ti CPU c mt k t sn sng
c vo. Nu k t nhn trc cha c CPU c vo, m k t hin thi ti thay th n trong b
m nhn, th s xy ra li Overrun, v c bo li s c lp (k t trc s b mt). Hnh 5.18
m t khung d liu ti bn nhn
TI
RxD
Cc bit d liu nhn c Bit chn l
Stop bit
Khng xut hin

trn data bus
.P
Start bit
Hnh 5.18: Khung truyn d liu bn nhn trong ch cn ng b.
PE
5.2.1.2. Ch truyn nhn ni tip ng b

Ch truyn ng b
Ng ra b truyn s gi mc cao cho ti khi CPU gi ti mt k t truyn i, thng
thng s l k t ng b. Cc bit ca k t u tin s c dch ni tip ti ng ra mi
cnh ln ca xung clock truyn. Nu CPU khng ghi k t d liu ti truyn i, th b m
truyn s rng v cc k t ng b s t ng c dch ti ng ra (ng b c th bao gm 1
hoc hai k t). B m thng c mt ng ra thng bo khi no bt u truyn d liu cho bn
nhn, khi no tn hiu ny cn mc cao bn truyn tip tc gi i cc k t ng b. Hnh 5.19
m t khung truyn trong ch ng b. Khi c d liu truyn, nu cha c thng bo ng
b t bn nhn, cc k t ng b vn tip tc c gi ti bn nhn. Thng bo ng b t bn
nhn gi cho bn truyn c th bng tn hiu phn cng hoc lnh phn mm.
Ch nhn ng b
Trong ch nhn ng b, vic ng b vi bn truyn c th thc hin ng b trong hoc
ng b ngoi. Khi chn ch ng b trong, d liu ti ng vo b nhn s c ly mu ti
103
U
.V
mi cnh ln clock nhn. Gi tr trong b m nhn s c so snh ti mi thi im bt u mt

bit, cho n khi tm c k t ng b. Nu chn ch hai k t ng b, th chui d liu
nhn c s c so snh cho ti khi tm c c hai k t , lc ny b nhn s kt thc ch
tm kim ng b (HUNT MODE), v bn nhn ng b c vi bn truyn. Tn hiu thng
bo ng b s tc ng, thng bo cho bn truyn bt u truyn d liu. Khi lp trnh c
kim tra chn l th tn hiu bo ng b s cha c thit lp im gia ca bit chn l, thay
v ti im gia ca bit d liu cui cng khi khng c kim tra chn l.
Khi chn ch ng b ngoi, bn truyn s cung cp mc cao ti ng vo ng b ca bn
nhn, , v th b nhn s khng thc hin ch tm kim t ng b. Mc cao ny cn phi gi
trong thi gian ln hn mt chu k xung clock.
Cc li chn l v overrun c thng bo v kim tra tng t nh trong ch cn ng
b. Li chn l lun c kim tra tr khi b nhn ang hot ng trong ch tm kim ng
b. CPU c th chuyn hot ng ca b nhn qua ch tm kim khi mt ng b. iu ny c
th thc hin bng cch ghi ti b m 1 k t c tt c cc bit bng 1, nh vy s trnh c vic
pht hin ng b sai do nhm k t ng b vi cc k t d liu thng thng khc.
DATA
SYNC1
SYNC2
DATA
Tr v mc 0 khi CPU ghi ti

mt byte mi
TI
Ng ra bo b m
truyn rng
DATA
T.
TxD
ED
c b truyn ni tip
t ng chn vo
Ly mu ti gia mi bit
.P
Hnh 5.19: Khung d liu bn truyn trong ch ng b.
PE
5.2.2. Cu trc ca vi mch truyn nhn ni tip USART 8251

8251 l mch giao tip ni tip trong h thng vi x l c cc c tnh chnh sau:
- Hot ng vo ra ni tip c hai ch : ng b v cn ng b (Synchronous v
Asynchronous).
- Truyn cc k t t 5 ti 8 bit trong ch ng b. ng b c th thc hin bn trong
hoc bn ngoi. Cc k t ng b c t ng chn vo chui d liu.
- Truyn cc k t t 5 ti 8 bit trong ch cn ng b. Tc clock cung cp c th bng
1, 16 hoc 64 ln tc Baud truyn nhn d liu. C th thc hin vic pht k t ngt
truyn. Stop bit c th l 1, 1 1/2, hoc 2 bit. C th pht hin cc li Start bit. Pht hin v
x l ngng (break) t ng.
- Tc truyn cc i trong ch ng b l 64K baud, trong ch cn ng b l 19,2
K baud.
- Hot ng truyn nhn d liu song cng, vi hai b m truyn v nhn ring bit.
- Pht hin cc li truyn nh : chn l, sai khung, overrun.
- Hot ng tng thch vi cc vi x l h Intel.
- Tt c cc tn hiu vo ra tng thch logic TTL.
8251 USART (Universal Synchronous Asynchronous Receiver Transmitter) c thit k cho
vic truyn d liu gia cc vi x l h Intel nh MCS68, 80,85 v iPAX-86,88. 8251 s dng
104
cho vic giao tip vi cc thit b ngoi vi ni tip, v khi c lp trnh t CPU n c th hot
ng trong hu ht cc ch truyn d liu ni tip hin c. Theo hng truyn USART nhn
d liu song song t CPU ri chuyn chng thnh chui d liu ni tip lin tc truyn. ng
thi theo hng nhn n c th nhn cc chui d liu ni tip ri bin i thnh dng song song
chuyn ti CPU. USART s thng bo cho CPU mi khi n truyn xong mt d liu t CPU
gi ti, hoc mi khi nhn c mt d liu t thit b ngoi vi cho CPU. CPU c th c c
trng thi hot ng ca 8251 ti mi thi im, cc trng thi ny bao gm: cc li truyn d
liu, cc tn hiu iu khin nh SYNDET, TxEMPTY . 8251 c sn xut bng cng ngh
bn dn MOS knh N.
Cu to ca 8251 biu din trn hnh 5.20 vi cc khi chc nng chnh nh sau:
TI
T.
ED
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* B m d liu.
L b m 8 bit ba trng thi hai chiu s dng cho vic giao tip gia 8251 v Bus d liu
ca CPU. D liu c th truyn nhn qua b m bng cc lnh IN /OUT thng thng ca CPU,
vi cc tn hiu iu khin thch hp a ti cc chn C/D, RD,WR, CS. Cc t iu khin, cc t
lnh khi ng cho 8251, t trng thi, v cc d liu vo ra u c truyn thng qua b m
d liu.
Cc thanh ghi t iu khin v t lnh s nhn d liu t CPU nh ngha cc ch hot
ng khc nhau ca 8251.
* Khi logic iu khin c ghi.
Khi ny s nhn cc tn hiu cung cp t Bus iu khin ca h thng s to ra cc tn hiu
iu khin cho ton b hot ng ca 8251.
* Khi iu khin Modem.
To ra cc tn hiu bt tay giao tip vi modem cho php truyn d liu trn ng in thoi.
* B m truyn.
B m
truyn (P:S)
Logic iu
khin c
ghi
B iu
khin
truyn
TxRDY
TxE
TxC
B m
nhn
(S:P)
RxD
.P
B m
BUS d
liu
D0-D7
PE
RESET
CLK
C/D
RD
WR
TxD
CS
DSR
DTR
CTS
RTS
Cc tn hiu
iu khin
Modem
B iu
khin nhn
RxRDY
RxC
SYNDET
Hnh 5.20: S khi ca 8251
105
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Khi ny nhn d liu song song t b m d liu, chuyn i thnh chui d liu ni tip,
chn vo cc bit hoc cc k t to ra khung truyn tng ng vi cc ch truyn khc nhau.
Sau cc bit s c dch ra ng TxD mi cnh ln ca xung Clock cung cp vo TxC. B
truyn ch bt u truyn khi c cho php CTS =0. ng TxD s trng thi treo khi thc
hin Reset hoc khi CTS=1 hay khi b m truyn rng.
* B iu khin truyn
B iu khin truyn qun l tt c cc hot ng lin quan n vic truyn d liu ni tip.
N s nhn cc tn hiu c bn trong ln bn ngoi thc hin chc nng ny.
* B m nhn
B nhn ly chui d liu ni tip trn ng RxD bin i thnh dng song song, kim tra s
duy nht ca cc bit hoc cc k t ty theo cc ch thng tin v sau chuyn d liu ( loi
b cc giao thc khung) ti CPU. Cc bit trn ng RxD s c dch vo mi cnh ln ca
tn hiu RxC.
* B iu khin nhn
Khi ny c chc nng qun l tt c cc hot ng lin quan n b nhn, bao gm cc chc
nng sau:
- Ngn chn cc li nhn d liu ca 8251, nh xc nh mc thp trn ng RxD l trng thi
khng s dng (iu kin ngt) hay trng thi d liu thp. Trc khi bt u nhn cc k t
ni tip, mc 1 phi c trn ng RxD ngay sau tn hiu Reset. Sau b nhn s kim tra
pht hin bit thp (Start bit) xc nh trng thi bt u nhn d liu. Chc nng ny ch
hot ng trong ch cn ng b v ch thc hin mt ln sau mi ln Reset.
- Ngn chn sai Start bit do xung nhiu tc thi, b iu khin nhn s ly mu start bit cnh
xung v xc nhn li n mt ln na trong khong gia bit.
- Pht hin li chn l ca d liu nhn c v thit lp bit thng bo li tng ng trong
thanh ghi trng thi.
- Trong ch cn ng b s pht hin li sai khung khi khng tm thy bit stop sau byte d
liu va nhn c.
PE
5.2.3. Cc ch lm vic ca vi mch USART 8251

Nh gii thiu trn, 8251 hot ng c hai ch ng b v cn ng b. Trong ch
cn ng b, khung truyn ng b s truyn ra trn ng TxD v nhn vo bng ng
RxD. Vi clock truyn nhn c nh, tc truyn nhn c th thay i bng phn mm. Bit Start
ca khung truyn mc thp, cc bit d liu c th lo trnh chn t 5 ti 8 bit, kim tra chn
l c lp trnh bng phn mm, c th c hoc khng c bit chn l, c th kim tra chn hoc
l. Bit stop c th lp trnh chn 1, 1 v 2 bit.
Vi ch ng b, 8251 c th thc hin ng b trong hoc ng b ngoi. Khi ng b
trong, bn truyn s truyn lin tip 1 hoc 2 k t ng b ti bn nhn trc khi truyn d liu.
Bn nhn s nhn cc k t ng b so snh vi cc k t ng b m n c lp trnh.
Khi so snh ng, bn nhn ng b c vi bn truyn, v n s cp mc cao vo chn
SYNDET, bn truyn bt u dch cc d liu ra.
Trong ch ng b ngoi, bn truyn pht lin tip cc d liu ng b khi khng c d
liu. Tuy nhin, bn nhn khng so snh cc k t ng b ny, m n ch cho ti khi ng vo
SYNDET tc ng th bt u nhn d liu.
106
C/D\
0
0
1
1
x
x
WR\
1
0
1
0
1
x
PE
.P
CS\
0
0
0
0
0
1
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5.2.4. Ghp ni USART 8251 vi h thng vi x l

M t cc tn hiu ca 8251
* RESET : l mt ng vo tc ng mc cao khi ng li 8251, sau khi nhn c tn hiu
ny 8251 s tr v trng thi ban u v cn phi lp trnh li cc t lnh mi. Xung Reset cn ko
di t nht trong 6 chu k xung clock. Ngoi ra t lnh cng c th khi ng li cho 8251, l
ch khi ng mm. Tn hiu ny c th ni ti RESET ca CPU 8251 c reset cng vi
ton b h thng.
*CLK: (Clock) L ng vo cung cp xung nhp nh thi cho hot ng cho cc khi bn trong
8251. Tn hiu ny c th ly t mt b to clock TTL. Khng c ng vo ra no tc ng ph
thuc vo CLK, nhng tn s xung a ti ng vo ny phi ln hn 30 ln tc truyn nhn.
Cc tn hiu iu khin ch hot ng ca 8251
* WR\: (Write) Ng vo tc ng mc thp, 8251 nhn tn hiu ny t bus iu khin h thng
xc nh ch CPU ghi d liu hoc t iu khin ti 8251.
* RD\: (Read) L mt ng vo tc ng mc thp nhn tn hiu t bus iu khin h thng xc
nh ch CPU c d liu hoc t trng thi t 8251.
*C/D\: (Control/Data) Ng vo ny tc ng cng vi cc tn hiu RD hoc WR xc nh tn
hiu ghi ti 8251 l d liu hay t iu khin, v d liu c t 8251 l d liu hay t trng thi.
Mt ng a ch c th ni ti ng vo, ny xc nh 1 a ch c ghi d liu, v mt a ch
c chi iu khin.
* CS\: (Chip Select) L ng vo tc ng mc thp chn mch ca 8251. Vic c ghi 8251 ch
thc hin c khi chn mch (CS=0). Khi CS=1 bus d liu s treo ln trng thi tr khng
cao v cc tn hiu RD, WR s khng c tc dng. Tn hiu ny c ni ti b gii m a ch
vo ra. Cc ch hot ng ca 8251 tng ng vi cc tn hiu iu khin c m t trong
bng sau:
RD\
0
1
0
1
1
x
Ch
CPU ghi d liu ti 8251
CPU c d liu t 8251
CPU ghi cc t lnh ti 8251
CPU c t trng thi t 8251
Data bus tr khng cao
Khng chn mch data bus tr
khng cao
Cc tn hiu iu khin Modem

8251 c mt loi cc tn hiu to ra t b iu khin modem giao tip mt cch n gin vi
hu ht cc loi modem. Cc tn hiu ny to ra nhm mc ch giao tip vi cc modem nhng
cng c th s dng cc mc ch khc nu cn thit.
* DSR (Data Set Ready) L mt ng vo ni ti DSR ca modem. Khi ng vo ny tc ng, bit
DSR trong thanh ghi trng thi s tc ng, v th CPU c th kim tra ng vo ny bng cch c
t trng thi. Ng vo ny c s dng kim tra trng thi ca modem. Modem tc ng tn
hiu ny bng 0 l thng bo ti CPU vic n ni ghp hon chnh vi ng in thoi, v
ang sn sng cho vic truyn d liu. Cc modem quay s t ng s gi tn hiu ny ti CPU
khi n quay s thnh cng ti mt u cui khc.
107
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*DTR (Data Terminal Ready) L mt ng ra tc ng mc thp, tn hiu ny c th lp xo bng

cc ghi d liu ti bit DTR ca t lnh lp trnh cho 8251. Tn hiu ny ni ti modem iu
khin hot ng ca modem. CPU s tc ng tn hiu ny khi khi ng xong 8251 sn
sng truyn d liu vi modem. Mt s modem s khng th thng bo trng thi ni ghp
c vi ng in thoi cho n khi tn hiu ny tc ng. Mt s modem khng s dng tn
hiu ny. Mt s modem c cng tc chuyn ch s dng hoc khng s dng tn hiu ny.
* RTS (Request To Send) L mt ng ra tc ng mc thp khi lp trnh bit RTS trong t lnh lp
trnh cho 8251. Tn hiu ny c gi ti modem yu cu gi d liu ti ng ra TxD. Tn
hiu ny s dng kt hp vi CTS iu khin lung d liu gia CPU v modem. Trong ch
ng b tn hiu ny s dng iu khin lung tn hiu gia cc modem.
* CTS (Clear to Send) L ng vo tc ng mc thp cho php 8251 truyn chui d liu ni tip
khi bit TxEnable trong t lnh bng 1. Cn nu TxEnable = 0 hoc CTS =1 trong khi ang truyn
th 8251 s truyn xong ht tt c cc bit d liu hin c v ghi lnh TxDisable trc khi ngng.
Tn hiu ny t modem gi ti 8251 thng bo n sn sng nhn d liu. Trong ch ng b
tn hiu ny s dng iu khin lung thng tin gia cc modem.
Cc tn hiu truyn d liu
* TxD: (Transmit Data) L ng ra s dng truyn d liu ni tip t 8251 ra ngoi thit b
ngoi vi. D liu song song ti b m truyn s dch ln lt ra ng ny ti mi cnh ln ca
TxC.
* TxReady: (Transmitter Ready) Ng ra ny s dng thng bo cho CPU bit b m truyn
sn sng nhn mt k t d liu. Tn hiu ny c th s dng ngt CPU yu cu CPU truyn ti
8251 mt byte d liu mi. Tn hiu ny s b che bi bit TxEnable, CPU cng c th kim tra
trng thi ng ra ny bi phn mm bng lnh c t trng thi ca 8251 v kim tra bit
TxREADY. Ng ra ny s t ng reset cnh xung ca tn hiu WR\ (tc l khi mt k t d
liu c np ti t CPU).
* TxEmpty: ( Transmitter Empty ) khi 8251 khng c k t gi ra, TxEmpty s tc ng mc
cao. N s c reset khi nhn c mt k t t CPU (nu b m truyn c cho php). Ngoi
ra khi b truyn khng c cho php ng ra ny cng mc cao. TxEmpty c th s dng
thng bo kt thc mt ch truyn, khi CPU s hiu cn phi chuyn ng truyn trong
ch truyn nhn bn cng.
Trong ch ng b mc cao ng ra ny thng bo khng c k t d liu no c np
ti, cc k t ng b bt u c dch ra mt cch t ng.
* TxC: (Transmitter Clock) l ng vo cung cp xung nhp iu khin tc truyn cc k t.
Trong ch ng b tc baud l 1x tc l bng tn s xung TxC. Trong ch truyn cn
ng b tc baud truyn s bng 1, 1/16, 1/64 ln tc TxC ty thuc vo tc lp trnh
l 1x, 16x hay 64x.
V d: nu tc baud l 110 baud
TxC = 110Hz trong ch 1x.
TxC = 1,72KHz trong ch 16x
TxC = 7.04 KHz trong ch 64x
Cnh ln ca TxC s dch cc bit ra khi 8251.
Cc tn hiu cho vic nhn d liu
* RxD: (Receiver Data) L ng vo s dng cho vic nhn d liu ni tip t bn ngoi vo 8251.
Cc bit ca d liu ni tip s ln lt c dch vo b m nhn mi cnh ln ca RxC.
* RxRDY: (Receiver Ready) L ng ra tc ng cao ch th 8251 c mt d liu sn sng CPU
c. RxRDY c th s dng l tn hiu yu cu ngt CPU, CPU dng cng vic hin ti c d
108
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liu t b m nhn ca 8251. CPU cng c th kim tra trng thi ca ng vo ny bng cch
c t trng thi ca 8251 v kim tra bit RxRDY.
Khi bit RxEnable trong t lnh khng tc ng th RxRDY s b gi trng thi reset, ch
cn ng b RxRDY ch thit lp khi b nhn c lp trnh cho php hot ng, Start bit
c gi cng vi mt k t c nhn v chuyn xong sang dng song song trong b m.
Trong ch ng b RxRDY cng ch thit lp khi b nhn c cho php hot ng, v k t
d liu c chuyn vo hon chnh trong thanh ghi d liu.
Khi c mt k t mi truyn ti, m k t c cha c c ra khi b m s xy ra li
overrun, bit bo li trong thanh ghi trng thi c thit lp v k t c s b mt. Nu d liu bt
u c trong khi xy ra vic truyn d liu bn trong th li overrun cng xy ra tng t nh
trn.
* RxC: (Receiver Clock) Ng vo nhn xung nhp iu khin tc nhn d liu ni tip. Trong
ch ng b tc baud l 1x, tc l bng vi tn s ca RxC. Trong ch cn ng b tc
baud cng ty thuc vo ch chn trong khi khi ng 8251 l 1x, 16x hay 64x nh khi
truyn.
V d vi tc nhn l 300 baud th:
- trong ch 1x tn s RxC phi l 300 Hz
- trong ch 16x tn s RxC phi l 4800 Hz
- trong ch 64x tn s RxC phi l 19.2 kHz
D liu c ly mu vo mi cnh ln ca RxC.
Ch trong hu ht cc h thng s dng 8251 truyn d liu ni tip, 8251 s x l c hai
hng truyn v nhn trn mt ng truyn bn ngoi (v d nh ng dy in thoi). Do
tc truyn v nhn d liu thng l bng nhau. TxC v RxC s c ly chung t mt b to
xung nhp.
* SYNDET: (SYNC Detect/ BRKDET Break Detect) Tn hiu ny c s dng cho chc nng
pht hin ng b SYNDET, v n c th s dng nh mt ng vo, hoc mt ng ra ty thuc
vo t iu khin lp trnh cho 8251. N s b reset v mc thp khi c tn hiu Reset chip. Trong
ch ng b tn hiu ny l mt ng ra, SYNDET s tc ng mc cao khi 8251 xc nh c
k t ng b trong ch nhn. Nu 8251 c lp trnh ch c hai k t ng b (bi-sync)
th SYNDET s tc ng ti thi im gia ca bit cui cng k t ng b th hai. SYNDET s
t ng Reset khi c t trng thi.
Trong ch ng b ngoi tn hiu ny l mt ng vo, ng vo ny tc ng mc cao
thng bo rng 8251 s bt u nhn d liu vo cnh ln ca chu k RxC k tip. Khi ch
ng b ngoi c lp trnh th ch ng b trong s khng hot ng.
Trong ch truyn cn ng b tn hiu ny mang chc nng BRKDET, n s tc ng mc
cao bt c khi no b nhn pht hin ra hai bit thp lin tip sau stop bit (Trong ch cn ng
b khung d liu truyn bao gm : Start bit, cc bit d liu, bit chn l v Stop bit). Pht hin ngt
cng c th c trong t trng thi ca 8251. Tn hiu ny s b xa khi reset chip, hoc khi ng
vo RxD tr v mc cao.
Giao tip gia 8251 v bus h thng.
Hnh 5.21 m t vic ni ghp gia 8251 v bus h thng ca 80286, cc giao tip khc cng
c thc hin mt cch tng t.
a ch m CPU cung cp truy cp ti 8251 s bao gm hai phn: cc bit a ch cao s a
ti b gii m vo ra cung cp tn hiu chn mch cho 8251. a ch thp A0 s dng cho vic
xc nh vic truyn d liu gia 8251 v CPU l d liu thng thng hay cc t iu khin hay
trng thi.
109

Bus d liu s dng cho vic truyn d liu, ghi cc t iu khin v c t trng thi ca 8251.
Cc tn hiu iu khin cn li c ly t bus h thng phc v cho cc nhim v khc nhau
nh m t trong phn trn.
Address BUS
A0
Control BUS
IORC\
IOWC\
Reset
D0-D7
RD\
Gii m a
ch vo ra
U
.V
C/D
CS\
Data BUS
(TTL)
WR\
CLK
ED
8251
Reset
Hnh 5.21: Giao tip gia 8251 v Bus h thng.
PE
.P
TI
T.
5.2.5. Lp trnh khi to ch lm vic cho USART 8251

Trc khi bt u truyn nhn d liu th 8251 cn c np mt tp hp cc t iu khin
ghi ti t CPU. Cc t iu khin ny s nh ngha y cc tnh nng hot ng ca 8251 v
chng cn c a ti ngay sau khi reset (cng hoc mm) cho 8251.
Cc t iu khin s bao gm hai dng sau:
1. T ch (Mode Instruction)
2. T lnh (Command Instruction).
Sau y s m t chi tit cc bit ca cc t ch v t lnh v cc tnh nng hot ng m
chng qun l.
- T ch :
T ch s nh ngha cc tnh cht hot ng chung cho 8251. N cn phi c ghi ti
8251 ngay sau khi reset, v ch khi n c ghi ti th cc k t ng b hay cc t lnh mi
c th ghi ti c. Cc bit ca t ch trong ch cn ng b c nh ngha nh hnh
5.22a bao gm:
D1D0=B2B1 l hai bit nh ngha tc baud truyn nhn d liu ca 8251. Khi 2 bit ny
u bng 0 th 8251 s hot ng trong ch ng ng b, lc ny tc baud s bng tn s
xung nhp. Khi hai bit ny khng ng thi bng 0, 8251 s hot ng trong ch cn ng b
v 3 tc truyn c th chn ty thuc vo gi tr ca cc bit ny.
D3D2=L2L1 l hai bit xc nh chiu di k t d liu truyn t 5 ti 8 bit. CPU lun c v
ghi d liu vi 8251 bng bus d liu 8 bit, do khi chiu di d liu chn nh hn 8 th khi ghi
cc bit c trng s thp s b b qua, cn khi c th cc bit c trng s thp cung cp t 8251 s
bng 0.
Bit D4=PEN xc nh c cho php kim tra chn l hay khng, nu bit ny bng 1 vic kim
tra chn l c cho php, lc ny 8251 s t ng thm bit chn l vo sau cc bit d liu khi
truyn. V khi nhn bit chn l s c kim tra xem c ng vi cc bit d liu nhn c
hay khng, nu sai c li trong thanh ghi trng thi s c thit lp.
110

Bit D5=EP xc nh vic kim tra chn/l l kim tra s bit 1 chn hay l. Khi bit ny bng 1
th kim tra chn, lc ny bit chn l s bng 1 khi s cc bit 1 ca d liu truyn hoc nhn l
mt s chn.
S2
S1
EP
PEN
L2
L1
B2
B1
Baud : tc baud
0
1
0
1
0
0
1
1
SYN 1X
16X 64X
U
.V
Length : chiu di k t
0
1
0
1
0
0
1
1
5 bit 6 bit 7 bit 8 bit
Parity Enable: cho php kim tra chn l

1: cho php; 0: khng cho php
ED
Even Parity: cho php kim tra chn

1:chn ; 0: l
Stop bit: s Stop bit

0
1
0
1
0
0
1
1
cm 1 bit 1,5 bit 2 bit
T.
Hnh 5.22a: T ch ch cn ng b ca 8251.
PE
.P
TI
D7D6=S2S1 l hai bit xc nh chiu di ca bit Stop. Chiu di ca Stop bit c th ko di

trong thi gian ca 1, 1 1/2, hoc 2 bit tnh theo tc truyn nhn c qui nh ty thuc
vo gi tr ca 2 bit ny.
Trong ch ng b chng ta s c t ch nh hnh 5.22b, trong bit ESD s dng
chn ch ng b trong (internal synchronization) hoc ng b ngoi (external
synchronization). Bit SCS xc nh s k t ng b, bit ny bng 0 s k t ng b l 2, bit ny
bng 1 s k t ng b l 1.
Hnh 2.22b: T iu khin trong ch ng b ca 8251.
111
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- T lnh:
T lnh lp trnh cho 8251 c biu din nh hnh 5.25 bao gm 8 bit vi cc chc nng nh
sau:
Bit D0=TxEN l bit cho php b truyn d liu, khi bit c lp trnh bng 1 s cho php b
truyn ca 8251, ng ra TxRDY s tc ng mc cao khi ng vo CTS tc ng mc thp v lc
ny b m trng thi sn sng nhn mt k t t CPU truyn ra ngoi.
Bit D1=DTR l bit thng bo trng thi sn sng ca 8251, khi bit ny c lp trnh bng
1 ng ra DTR s tc ng mc thp.
Bit D2=RxE l bit s dng cho php b nhn ca 8251, khi bit ny bng 1 s cho php
ng ra RxRDY ca 8251 tc ng mc cao khi b nhn c 1 k t sn sng CPU c vo.
Bit D3=SBRK l bit cho php gi k t ngng truyn khi 8251 ht d liu. Khi bit ny bng 1
ng ra TxD s lun bng cc bit 0 khi ht d liu truyn gi l k t ngng. K t ngng ny s
dng xc nh kt thc truyn xong mt khi d liu.
Bit D4=ER l bit reset cc bit bo li trong thanh ghi trng thi ca 8251 nh: bit PE bo
li chn l, OE bo li overrun, v FE bo li sai khung truyn.
Bit D5=RTS l bit lp trnh cho ng ra RTS, khi bit ny bng 1 th ng ra RTS s tc ng
mc thp, tn hiu ny s dng hi modem sn sng nhn d liu cha.
Bit D6=IR s dng reset mm cho 8251, khi bit ny trong t lnh bng 1, tc ng s
tng ng vi vic cp xung mc cao vo chn reset ca 8251. Lc ny cn phi gi li mt t
ch mi.
112

Bit D7=EH: bit ny ch s dng trong ch ng b. Khi bit ny c lp trnh bng 1 th
8251 s tm cc k t ng b trong chui bit bt u dch vo b nhn, cho n khi tm thy n
s tc ng tn hiu ng ra SYNDET mc cao thng bo cho bn pht bt u truyn d liu
qua.
Vic lp trnh cho 8251 c thc hin theo cc bc trn hnh 5.24:
C/D=1
K t ng b 1
C/D=1
K t ng b 2
C/D=1
T lnh
C/D=0
D liu truyn nhn
C/D=1
T lnh
C/D=0
ED
D liu truyn nhn
Ch s dng trong ch
ng b
T ch
U
.V
C/D=1
C/D=1
T lnh
T.
Hnh 5.24: Qui trnh lp trnh cho 8251.
PE
.P
TI
Trc tin khi mi bt u hot ng, hoc ngay sau khi reset cng hoc mm cn phi gi
ti cho 8251 t ch . Cng vic ny c CPU thc hin bng lnh ghi, vi a ch cung cp
C/D=1. Sau nu t ch chn ch ng b, th cn gi ti cho 8251 mt hoc hai k t
ng b. Cc k t ng b ny c lu bn trong 8251, so snh vi cc k t ng b m
thit b bn ngoi gi ti, trong ch nhn ng b. V cc k t ng b cng c t ng
pht mi u mt chui d liu, m 8251 truyn i cho ti khi thit b bn ngoi ng b c
vi n. Tip theo l t lnh cn c gi ti cho 8251.
Trong ch cn ng b th theo sau t ch s l t lnh. Khi t lnh c np 8251
c th truyn nhn cc khi d liu ni tip nh m t trong phn trn. Khi mun thay i cc
c tnh truyn nhn c th lp trnh li cho 8251 mt t lnh mi, cn mun nh ngha li hon
ton cho 8251 th cn thc hin reset. Trong qu trnh truyn nhn d liu, CPU cng c th kim
tra li trng thi ca 8251, c mt gii thut truyn nhn hp l, m bo an ton ca vic
truyn nhn d liu. Qu trnh lp trnh cho 8251 c th m t trong hnh 5.24. V d on chng
trnh sau s dng cho vic lp trnh cho 8251 hot ng trong h thng vi x l h Intel nh sau:
D0:
D1:
MOV DX,PORT_K
MOV AL,00H
OUT DX,AL
MOV CX,02
LOOP D0
OUT DX,AL
MOV CX,02
LOOP D1
OUT DX,AL
; Np a ch ca iu khin vo thanh ghi DX

; Np 0 vo thanh ghi lnh ri to tr m
; bo 8251 ang ch nhn t lnh trc khi
; c reset
113
SynDet
BrkDet
FE
OE
PE
TxE
RxRDY
.P
TI
T.
ED
DSR
U
.V
MOV CX,02
D2:
LOOP D2
MOV AL,40H
; Np t lnh reset mm ri to tr chuyn 8251 OUT
DX,AL
; v trng thi chun b nhn t lnh ch
MOV CX,02
D3:
LOOP D3
MOV AL,11001110B
; Np t iu khin nh ngha 8251 hot ng
OUT DX,AL
; vi ch cn ng b t s tc baud l
MOV CX,02
; 16x (d1d0=10), chiu di k t 8 bit (d3d2=11),
D4:
LOOP D4
; khng cho php kim tra chn l (d4=0), 2 stop
MOV AL,00110111B
; bit Np t lnh nh ngha c tnh ca 8251:
OUT DX,AL
; cho php truyn, tc ng ng ra DTR, cho php nhn, ch
hot ng thng thng (khng gi k t ngng truyn), xa tt c cc c li, tc ng ng ra
RTS, khng reset mm, khng cho php ch tm k t ng b.
TxRDY
Transmitter Ready
(B m sn sng)
Ch th 8251 sn sng nhn mt k
t hoc mt lnh
Receiver Ready (b nhn sn sng): Ch th

8251 nhn mt k t trn ng vo ni tip
ca n sn sng truyn cho CPU
Transmitter Empty(B truyn rng)

Bit ny ch th b bin i song song sang ni tip ca b
truyn rng
Parity Error(li chn l): Bit ny c lp khi pht hin c li chn

l trn k t va nhn c. n s c xa bng t lnh c bit ER =
1. Li ny khng cm hot ng ca 8251
Frame Error(li khung truyn): bit ny ch tc ng trong ch cn ng b ch th bit Stop

khng hp l c pht hin ti cui mi k t
PE
Overrun Error(li overrun): Bit ny ch th mt k t b mt do CPU cha c vo k

t c trong b m m k t ti sau ti
Synchronous Detect(Pht hin ng b). Khi thit lp cho ch ng b trong ch th 8251 thc hin xong
vic ng b sn sng truyn d liu
Data Set Ready(D liu thit lp sn sng): thng s dng cho vic kim tra trng thi Modem
Hnh 5.25: T trng thi ca 8051
Khi bt u cp ngun 8251 khng phi lun lun p ng ng ch reset cng, v vy

chui lnh ban u gi 3 byte 0 lin tip v mt byte lnh reset ti a ch thanh ghi iu khin
ca 8251, m bo n c reset trc khi nhn t lnh ch . Sau khi c reset mt cch
m bo t lnh ch c th gi ti cho 8251. Ch 8251 phn bit t ch v t lnh bng
th t m CPU ghi ti n. Sau khi reset l t ch , cc t gi ti a ch thanh ghi iu khin
sau t ch s c xem nh cc t lnh cho n khi 8251 c reset tr li. Thi gian to tr
sau mi ln gi t lnh ti cho 8251 cn phi m bo ln hn 16 ln chu k xung nhp cp ti
114
PE
.P
TI
T.
ED
U
.V
ng vo CLK. Ty theo tng h thng c th m c th thay i gi tr np vo CX c tr

hp l. Trong v d trn tn s xung nhp cp cho CPU v 8251 bng nhau nn gi tr np cho CX
l 02. Lnh MOV CX,02 chim 4 chu k xung nhp, gi tr ca CX c s dng m s vng
lp cho lnh LOOP nn lnh ny s c thc hin 2 ln. Ln u lnh LOOP chim 17 chu k
xung nhp, ln sau n chim 5 chu k na. Lnh OUT chim 8 chu k, nh vy vi vng lp ny
thi gian tr ln hn gi tr cn thit l 16 chu k xung nhp.
xc nh cc trng thi xy ra trong qu trnh truyn nhn d liu c th c t trng thi
t 8251. T trng thi ca 8251 c cu trc nh trn hnh 5.25.
T trng thi c th c vo bng lnh Input vi a ch l CS=0 v C/D=1. Trc khi truyn
nhn d liu m bo CPU cn phi kim tra xem 8251 trng thi sn sng cha, vic
kim tra c th thc hin bng cch c gi tr ca thanh ghi trng thi v xem xt gi tr cc bit
ca n mi bit s thng bo cho chng ta bit v mt c tnh xy ra ti 8251. Khi vic truyn
nhn d thc hin xong k t m CPU nhn c cng c th sai do cc tc nhn bn ngoi,
cc li ny cng c thng bo trn thanh ghi trng thi, nh c th thc hin cc gii thut
thch hp kim tra v truyn nhn li d liu mi khi xy ra sai st.
hiu r v tc dng ca thanh ghi trng thi c th xem xt cc on chng trnh truyn
nhn d liu bng 8251 vit bng tp lnh ca CPU 8086.
* on lnh truyn d liu:
MOV DX,Ctr_Add ; a ch thanh ghi trng thi
Test1: IN AL,DX
; c thanh ghi trng thi
AND AL,10000001B ; Kim tra DSR v TxRDY
CMP AL,10000001B
JNE Test1
; Ch bt u truyn khi sn sng
MOV DX,Data_Add ; a ch thanh ghi d liu
MOV AL, Data_Send ; Np d liu mun truyn vo AL
OUT DX,AL
; Gi d liu ti cng truyn
Trc khi mun truyn mt d liu, cn phi kim tra xem b m truyn sn sng truyn
d liu hay cha (khi sn sng bit D0 ca thanh ghi trng thi s bng 1). Ngoi ra c th 8251
c ni ti modem truyn d liu trn ng in thoi, nn phi xc nh modem kt ni
sn sng cha (D7=1). Khi cc tn hiu sn sng lc ny c th s dng lnh Output gi d
liu ti 8251.
on lnh nhn d liu:
MOV DX,Ctr_Add
; a ch thanh ghi trng thi
Test2: IN AL,DX
; c thanh ghi trng thi
AND AL,00000010B ; Kim tra RxRDY
JZ Test2
; Ch bt u truyn khi sn sng
MOV DX,Data_Add ; a ch thanh ghi d liu
IN AL,DX
; c d liu
Trc tin cn phi c gi tr ca thanh ghi trng thi bng lnh input vi a ch lm CS =0;
C/D=1. Sau kim tra trng thi ca bit RxRDY bng lnh AND 00000010B, lc ny nu bit
RxRDY (D1) =0 th sau lnh AND kt qu trong thanh ghi AL s bng 0, v c Zero s c lp
lm chuyn iu khin v nhn Test2 kim tra li mt ln na. Khi bit RxRDY ln mc 1, c
ngha l trong b m ca b nhn cha mt k t, lc ny c th c k t vo bng lnh IN
vi a ch lm CS=0 v C/D=0.
115

Mt s s ng dng 8251
S hnh 5.26 biu din giao din ni tip cn ng b vi thit b hin th CRT, tc
truyn nhn c to ra bng mt b pht xung nhp. Vic truyn nhn d liu thng qua hai
ng TxD v RxD thng qua b i chun tn hiu.
Address BUS
A0
Control BUS
I/OR
I/OW
2
(TTL)
Reset
D0-D7
RD
U
.V
C/D
Gii m
a ch
vo ra
Data BUS
WR Reset
CS
8251
RxC
TxD
RxD
ED
TxC
CLK
i chun tn hiu
EIA qua TTL
T.
B to xung
Clock
Thit b u cui
ni tip cn ng b
CRT
Hnh 5.26: Giao tip 8251 v hin th CRT trong ch cn ng b.
TI
S hnh 5.27 biu din vic truyn d liu theo ch ng b bng 8251, trong s ny
cn thm tn hiu SYNDET thng bo vic ng b gia 8251 vi thit b.
Address BUS
PE
.P
A0
Gii m a
ch vo ra
C/D
CS
Control BUS
I/OR
2
(TTL)
I/OW
Data BUS
D0-D7
RD
WR
Reset
CLK
8251
TxC
RxC
TxD
RxD
SynDet
Thit b hoc u cui ng b
Hnh 5.27: Giao tip gia 8251 v thit b ng b.

Khi truyn d liu trn ng in thoi 8251 c th giao tip vi cc loi modem ng b
hoc khng ng b theo cc s hnh 5.28:
116
RxD
TxD
8251
Giao din
ng dy
in thoi
Modem cn
ng b
DSR
DTR
B to xung nhp
RxD
TxD
DSR
DTR
Giao din
ng dy
in thoi
ED
Modem ng b
ng dy
in thoi
U
.V
RxC
TxC
8251
CTS
RTS
CTS
RTS
Syndet
T.
RxC
TxC
ng dy in
thoi
TI
Hnh 5.28: Giao tip ni tip qua ng in thoi.
PE
.P
Tm tt ni dung chng:
Vo ra song song lp trnh 8255 c ba cng vo ra v mt thanh ghi iu khin, thanh ghi
iu khin s dng gi t iu khin lp trnh cho 8255. Tu theo t iu khin 8255
s c ba ch hot ng vo ra: vo ra c bn, vo ra mt chiu c bt tay v vo ra hai
chiu c bt tay.
T iu khin cho 8255 c hai dng: t iu khin ch vo ra c bit D7 bng 1, cc bit
cn li s nh ngha ch hot ng v chiu vo ra cho cc cng. T iu khin lp
xo bit cng C c bit D7 bng 0, c 03 bit xc nh ng cng C s c lp xo v bit
D0 xc nh bit s c lp hay c xo.
ch vo ra c bn, cc cng vo ra ca 8255 s khng c tn hiu bt tay, d liu s
c truyn mt cch th ng nh cc cng m ci thng thng. Trong ch vo ra
c bt tay, trc ht cng truyn c tn hiu OBF a ti ng vo STB ca cng nhn,
cht d liu vo cng nhn. Cng nhn c ng ra IBF a tr li ng vo ACK ca
cng truyn bo ch cng truyn d liu c nhn.
kt ni 8255 vi h thng vi x l, trc ht cp a ch ca CPU ti cc ng A1A0
xc nh cc cng vo ra v thanh ghi iu khin, cc tn hiu vo RD v WR c th
cp t IORDC v IOWTC, CS c cp t ng ra ca b gii m a ch xc nh vng
a ch cho mt 8255 ca h thng.
117
i vi vo ra ni tip 8251 s c mt b truyn v mt b nhn ni tip ring, c th

truyn nhn d liu ni tip song cng. 8251 s c chc nng bin i d liu song song
ghi ti t CPU thanh d liu ni tip cung cp ti thit b, v bin i d liu ni tip t
thit b thnh d liu song song chuyn cho CPU.
8251 c hai ch truyn nhn d liu ng b v cn ng b. Ch cn ng b c
khung truyn bao gm Start bit, cc bit d liu, parity bit v stop bit. Cn khung truyn
ng b ch bao gm cc t ng b v d liu truyn nhn.
Ghp ni 8251 vi h thng trc ht cn cp mt ng a ch t CPU ti ng vo C/D,
xc nh truyn d liu vi thit b hay truyn nhn vi cc thanh ghi bn trong 8251.
RD v WR cng c th cp t IORDC v IOWTC ging nh i vi 8255, v cui cng
CS cng c cp t mt ng ra ca b gii m a ch.
Lp trnh cho 8251 bao gm vic lp trnh t ch , cc k t ng b v t lnh tu theo
tng ch hot ng c th. Ngoi ra khi kt ni cc tn hiu bt tay: DSR, DTR, RTS,
RTS cn ch ti vic lp trnh trng thi ca chng v c thanh ghi trng thi xc
nh trng thi ca thit b truyn d liu vi n.
U
.V
ED
BI TP:
T.
Bi 1: Thit k h thng vi x l s dng vo ra song song PPI 8255 hot ng ch 0 (Mode

0) iu khin bn phm ma trn 16 phm v b hin th 8 LED 7 on iu khin theo kiu
qut nh hnh B5.1. Vit chng trnh c cc phm nhn ri hin th trn cc LED 7 on,
phm u tin s hin th ti LED bn phi, khi nhn thm mt phm gi tr ca cc LED
bn phi s chuyn v bn tri mt v tr.
R1
R2
R3
C0
C1
A B
C D E F
C2
34
33
32
31
30
29
28
27
RD
5
WR
36
A0
9
A1
8
Reset 35
CS1
6
.P
R0
TI
U6
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
RD
WR
A0
A1
RESET
CS
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
C3
PE
Ba n phm
4
3
2
1
40
39
38
37
a bc
de f
g dp
18
19
20
21
22
23
24
25
14
15
16
17
13
12
11
10
88888888
anode0 ti anode8
R0
R1
R2
R3
C0
C1
C2
C3
8255
Hnh B5.1: H thng yu cu thit k trong bi 1
Bi 2: Thit k h thng vi x l s dng cng vo ra PPI 8255 hot ng vi t iu khin lp

xo bit PC. Vit chng trnh to 8 sng vung c tn s khc nhau trn 8 ng ra PC.
Bi 3: Xc nh t iu khin ca 8255 n hot ng vi cc tnh nng sau: cng A hot ng
trong ch 2, cng B l ng ra trong ch 1.
Bi 4: Thit k hai h thng vi x l truyn d liu vi nhau bng cng vo ra song song lp trnh
PPI 8255 hot ng ch 1 (Mode1). Vit cc on chng trnh truyn nhn d liu
cho hai h thng ny.
Bi 5: Thit k hai h thng vi x l truyn d liu vi nhau bng cng vo ra song song lp trnh
PPI 8255 hot ng ch 2 (Mode 2). Vit cc on chng trnh truyn nhn d liu
cho hai h thng ny.
118
PE
.P
TI
T.
ED
U
.V
Bi 6: Thc hin h thng vi x l 80286 iu khin b hin th LED ma trn 8 hng 8 ct bng vi
mch vo ra 8255. Vit chng trnh hin th ch A ln Led ma trn .
Bi 7: Thc hin h thng vi x l giao tip vi b ADC loi xp x lin tip bng vi mch vo ra
8255. Vit chng trnh iu khin vic c d liu t ng vo ADC hin th ln 2 LED 7
on di dng s HEX.
Bi 8: Xc nh t ch s lp trnh cho 8251 n hot ng vi cc tnh nng sau: truyn
nhn cn ng b, tc truyn nhn 1x, chiu di d liu truyn l 6 bit, s stop bit l 1.
Bi 9: Xc nh t ch ca 8251 n hot ng vi cc tnh nng sau: truyn nhn ch
ng b, chiu di d liu truyn l 7, cho php ch ng b trong, mt k t ng b.
Bi 10: Thit k hai h thng vi x l truyn d liu vi nhau bng cng vo ra ni tip 8251 vi
ch truyn cn ng b (Asynchronous). Vit cc on chng trnh truyn nhn d liu
cho hai h thng ny.
Bi 11: Thit k hai h thng vi x l truyn d liu vi nhau bng cng vo ra ni tip 8251 vi
ch truyn ng b (Synchronous). Vit cc on chng trnh truyn nhn d liu cho
hai h thng ny.
Bi 12: Thit k h thng vi x l 80286 truyn d liu vi cng COM my tnh, vit cc chng
trnh truyn nhn d liu trn my tnh v trn h thng vi x l.
119
Chng 6: Vi iu khin 8 bit 8051
CHNG VI : VI IU KHIN 8 BIT 8051
CU TRC V CC CHC NNG CA VI IU KHIN 8051
T.
6.1.
ED
U
.V
Gii thiu:
Chng ny cung cp cc kin thc v vi iu khin 8051, trc ht cn quan tm ti cc khi
nim v s khc nhau gia vi iu khin v vi x l, hiu c cc li im ca vi iu khin so
vi vi x l khi thit k cc h thng ng dng nh.
Khi la chn cc b vi iu khin cn xem xt ti cc tnh nng sn c trong n nh: dung
lng b nh chng trnh, dung lng b nh d liu, cc loi vo ra, tc hot ng .
Cc khi chc nng vo trong vi iu khin 8051 bao gm: Cc cng vo ra song song, cng
vo ra ni tip, b nh thi v ngt.
i vi cng vo ra song song cn tm hiu v cu to, cc lnh s dng xut nhp d liu.
V cng vo ra ni tip cn tm hiu cch khi ng, cc ch hot ng ca n, v vic xc
nh tc truyn nhn d liu da theo cc yu t no.
V b nh thi trc ht cn tm hiu v cu trc v cc ng dng ca n, n c cc ch
hot ng no thch hp cho ng dng no. Tip theo cn bit cch khi ng gi tr cho thanh
ghi TMOD c cc ch hot ng khc nhau. Cch khi ng v gi tr khi ng cn thit
cho cc thanh ghi m ca b nh thi.
V ngt cn tm hiu v cc ngun yu cu ngt, cc vector ngt tng ng cho cc ngun yu
cu , cch lp trnh cho php ngt v lp trnh u tin ngt.
PE
.P
TI
6.1.1. Gii thiu v cc b vi iu khin

B vi iu khin (MCU Micro Controller Unit) l mt h thng vi x l c bn tch hp
trong cng mt chip, thng thng trong mt MCU c mt b vi x l (CPU), mt dung lng
nh khong vi KB, v mt s giao tip vo ra c bn thch hp cho cc ng dng iu khin nh.
Vi cu trc nh m t trn, ngi s dng c th nhanh chng thc hin mt h thng phn cng
iu khin lp trnh bng cch ni mt s t linh kin c bn nh thnh anh, t in, in tr
vo b vi iu khin. Mt khc do khng phi thc hin cc ng mch ni gia cc khi CPU,
b nh v vo ra nn kh nng chng nhiu ca h thng cao thch hp cho mi trng cng
nghip. Hin nay cc b vi iu khin tr nn kh ph bin trong nhiu lnh vc vi rt nhiu
hng sn xut nh: hc MCU 8051 ca Atmel, h 68HC11 ca Motorola, h Z80MCU ca Zilog
6.1.2. Cu trc tng qut ca cc b vi iu khin

S khi tng qut ca mt b vi iu khin bao gm cc khi c bn nh trnh by trn hnh
6.1:
Reset
Reset
control
Clocking
Clock &
timing
Control
store
Input &
I/O
port
Power
monitoring
Processor
Power
Output
pins
RAM
Hnh 6.1: S khi tng qut ca mt b vi iu khin .
120
TI
T.
U
.V
Khi x l (Processor) ng vai tr quyt nh tt c cc hot ng ca cc b phn khc bn

trong vi iu khin.
B nh iu khin (Control store) thng l loi b nh ROM c dung lng vi KB cha cc
chng trnh iu khin.
B nh RAM thng c dung lng nh s dng cho vic khai bo cc bin trung gian, thng
thng cc thanh ghi ca vi iu khin cng nm trong phn b nh ny.
Khi to xung nhp v nh thi (Clock & timing) ng vai tr to xung nhp nh thi cc
hot ng ca h thng. Thng thng cc b vi iu khin tch hp sn b to xung nhp
bn trong, tn s hot ng ca h thng s c xc nh bng thch anh ni vo mch t
bn ngoi.
Khi iu khin reset c nhim v thit lp li cc trng thi ca h thng, cho php n bt
u hot ng tr li ging nh khi mi cp ngun.
Khi gim st ngun (power monitoring) cho php ton b chip hot ng ch ch
(standby) khi khng c yu cu iu khin vi cng sut rt nh. V cu trc vi iu khin cho
php thc hin mt h thng nh gn, nn n c s dng nhiu trong cc thit b iu khin
cm tay v di ng c ngun cung cp bng pin, vi khi gim st ngun vi iu khin c th
hot ng theo nh thi hoc ch khi c yu cu t bn ngoi.
Cc cng vo ra (I/O): thng thng vi iu khin c mt vi cng giao tip song song
giao tip iu khin cc thit b bn ngoi, i khi cc cng ny s dng nh cc Bus (d liu,
a ch v iu khin) ca mt b vi x l thng thng, cho cc h thng c yu cu m rng
v dung lng b nh cng nh cc cng vo ra. Ngoi cc cng vo ra song song, vi iu
khin cn c cc cng vo ra ni tip theo chun RS232 hoc IEEE448. Trong mt s b vi
iu khin cn tch hp c cc khi A/D v D/A, khi s c c cc ng vo ra cho cc
khi ny.
ED
PE
.P
6.1.3. M t phn cng cc b vi iu khin h msc-51

6.1.3.1.
Gii thiu chung
H IC vi iu khin MSC-51 c pht trin, ch to v bn th trng bi hng Intel. Cc
nh ch to IC khc nh Siemens ca c, Advanced Micro Devices, Fujitsu, Philips, Atmel
l cc nh cung cp nhng thit b h MCS-51 c cp giy php bn quyn th 2. 8051 l b vi
iu khin u tin c thng mi ho trn th trng, sau nhiu th h khc trong h ra i,
cc c tnh khc nhau ca mt s b vi iu khin trong h ny c m t trong bng sau:
Loi
8051
8031
8751
8052
8032
8752
8951
892051
B nh chng trnh
4K ROM
0K ROM
4K EPROM
8K ROM
0K ROM
8K EPROM
4K EEROM
2K EEROM
B nh d liu
128 byte
128 byte
128 byte
256byte
256byte
256byte
256 byte
128 byte
S timer
2
2
2
3
3
3
2
0
121

6.1.3.2.
Tng qut v phn cng 8051
S khi v chc nng cc khi
Cc b vi iu khin 8051, 8031, 8751, 8951 trong h MSC51 c chung mt s c tnh nh:
- 4 KB b nh loi ROM ghi cc chng trnh iu khin.
256 byte RAM bao gm c cc thanh ghi.
4 cng vo ra 8 bit.
2 b nh thi (timer) 16 bit.
Mt cng giao tip ni tip chun RS 232.
C th qun l c 64 KB b nh m rng cho chng trnh v 64 KB b nh m rng cho

d liu.
Mt b x l cc php ton logic c th thao tc trn tng bit.
210 bit RAM ni c a ch ho.
B nhn/chia 4 s.
PE
.P
TI
T.
ED
U
.V
Hnh 6.2: S khi cc b vi iu khin h MSC51.
Cu trc kt ni phn cng ca cc b vi iu khin trong h gn tng t nh nhau, mt s

khc bit gia chng cng c biu din trn s khi hnh 6.2.
Khi x l trung tm (CPU) nhn tn hiu xung nhp t b dao ng, tn s ra ca b to dao
ng s tu thuc vo tn s thch anh bn ngoi. Hu ht cc b vi iu khin trong h u c t
nht 128 byte RAM bn trong. Cc thanh ghi thng thng nm trong phn RAM. Ngoi 8031/32
cc vi iu khin cn li u c b nh ROM lu tr chng trnh iu khin. B nh ROM ny
c th l Mask-ROM ch lp trnh c bi nh sn xut, c th l EPROM hoc EEPROM c th
lp trnh li nhiu ln bi ngi s dng.
Cc b nh thi lp trnh c c th m theo xung cung cp t bn ngoi hoc xung chun
t b to dao ng, c b m ny c ng dng rt ph bin trong iu khin t ng.
122
.P
TI
T.
ED
U
.V
B iu khin Bus cung cp cc tn hiu iu khin giao tip vi bn ngoi, v kim sot hot
ng ca cc cng vo ra d liu song song. Hai trong bn cng vo ra song song (P0 v P2) c
th s dng lm cc Bus a ch v d liu trong ch giao tip b nh ngoi. Cng vo ra ni
tip c hai ng truyn v nhn d liu ni tip vi cc thit b khc.
B iu khin ngt tch hp trong chip cho php nhn hai yu cu ngt cung cp thng t bn
ngoi, hoc t cng ni tip v cc b nh thi bn trong.
Cc tn hiu ca 8051
8051 v 8951 u c 40 chn tn hiu ging nhau. Ngoi cc chn nhn cc ngun nui v cc
linh kin to dao ng, cc chn cn li hot ng ging nh cc ng vo ra. Tuy nhin, trong
c 24 chn c hai cng dng, mi ng ny c th hot ng nh ng xut nhp, hoc nh
ng iu khin, hoc l mt ng trong cc tn hiu ca BUS d liu v BUS a ch. Cc
cng vo ra song song thng c cu trc ci.
Cc thit k ca 8051 c th hai ch : ch ti thiu, hoc ch m rng b nh hoc
cc thnh phn khc. Mi cng 8 ng c th hot ng ging nh mt n v giao tip vi cc
thit b vo ra song song nh: my in, cc b bin i A/D, D/A , hoc mi ng c th iu
khin mt cch c lp c th giao tip vi cc thit b ch yu cu mt bit nh: cc cng tc,
cc LED, cc solenoid, ng m ng c. Vic giao tip theo tng bit, c th iu khin bng
cc lnh thao tc bit l mt im mnh ca cc b vi iu khin, so vi cc b vi x l thng
thng.
Cng 0: Cng 0 (cc chn 3239) l mt cng hai chc nng. Trong cc thit k ti thiu (khng
dng b nh m rng), n c chc nng nh cc ng I/O. i vi cc thit k m rng v b
nh, n l Bus a hp gia BUS a ch v BUS d liu.
Cng 1: Cng 1 (cc chn 18) l mt cng vo ra thng thng. Cc ng trong cng c k
hiu P1.0, P1.1, P1.2,. Cng1 khng c chc nng khc, v vy chng ch c dng cho giao
tip vi cc thit b ngoi.
Cng 2: Cng 2 (cc chn 2128): l mt cng c cng dng kp, n c dng nh cc ng
vo ra, hoc l byte cao ca BUS a ch i vi cc thit k dng b nh m rng.
Cng 3: Cng 3 (cc chn 1017): l mt cng cng dng kp. Cc ng ca cng ny c nhiu
chc nng. Ngoi cng dng nh cc ng vo ra thng thng, chng cn c cc cng dng
khc nh biu din bng sau:
Tn
RxD
TxD
INT0
INT1
T0
T1
WR
RD
PE
Bit
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
a ch bit
B0H
B1H
B2H
B3H
B4H
B5H
B6H
B7H
Chc nng
Nhn d liu cho cng ni tip.
Truyn d liu cho cng ni tip.
Nhn tn hiu yu cu ngt (0) t bn ngoi.
Nhn tn hiu yu cu ngt (1) t bn ngoi.
Ng vo bn ngoi cho Timer 0.
Ng vo bn ngoi cho Timer 1.
Tn hiu iu khin ghi cho b nh bn ngoi.
Tn hiu iu khin c cho b nh bn ngoi.
123
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8051 c 4 tn hiu iu khin

PSEN (Program Store Enable): PSEN (chn 29) l tn hiu ng ra, n l tn hiu iu khin
cho php b nh chng trnh m rng, trong h thng tn hiu ny thng c ni n chn OE
(Output Enable) ca mt EPROM, cho php c cc byte m lnh.
PSEN s mc thp trong thi gian ly m lnh. Cc m nh phn ca chng trnh, c c t
EPROM qua BUS d liu a vo thanh ghi lnh ca 8051 gii m. Khi thi hnh chng trnh
trong ROM ni (8051), PSEN s mc khng tch cc (mc cao).
ALE (Address Latch Enable): Tn hiu ra ALE (chn 30), c chc nng tng t nh trong cc
vi x l 8085, 8088, 8086, n c dng cho vic tch knh cc Bus a hp (a ch v d liu).
Trong cu hnh b nh m rng (tn hiu EA = 1), cng 0 va l BUS d liu va l byte thp ca
BUS a ch, ALE c s dng cht a ch vo mt b ci bn ngoi trong chu k xung nhp
u tin ca chu k truy cp b nh. Sau , cc ng cng 0 dng xut hoc nhp d liu
trong thi gian cn li ca chu k truy cp b nh.
Tn hiu ALE c tn s bng 1/6 ln tn s dao ng trn chip, n c th c dng lm ngun
xung nhp cho cc phn khc ca h thng. Nu xung nhp trn 8051 l 12 MHz, th ALE c tn
s 2 MHz, ch ngoi tr khi thi hnh lnh MOVX, mt xung ALE s b mt. Chn ny cng c
lm ng vo cho xung lp trnh cho EPROM trong 8051.
EA (External Access): Tn hiu vo EA (chn 31) thng c ni ln mc cao (+5V) hoc mc
thp (GND). Nu mc cao, 8051 thi hnh chng trnh t ROM ni trong khong a ch thp
(4K). Nu mc thp, chng trnh ch c thi hnh t b nh m rng. Khi dng 8031, EA
lun c ni mc thp v khng c b nh chng trnh trong chip. Nu EA c ni mc thp,
b nh bn trong chng trnh 8051 s b cm, v chng trnh thi hnh t EPROM m rng. EA
cn c dng lm ng vo cp in p 21V khi lp trnh cho EPROM trong 8051.
RST (Reset): Ng vo RST (chn 9) l ng reset ca 8051. Khi tn hiu ny c a ln mc
cao (trong t nht 2 chu k my), cc thanh ghi bn trong 8051 c np nhng gi tr thch hp
khi ng h thng. Sau khi Reset cc thanh ghi s c cc gi tr nh sau:
Cc thanh ghi
PE
PC
ACC
B
PSW
SP
DPTR
Cc n nh RAM khc
Gi tr sau khi Reset

0000
00
00
00
07
0000
0
Cc ng vo b dao ng trn chip (X1, X2):

Nh trong s khi, 8051 c mt b dao
ng trong chip. N thng c ni vi mt thch anh gia hai chn 18 v 19 cng vi cc t
in. Vi 8051 tn s thch anh c th t 3MHz 30 Mhz tu theo cng ngh ch to chip, tuy
nhin cc chip thng thng chy vi thch anh 12 MHz.
Cc chn ngun: 8051 hot ng vi ngun n +5V. VCC c ni vo chn 40 v VSS (GND)
c ni vo chn 20.
124
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T chc b nh ca 8051
Cc h thng vi x l thng thc hin vic phn bit cc vng nh ring cho d liu v
chng trnh, v vy trong my tnh thng thng chng trnh v d liu s c np t a vo
cc vng nh khc nhau ca RAM h thng. Cc b vi iu khin thc hin vic qun l b nh
theo mt cch khc.
8051 khng c a lu tr cc chng trnh, n c dung lng nh gii hn ngay bn trong
chip. Dung lng nh ny s c s dng ring r cho chng trnh v d liu. Tuy nhin chng
c th c m rng bn ngoi ln n ti a 64 Kbytes b nh chng trnh v 64 Kbytes b
nh d liu.
B nh RAM trn chip c s dng cho rt nhiu mc ch nh: phn lu tr a dng, phn
lu tr a ch ho tng bit, cc thanh ghi a nng v cc thanh ghi chc nng c bit. C hai c
tnh ni bt trong vi iu khin l: Cc thanh ghi v cc cng vo ra c bn ho trong b nh
RAM, chng c th truy cp ging nh cc nh bt k khc. Ngn xp cng nm b nh
RAM trong chip, m khng RAM ngoi nh cc h thng vi x l thng thng
M t v b nh RAM trong chip ca 8051
RAM bn trong 8051 m t trn hnh 6.3 bao gm: 4 tp thanh c a ch 00H ti 1FH, mi
tp c 8 thanh ghi c k hiu t R0 ti R7, vic i qua cc tp thanh ghi khc nhau c thc
hin bng hai bit ca thanh ghi trng thi. Vng nh a ch ho theo bit c a ch t 20H ti
2FH, vic truy cp cc bit ny theo cc a ch t 00 ti 7FH. Vng nh a dng t 30H ti 7FH.
V cc thanh ghi chc nng c bit t 80H ti FFH, mt s thanh ghi trong vng ny cng c
a ch ho theo bit.
RAM a dng: Ngoi 80 byte RAM a dng chim cc a ch t 30H7FH, 32 byte di cng t
00H n 1FH cng c th c dng vi mc ch tng t (mc d cc a ch ny c mc
ch khc).
Mi a ch trong vng RAM a dng u c th truy xut vi ch a ch trc tip hoc
gin tip. V d, c ni dung a ch 5FH ca RAM ni vo thanh ghi tch ly, c th dng
lnh sau:
MOV A, 5FH
Lnh ny di chuyn 1 byte d liu dng nh v a ch trc tip xc nh a ch ngun
(5FH). ch nhn d liu l thanh ghi tch ly A.
RAM ni cng c th c truy xut bng nh v a ch gin tip qua R0 hay R1. V d, hai
lnh sau thi hnh cng nhim v nh lnh trn:
MOV R0, #5FH
MOV A, @R0
Lnh u dng a ch tc thi di chuyn gi tr 5FH vo thanh ghi R0, v lnh th hai
dng a ch trc tip di chuyn d liu c tr bi R0 vo thanh ghi tch ly A.
RAM a ch ho tng bit: 8051 cha 210 bit c a ch ho, trong 128 bit l cc a ch
byte 20H n 2FH, v phn cn li l trong cc thanh ghi chc nng c bit.
c tnh truy xut tng bit ring r bng phn mm l mt c tnh tin li ca vi iu khin
ni chung. Cc bit c th c lp, xa, AND, OR,... bng mt lnh. a s cc vi x l i hi
mt chui lnh c-sa-ghi t c hiu qu tng t. Ngoi ra, cc cng vo ra cng c
a ch ho tng bit, lm n gin phn mm xut nhp tng bit.
C 128 bit c a ch ho a dng cc byte 20H n 2FH. Cc a ch ny c truy xut
theo byte hoc theo bit ph thuc vo loi lnh. V d, lp bit 67H, ta dng lnh sau:
SETB 67H
125
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Ch a ch bit 67H l bit c trng s ln nht (MSB) a ch byte 2CH. Lnh trn s
khng tc ng n cc bit khc a ch ny. cc vi x l cng vic tng t s phi thi hnh
nh sau:
MOV A, 2CH
; c c byte
ORL A, #10000000B
; set MSB
MOV 2CH,A
; ghi li c byte
SETB 67H
Hnh 6.3: Cu trc b nh RAM ca 8051.
Cc tp thanh ghi (register banks): 32 byte thp ca b nh ni l dnh cho cc tp thanh ghi.
Tp lnh ca 8051 cho php truy cp 8 thanh ghi (R0 n R7), v theo mc nh (sau khi reset h
thng) cc thanh ghi ny cc a ch 00H07H. Lnh sau y s c ni dung a ch 05H ca
RAM vo thanh ghi tch ly:
MOV A, R5
126
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y l lnh 1 byte dng nh v a ch trc tip thanh ghi. Tt nhin, cng vic trn cng c
th thc hin bng lnh 2 byte dng nh v a ch trc tip nm trong byte th hai:
MOV A, 05H
Cc lnh dng cc nh v trc tip thanh ghi (R0 n R7) s ngn hn v nhanh hn cc lnh
tng ng nhng dng nh v a ch trc tip. Cc d liu c s dng thng xuyn trong
chng trnh, nn dng mt trong cc thanh ghi ny.
Tp thanh ghi c th chuyn i, bng cch thay i cc bit chn tp thanh ghi trong t trng
thi (PSW). Gi s rng tp thanh ghi th 3 c chn, th lnh sau s ghi ni dung ca thanh ghi
tch ly vo a ch 18H:
MOV R0, A
tng dng cc tp thanh ghi s cho php chuyn hng chng trnh nhanh v hiu
qu, tng phn ca chng trnh s c mt b thanh ghi ring m khng ph thuc vo cc phn
cn li.
Cc thanh ghi chc nng c bit
Cc thanh ghi ni ca trong hu ht cc vi x l c truy xut ngm nh trong tp lnh. V
d lnh INC A s tng ni dung ca thanh ghi tch ly A ln 1. Tc ng ny c ngm nh
trong m lnh.
Cc thanh ghi trong 8051 l mt phn ca RAM ni. V vy mi thanh ghi s c mt a ch
ring (ngoi tr thanh ghi m chng trnh PC v thanh ghi lnh v cc thanh ghi ny t khi b
truy cp trc tip, nn chng khng c t trong RAM ni). y l l do gii thch ti sao 8051
c nhiu thanh ghi. Cng nh R0 n R7, 21 thanh ghi chc nng c bit (SFR: Special Function
Register) ca 8051 nm trong RAM ni t a ch 80H n FFH. Ch rng hu ht 128 a ch
t 80H n FFH khng c t tn, ch c 21 a ch SFR l mang tn cc thanh ghi.
Ngoi thanh ghi tch ly (A) c th c truy xut ngm nh, a s cc SFR c truy xut
bng ch a ch trc tip. Mt s SFR c th c a ch ho theo bit hoc theo byte. Ngi
lp trnh phi ch khi truy xut theo bit v theo byte.
V d lnh:
SETB 0E0H
S lp bit 0 trong thanh ghi tch ly, cc bit khc khng i. C th thy rng E0H ng thi
l a ch byte ca thanh ghi tch ly, v l a ch bit ca bit c trng s nh nht trong thanh ghi
tch ly. Nhng v lnh SETB ch tc ng trn bit, nn a ch bit s tc ng trong lnh.
T trng thi chng trnh (PSW: Program Status Word): nm a ch D0H cha cc bit trng
thi nh trong bng sau:
BIT
PSW.7
PSW.6
PSW.5
PSW.4
PSW.3
PSW.2
PSW.1
PSW.0
Tn
CY
AC
F0
RS1
RS0
OV
P
a ch
D7
D6
D5
D4
D3
D2
D1
D0
Chc nng
C nh.
C nh ph.
C Zero.
Chn tp thanh ghi.
Chn tp thanh ghi.
C trn.
D phng.
C chn l.
127

* C nh (CY): Thng thng c dng cho cc lnh s hc, n s c lp nu c mt s nh
sinh ra bi php cng, hoc c mt s mn bi php tr. V d, nu thanh ghi tch ly cha FFH
th lnh: ADD A, #1 s tr v thanh ghi tch ly kt qu 00H v lp c nh trong PSW (do kt qu
l 100H v thanh ghi A ch cha c 8 bit).
C nh cng c th xem nh mt thanh ghi 1 bit cho cc lnh x l bit. V d, lnh sau s
AND bit 25H vi c nh v kt qu nm trong c nh:
ANL C, 25H
* C nh ph (AC): Khi cng cc s BCD, c nh ph (AC) c lp nu kt qu ca 4 bit thp
trong khong 0AH n 0FH. Nu cc gi tr c cng l s BCD, th sau lnh cng cn hiu
PE
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chnh thp phn bng lnh DAA, cc kt qu ln hn 9 tr v tm t 0 9.

* C Zero (F0): l1 bit c c s dng trong nhiu chc nng, n c lp bng 1 khi kt qu
cc php tnh bng 0.
* Cc bit chn tp thanh ghi (RS0 v RS1): xc nh tp thanh ghi tch cc, chng c xa sau
khi reset h thng v c thay i bng phn mm nu cn. V d, ba lnh sau cho php truy cp
tp thanh ghi th 3, v di chuyn ni dung ca thanh ghi R7 (a ch byte 1FH) n thanh ghi tch
ly:
SETB RS1
SETB RS0
MOV A, R7
Khi chng trnh c hp dch, cc a ch bit ng c thay th cho cc k hiu RS1 v
RS0. Tc l, lnh SETB RS1 hon ton ging nh lnh SETB 0D4H.
* C trn (OV): c lp sau mt lnh cng hoc tr nu xy ra trn s hc. Khi cc s c du
c cng hoc tr vi nhau, phn mm c th kim tra bit ny xc nh di kt qu thch hp.
Khi cng cc s khng du th khng cn xt ti OV. Cc kt qu ln hn +127 hoc nh hn 128 s lp OV. V d, php cng sau b trn v bit OV c lp:
0FH + 7FH = 8EH tc l 15 +127 = 142.
Kt qu l mt s c du 8EH c xem nh -116, khng phi l kt qu ng (142), v vy
bit OV c lp, khi kim tra c OV chng ta c th hiu chnh li kt qu cho thch hp.
Thanh ghi B: nm a ch F0H c dng cng vi thanh ghi tch ly A trong cc lnh nhn v
chia. Lnh MUL AB, s nhn cc gi tr khng du 8 bit trong A v B, ri tr v kt qu 16 bit
trong A (byte thp) v B (byte cao). Lnh DIV AB s chia A cho B, ri tr v kt qu nguyn
trong A v phn d trong B. Thanh ghi B cng c th c xem nh mt thanh ghi a dng. N
c a ch ho theo bit (F0H n F7H).
Con tr ngn xp (SP): l mt thanh ghi 8 bit c a ch 81H, n cha a ch ca byte d liu
hin hnh trn nh ca ngn xp. Cc lnh trn ngn xp bao gm: ct d liu vo ngn xp v
ly d liu ra khi ngn xp. Lnh ct d liu vo ngn xp s lm tng SP, v lnh ly d liu ra
khi ngn xp s gim SP. Ngn xp ca 8051 c gi trong RAM ni, v c gii hn cc a
ch c th truy xut bng a ch gin tip. Chng l 128 byte u ca 8051, lnh sau s khi ng
li SP nh ngn xp bt u ti 60H:
MOV SP, #5FH
Sau lnh trn ngn xp ca 8051 b gii hn trong 32 byte, v a ch cao nht ca RAM trn
chip l 7FH. Gi tr 5FH c dng v SP s tng ln 60H trc khi ct byte d liu u tin.
Khi ngi s dng khng khi ng li con tr ngn xp, th SP ly gi tr mc nh l 07H
sau khi reset h thng, v kt qu l ngn u tin ct d liu c a ch l 08H. Khi cc tp
128
PE
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thanh ghi 1 (c th c 2 v 3) s khng dng c v vng RAM ny c s dng lm ngn

xp.
Ngn xp c truy xut trc tip bng cc lnh PUSH v POP lu tr tm thi v ly li
d liu, hoc c truy xut ngm bng cc lnh gi chng trnh con (ACALL, LCALL) hay cc
lnh tr v (RET, RETI) ct v ly li b m chng trnh.
Thanh ghi con tr d liu (DPTR data pointer register): c dng truy xut b nh ngoi,
n l mt thanh ghi 16 bit c a ch 82H (DPL: byte thp) v 83H (DPH: byte cao). Ba lnh sau
s ghi 55H vo RAM ngoi a ch 1000H:
MOV A, #55H
MOV DPTR, #1000H
MOVX @DPTR, A
Lnh u tin dng nh v tc thi np d liu 55H vo thanh ghi A. Lnh th hai cng
dng nh v tc thi, ln ny np d liu 16 bit (1000H) vo con tr d liu. Lnh th ba dng
nh v gin tip di chuyn d liu trong A (55H) n RAM ngoi c a ch cha trong DPTR
(1000H).
Cc thanh ghi cng vo ra: Cc cng ca 8051 bao gm cng 0 a ch 80H, cng 1 a ch
90H, cng 2 a ch A0H v cng 3 a ch B0H. Tt c cc cng u c a ch ho tng
bit. iu cung cp mt kh nng giao tip thun li theo bit. V d nu mt ng c c ni
qua mt cun dy c transistor li n bit 7 ca Cng 1, n c th c bt v tt bng mt lnh:
SETB
P1.7 ; bt motor
CLR
P1.7 ; tt motor
Du chm trong lnh xc nh mt bit trong cng. Trnh hp dch s thc hin vic chuyn
i ra a ch tng ng ca bit , v d hai lnh sau thc hin cng mt cng vic:
CLR
P1.7
CLR
97H
Xt mt v d khc, giao tip n mt thit b vi mt bit trng thi gi l BUSY, c lp khi
thit b ang bn v c xa khi thit b sn sng. Nu BUSY c ni ti P1.5, vng lp sau
s c dng ch thit b tr li trng thi sn sng:
WAIT: JB P1.5, WAIT
Lnh ny c ngha l nu bit P1.5 c lp th nhy ti nhn WAIT. Ni cch khc quay tr
li v kim tra ln na.
Cc thanh ghi ca b nh thi (timer): 8051 c hai b nh thi/m 16 bit c dng cho vic
nh thi hoc m s kin. Timer 0 c a ch 8AH (TL0: byte thp) v 8CH (TH0: byte cao).
Timer 1 c a ch 8BH (TL1: byte thp) v 8DH (TH1: byte cao). Vic thit lp hot ng cc
timer c thc hin bng cch np cc gi tr thch hp cho thanh ghi ch Timer (TMOD Timer Mode) a ch 89H, v thanh ghi iu khin timer (TCON Timer Control) a ch
88H. Ch c TCON c a ch ho tng bit.
Cc thanh ghi cng ni tip: 8051 c mt cng ni tip trong chip dnh cho vic trao i thng
tin vi cc thit b ni tip nh my tnh, modem hoc vi cc IC khc c giao tip ni tip (cc
b chuyn i A/D, cc thanh ghi dch...). Mt thanh ghi gi l b m d liu ni tip (SBUF)
a ch 99H s gi c hai d liu truyn v nhn. Khi truyn d liu th ghi ln SBUF, khi nhn d
liu th c SBUF. Cc ch hot ng khc nhau c lp trnh qua thanh ghi iu khin cng
ni tip (SCON) c a ch ho tng bit c a ch 98H.
Cc thanh ghi ngt: 8051 c cu trc iu khin ngt, cho php 5 ngun yu cu ngt, vi 2 mc
u tin. Cc ngt b cm sau khi reset h thng, v s c cho php bng vic ghi d liu vo
thanh ghi cho php ngt (IE) a ch A8H. C hai thanh ghi c a ch ho tng bit.
129

Thanh ghi iu khin cng sut: Thanh ghi iu khin cng sut (PCON) a ch 87H bao
gm nhiu bit iu khin. ngha ca chng c tm tt trong bng sau:
6
5
4
3
2
1
GF1
GF0
PD
IDL
Chc nng
Khi lp cho php tng gp i tc baud cng ni tip.
Khng nh ngha.
Khng nh ngha.
Khng nh ngha.
C a dng 1.
C a dng 0.
Khi lp cho php 8051 hot ng trong ch gim
ngun (Power down).
Khi lp cho php 8051 hot ng trong ch ri (Idle).
Tn k hiu
SMOD
U
.V
BIT
7
GIAO TIP VI B NH NGOI CHO VI IU KHIN 8051
PE
6.2.
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TI
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Trong ch ri CPU s khng thc hin mt lnh no khc. Lnh lp bit IDL l lnh cui
cng m CPU thc hin trc khi chuyn qua ch ri. Trong ch ri ngun xung nhp bn
trong s b ct khng cung cp ti CPU, nhng vn cung cp ti b iu khin ngt, cc b nh
thi v cng ni tip. Trng thi hin ti ca CPU v cc thanh ghi s c gi nguyn, cc cng
vo ra cng c duy tr mc logic hin ti. ALE v PSEN c gi mc cao. Ch ri s kt
thc khi c yu cu ngt (c cho php), bit IDL s c xo.
Tng t nh ch ri, lnh lp bit PD s l lnh cui cng m CPU thc hin trc khi
chuyn qua ch gim ngun. Trong ch gim ngun, b dao ng to xung nhp s ngng
hot ng, iu ny lm tt c cc khi chc nng bn trong ngng hot ng. Ni dung ca Ram
ni s c gi nguyn, mc logic ca cc cng cng c gi nguyn v ALE v PSEN s c
gi mc thp. Ch ny ch c thot khi khi reset h thng. Trong ch gim ngun,
ngun cung cp Vcc c th gim xung 2V. Ch khng c gim ngun xung 2V trc khi
chuyn qua ch gim ngun, v phi phc hi li Vcc = 5V sau 10 chu k xung nhp trc khi
tn hiu RST quay v mc thp tr li.
8051 c kh nng m rng thm 64K b nh chng trnh v 64K b nh d liu bn ngoi,
do h thng 8051 c th dng thm ROM v RAM nu cn. Cng c th s dng chc nng
m rng dung lng b nh, tng thm dung lng cng vo ra, lc ny cc cng vo ra s
c truy cp ging nh cc nh m rng.
Khi s dng b nh ngoi, cng 0 khng cn l mt cng vo ra na. N c ghp knh gia
phn thp ca BUS a ch (A0A7), v BUS d liu (D0D7). Tn hiu ALE s tc ng mc
cao khi bt u mi chu k truy cp b nh cht byte thp ca a ch. Cng 2 thng thng
c dng cho byte cao ca BUS a ch.
Trong na u ca mi chu k truy cp b nh, byte thp ca a ch c cp ra cng 0 v
c cht bng xung ALE. C th s dng mt IC cht 74HC373 (hoc tng ng) gi byte
a ch thp trong phn cn li ca chu k truy cp b nh. Trong na sau ca chu k b nh cng
0 c dng nh BUS d liu, chiu truyn d liu trn n s ty theo lnh.
130
U
.V
6.2.1. Truy xut b nh chng trnh ngoi

B nh chng trnh ngoi l mt b nh ROM c cho php bi tn hiu PSEN. Hnh 6.4
m t mt v d v cch ni mt EPROM vo 8051:
S1
P1
P2
P1
P2
P1
S5
P2
P1
P2
.P
PSEN
P1
S6
S1
P2
P1
P2
PCH
PCH (Program counter high byte)
Port 0
P2
S4
TI
ALE
Port 2
P1
S3
T.
CK
S2
ED
Hnh 6.4: Kt ni vi b nh ROM chng trnh bn ngoi trong h thng 8051.
Opcode
PCL
Byte 2
PE
PCL
Hnh 6.5: Gin thi gian truy cp b nh chng trnh ngoi.
Mt chu k my ca 8051 gm 12 chu k xung nhp, nu ng vo b dao ng ni l thch
anh 12 MHz, th mt chu k my ko di 1 s. Trong mt chu k my s c hai xung ALE, v hai

byte c c t b nh chng trnh (nu lnh hin hnh l lnh 1 byte th byte th hai s c
loi b). Gin thi gian ca mt ln ly lnh c trnh by trn hnh 6.5.
6.2.2. Truy xut b nh d liu ngoi

B nh d liu ngoi l mt b nh RAM c cho php ghi/c bng cc tn hiu WR\ v
RD\ (P3.6 v P3.7). Vic truy xut b nh d liu ngoi c th thc hin vi lnh MOVX, dng
con tr d liu (DPTR), hoc R0 v R1 lm thanh ghi a ch.
Kt ni BUS a ch v BUS d liu gia RAM v 8051 cng ging nh EPROM, do cng
c th m rng b nh RAM ln n 64Kbyte. Tn hiu yu cu c RD\ ca 8051 c ni ti
131

chn cho php xut (OE) ca RAM, v tn hiu yu cu ghi WR\ c ni ti chn cho php ghi
(WE) ca RAM nh trn hnh 6.7.
S1
S2
S3
S4
S5
S6
S1
S2
S3
S4
S5
S6
ALE
PSEN
Port 2
PCH
Port 0
DPH (Data pointer high byte)

Opcode
DPL
Data in
ED
PCL
U
.V
RD
Hnh 6.6: Gin thi gian truy cp b nh d liu ngoi.
PE
.P
TI
T.
Gin thi gian cho lnh c b nh d liu ngoi biu din trn hnh 6.6 vi lnh c
(MOVX A, @DPTR).
Hnh 6.7: Kt ni b nh RAM cha d liu bn ngoi trong h thng 8051.

Gin thi gian cho lnh ghi (MOVX @DPTR, A) cng tng t ch khc ng WR\ s
thay vo ng RD\, v d liu c xut ra trn P0, trong chu k ghi RD\ gi mc cao.
Bng ch a ch gin tip thanh ghi s dng R0 v R1, cng c th truy cp b nh ngoi
theo cu hnh phn trang. Trong ch ny cng 2 c truy cp ging nh mt cng vo ra
thng thng. Cng 0 vn c s dng lm Bus a hp (cung cp 8 bit a ch trong na chu k
u, sau s dng lm Bus d liu). Nh vy cc a ch cung cp t cng 0 cho php truy cp
256 byte nh mi trang, vic chn trang c th s dng cc bit mt cng khc. Hnh 6.8 m t s
ghp ni 8051 vi dung lng RAM 1KB truy cp theo cch phn trang, vi cc trang c
chn bng P2.0 v P2.1.
132

8051
Port 0
D0 D7
Q
A0 A7
ALE
EPROM
74HC373
A8
A9
P2.0
P2.1
OE
U
.V
RD
WR
EA
WE
NC
PSEN
CS
T.
ED
Hnh 6.8: Truy cp b nh ngoi theo cu trc trang.
PSEN
D0 D7
RD
OE
TI
WR
A0 A12
.P
A0 A12
OE
WE
A0 A12
A0 A12
CS
CS
CS
CS
CS
A15
CS
D0 D7
A14
PE
A13
C
B
VCC
0
1
2
3
G1
G2A
G2B
Chn mch cho cc b

nh khc
Hnh 6.9: Gii m a ch trong h thng c nhiu b nh ngoi.

Khi cc bit P2.0 v P2.1 c thit lp chn mt trong 4 trang, th lnh MOVX s c hoc
ghi d liu trong trang . V d vi s hnh 6.8, nu P2.0 = P2.1 = 0 th cc lnh sau s c d
liu trong nh 0050H ca RAM vo thanh ghi cha:
MOV R0,#50H
MOVX A,@R0
133
c c a ch 3FFH ca RAM th hai bit chn trang cn c lp ln 1, cc lnh sau c

th s dng:
SETB P2.0
SETB P2.1
MOV R0,#0FFH
MOV A,@R0.
Gii m a ch: Nu cn s dng nhiu EPROM v/hoc nhiu RAM bn ngoi, th cn phi
gii m a ch. Mch gii m cng tng t nh cc h vi x l khc. V d trn hnh 6.9, m t
mt h thng vi nhiu b nh EPROM 2764 (8 KB) cho chng trnh, v nhiu b nh RAM
6264 (8KB) cho d liu.
ED
U
.V
6.2.3. B nh ngoi s dng chung cho chng trnh v d liu

V b nh chng trnh l ROM, nn ny sinh mt vn bt tin khi pht trin phn mm
cho 8051. l lm cch no phn mm c th sa i chng trnh v ghi tr li khi n c
cha trong b nh ch c. Cch gii quyt l s dng chung mt vng nh RAM cho c
chng trnh v d liu. iu ny c th thc hin bng cch ni ng OE ca RAM vo mt
mch logic AND ca PSEN v RD nh m t trn hnh 6.10. Lc ny mt chng trnh c th
c np vo RAM bng cch ghi RAM nh b nh d liu, v thc hin bng cch truy xut
RAM nh b nh chng trnh.
WR
RD
TI
Psen
T.
RAM
.P
Hnh 6.10: S dng b nh ngoi chung cho chng trnh v d liu.
PE
6.3.
HOT NG CA B NH THI (TIMER)
6.3.1. Gii thiu
Hnh 6.11: Cu to b nh thi.
134
a ch
88H
89H
8AH
8BH
8CH
8DH
TI
T.
Chc nng
iu khin
Ch
Byte thp ca timer 0
Byte thp ca timer 1
Byte cao ca timer 0
Byte cao ca timer 1
a ch theo bit
C
Khng
Khng
Khng
Khng
Khng
.P
SFR
TCON
TMOD
TL0
TL1
TH0
TH1
ED
U
.V
B nh thi bn trong vi iu khin l mt b m c to thnh t mt chui cc flip-flop

ni tip vi nhau, mi flip-flop l mt b chia 2. Ng vo ca Timer l ngun xung nhp. Ng ra
ca tng cui lm xung nhp cho flip-flop bo trn ca timer (cn gi l c ca timer), c s c
kim tra bng phn mm, hoc to ra ngt (hnh 6.11). Gi tr nh phn trong cc flip-flop ca
timer thay i nh trong mt b m nh phn, n s dng cho vic m s xung clock trong chip
(hoc cc s kin) t thi im timer c khi ng. V d timer 16 bit s m ln t 0000H n
FFFFH, v c bo trn s ln 1 khi s m trn t FFFFH n 0000H. 8051 c hai timer 16 bit,
mi timer c bn ch lm vic. Cc timer c s dng : nh khong thi gian, m s kin
hoc to tc baud cho cng ni tip trong 8051.
Trong cc ng dng nh khong thi gian, cc timer c lp trnh m trong mt khong
nht nh v lp c trn thng bo. C s c chng trnh kim tra, nh thi thc hin
mt tc ng nh: kim tra trng thi ca cc ng vo hoc tc ng cc ng ra. Mt s ng dng
khc c th s dng timer to xung nhp o khong thi gia hai s kin (v d: o rng
xung).
m s kin dng xc nh s ln xy ra ca mt s kin. Mt s kin c th l tc ng
ngoi no lm chuyn trng thi mt ng vo ca 8051. Cc timer cng c th cung cp xung
nhp xc nh tc baud cho cng ni tip trong 8051.
Vic truy xut cc timer ca 8051 s dng su thanh ghi chc nng c bit trong bng sau:
Thanh ghi ch ca timer (TMOD)

Thanh ghi TMOD cha hai nhm 4 bit dng t ch lm vic cho Timer 0 v Timer 1
nh m t trong bng sau:
Tn
GATE
C/T
M1
M0
GATE
C/T
M1
M0
PE
BIT
7
6
5
4
3
2
1
0
Timer
1
1
1
1
0
0
0
0
Chc nng
Khi =1 timer ch chy khi INT1 mc cao.
1: m s kin bn ngoi; 0: nh khong thi gian
bit nh ch cho timer 1.
Bit cng cho timer 0
Bit chn counter/timer cho timer 0
Bn ch ca mi timer s c chn tu theo gi tr khi ng cho cc bit M1 v M0

tng ng ca n nh m t trong bng sau:
135

M0
0
1
0
1
Ch
0
1
2
3
Chc nng
Ch nh thi 13 bit.
Ch nh thi 16 bit.
Ch t ng np li 8 bit.
Ch nh thi tch bit:
Timer 0: TL0 l b nh thi 8 bit iu khin bi ch ca
timer 0. TH0 tng t nhng c iu khin bi ch ca
timer 1.
Timer 1: ngng hot ng.
M1
0
0
1
1
a ch
8FH
TR1
8EH
5
4
3
TF0
TR0
IE1
8DH
8CH
8BH
IT1
.P
8AH
N
IE0
IT0
PE
1
0
Chc nng
C bo trn ca timer 1, c lp bi phn cng khi xy ra
trn; c xo bng phn mm hoc phn cng khi phc v
chng trnh ngt.
Bit iu khin chy ca timer 1. c lp xo bng phn
mm iu khin timer1 on/off.
C bo trn cho timer 0.
Bit iu khin chy cho timer 0.
Cho php ngt INT1: c lp bng phn cng khi c cnh
xung ng vo INT1; c xo bng phn mm hoc phn
cng khi ph v ngt.
Chn kiu tc ng ngt INT1: c lp xo bng phn mm
chn kiu tc ng ngt bng cnh xung hoc bng mc
thp.
Cho php ngt INT0.
Chn kiu ngt cho INT0.
T.
Tn
TF1
TI
BIT
7
ED
U
.V
Thanh ghi TMOD khng c a ch ho theo bit. Thng thng gi tr ca n c np mt

ln khi bt u chng trnh, khi ng ch ca cc timer. Sau cc timer c th cho bt
u hot ng hoc ngng li bng cch truy cp cc thanh ghi c bit khc ca timer.
Thanh ghi iu khin timer (TCON)
Thanh ghi TCON cha cc bit trng thi v cc bit iu khin cho Timer 0 v Timer 1 nh m
t trong bng sau:
89H
88H
Bn bit thp ca TCON khng s dng cho cc timer, chng c s dng pht hin v
khi ng kiu tc ng cho cc ngt bn ngoi.
6.3.2. Cc ch timer v c bo trn

Cc timer 0 v 1 c cc ch hot ng tng ng nhau, nn trong phn ny ch s x
c s dng ch th cho mt timer bt k. V d THx c th ch th cho TH0 hoc TH1.
Ch 0 (mode 0) - ch timer 13 bit: Ch ny c thc hin tng thch vi 8048 (b vi
iu khin c trc 8051). Hot ng ca ch ny biu din trn hnh 6.10a. 5 bit thp ca TLx
cng vi THx s to thnh b nh thi 13 bit, 3 bit cao ca TLx khng s dng.
Ch 1 ch timer 16 bit: Ch ny tng t nh ch 0, ngoi tr vic cc timer hot
ng y 16 bit (hnh 6.10b). Khi nhn c xung nhp b m s m ln t 0000H, v c
136
Timer
Clock
TLx
(5 bit)
ED
U
.V
trn s bo khi b m chuyn trng thi t FFFFH v 0000H, sau b m vn tip tc m.

C bo trn l bit TFx trong TCON c th c hoc ghi bng phn mm.
Ch MSB b m l bit 7 ca THx v LSB l bit 0 ca TLx. Cc thanh ghi timer (TLx/THx) c
th c c hoc ghi bt c lc no bng phn mm.
Ch 2 - ch t ng np li 8 bit: trong ch ny TLx hot ng nh mt timer 8 bit, cn
THx vn gi nguyn gi tr cn np li. Khi s m trn t FFH n 00H, khng nhng c timer
c lp m gi tr trong THx ng thi c np vo TLx, vic m c thc hin lin tc t
gi tr trong THx ln n FFH xung 00H v np li. Ch ny rt thng dng v s trn timer
xy ra trong nhng khong thi gian nht nh v tun hon mt khi khi ng TMOD v
THx.
Ch 3 - ch timer tch bit: trong ch ny timer 0 tch thnh hai timer 8 bit. (TL0 v
TH0), TL0 c c bo trn l TF0 v TH0 c c bo trn l TF1. Timer 1 khng hot ng ch
3, nhng c th c khi ng bng cch chuyn sang ch khc. Gii hn duy nht l c
bo trn TF1 khng cn b tc ng khi timer 1 b trn v n c ni ti TH0.
Khi timer 0 ch 3, c th cho timer 1 chy v ngng bng cch chuyn n ra ngoi v vo
ch 3. N vn c th c s dng bi cng ni tip to tc baud, hoc n c th c
s dng cho cc ng dng khc khi khng cn ngt (v n khng cn c ni vi TF1).
THx
(8 bit)
TFx
T.
a) Mode 0
Timer
Clock
TFx
TI
N
PE
O
Timer
Clock
THx
(8 bit)
TLx
(8 bit)
.P
Timer
Clock
TLx
(5 bit)
TFx
Np li
THx
(5 bit)
c) Mode 2
TLx
(5 bit)
THx
(8 bit)
Timer
Clock
TL0
(8 bit)
TF0
Timer
Clock
TH0
(8 bit)
TF1
d) Mode 3
Hnh 6.12: Cc ch ng hot ng ca cc timer
6.3.3. Ngun to xung nhp

C th s dng hai ngun to xung nhp cung cp cho cc timer. Chng c chn bng cch
ghi vo bit C/T (counter/timer) trong TMOD. Mt ngun to xung nhp dng cho nh khong
thi gian, ci khc cho m s kin.
137
ED
U
.V
nh khong thi gian (interval timing): Nu C/T = 0, hot ng timer lin tc c chn v
timer c dng cho vic nh khong thi gian. Lc , timer ly xung nhp t b dao ng
trong chip. Xung nhp ng ra b to dao ng c gim tn s bng b chia 12 trc khi cp vo
timer thch hp cho phn ln cc ng dng. Nh vy vi thch anh 12 MHz, th tc xung
nhp cung cp cho timer s l1 MHz. Bo trn timer xy ra sau mt s (c nh) xung nhp, tu
thuc vo gi tr ban u c np vo cc thanh ghi timer TLx/THx.
m s kin (Event counting): Nu C/T = 1, timer ly xung nhp t ngun bn ngoi. Trong hu
ht cc ng dng, ngun bn ngoi ny cung cp cho timer mt xung khi xy ra mt s kin
timer dng m s kin. S s kin c xc nh bng phn mm bng cch c cc thanh ghi
TLx/THx, v gi tr 16 bit trong cc thanh ghi ny tng thm 1 cho mi s kin.
Ngun xung nhp ngoi c cung cp bng cc chn cng 3. Bit 4 ca cng 3 (P3.4) dng lm
ng vo to xung nhp bn ngoi cho Timer 0 v c gi l T0, cn P3.5 hay T1 l ng vo
to xung nhp cho Timer 1.
Trong cc ng dng m, cc thanh ghi timer c tng thm 1 tng ng vi s chuyn
trng thi logic t 1 xung 0 ng vo bn ngoi (Tx). Ng vo bn ngoi c ly mu trong
S5P2 ca mi chu k my. Nh vy, khi ng vo cao trong mt chu k v thp trong mt chu k
k th s m c tng thm 1. Gi tr mi xut hin trong cc thanh ghi trong S3P1 ca chu k
B to dao ng
ni
T.
theo sau chu k pht hin s chuyn trng thi. Do cn 2 chu k my (2 s) ghi nhn mt s
chuyn trng thi1 sang 0, tn s ngoi ti a l 500 KHz (gi s h thng hot ng 12 MHz).
12
TI
Tx
Timer
Clock
.P
C/T
Hnh 6.13: S cung cp xung nhp cho timer
PE
6.3.4. Cho chy, dng v iu khin cc timer

Hnh 6.12 m t cc cu hnh khc nhau cho cc thanh ghi TLx, THx v TFx ca timer. Hai
ngun xung nhp c th cung cp cho timer nh trn hnh 6.13. Phng php n gin nht bt
u (cho chy) v dng cc timer l dng cc bit iu khin chy (TRx) trong TCON. TRx b xa
sau khi reset h thng, nh vy cc timer theo mc nh l b cm (b dng) sau khi reset. TRx
c t ln 1 bng phn mm cho cc timer chy.
V TRx trong thanh ghi TCON c a ch theo bit, nn vic cho chy v dng timer c th
thc hin d dng trong chng trnh. V d, cho timer 0 chy bng lnh:
SETB TR0
V dng bng lnh: CLR TR0
Trnh hp dch s thc hin vic chuyn i k hiu cn thit t TR0 sang a ch bit tng
ng ca n. Lnh SETB TR0 s ging nh SETB 8CH.
Mt cch khc iu khin cc timer l dng bit GATE trong TMOD v ng vo bn ngoi
INTx. t GATE = 1 cho php timer s c iu khin bng INTx, cch ny hu dng cho vic
o rng xung. V d o rng ca xung ng vo INT0 c th thc hin nh sau: Khi
138

ng Timer 0 ch 2 (ch timer 16 bit), vi TL0/TH0 = 0000H, GATE = 1 v TR0 = 1.
Khi INT0 mc cao, timer c m cng cp xung nhp 1 MHz (nu 8051 hot ng tn s
B to dao
ng
12 MHz). Khi INT0 xung thp, timer b ng cng v thi khong ca xung tnh bng s l s
m c trong TL0/TH0. (C th lp trnh INT0 to ra mt ngt khi n xung thp).
Hnh 6.14 minh ha Timer 1 hot ng ch 1 nh mt timer 16 bit. S ch cc kh
nng iu khin vic cp ngun to xung nhp cho timer.
12
TL1 TH1
TF1
U
.V
T1
C/T
ED
TR1
Gate
T.
INT1
TI
Hnh 6.14: S iu khin hot ng ca Timer 1 trong ch 1
PE
.P
6.3.5. Khi ng v truy xut cc thanh ghi timer

Thng thng cc thanh ghi c khi ng mt ln u chng trnh t ch lm
vic cn thit. Sau trong thn chng trnh, cc timer c cho chy, dng, cc bit c c
kim tra v xa, cc thanh ghi timer c c v cp nht , theo yu cu ca cc ng dng.
TMOD l thanh ghi u tin c khi ng, v n t ch hot ng cho timer. V d cc
lnh sau khi ng Timer 1 ch 1 c xung nhp cung cp t b dao ng ni cho vic nh
khong thi gian:
MOV TMOD, #00010000B
Lnh trn t M1 = 0 v M0 = 1 cho ch 1, C/T = 0 v GATE = 0 cho xung nhp ni, v
xa cc bit ch ca timer 0. Timer tht s khng bt u nh thi cho n khi bit iu khin
chy TR1 c t ln 1.
Nu cn s m ban u, cc thanh ghi timer TL1/TH1 cng phi c khi ng. V cc
timer m ln v t c bo trn khi c s chuyn tip FFFFH sang 0000H. Mt khong 100 s
c th c nh thi bng cch khi ng tr cho TL1/TH1 l FF9CH:
MOV TL1, #9CH
MOV TH1, #0FFH
Sau cho chy timer bng cch t bit iu khin chy bng lnh:
SETB TR1
C bo trn c t ng t ln 1 sau 100 s. Phn mm c th i trong 100 s bng cch
dng lnh r nhnh c iu kin nhy n chnh n, trong khi c bo trn cha c t ln 1:
WAIT:
JNB TF1, WAIT
139
6.4.
HOT NG CNG NI TIP
U
.V
Khi timer trn, cn dng timer v xa c bo trn trong phn mm c th dng cc lnh nh:
CLR TR1
CLR TF1.
c timer ang chy: Trong mt s ng dng cn c gi tr trong cc thanh ghi timer khi n
ang chy. V phi c hai thanh ghi timer, sai pha c th xy ra nu byte thp trn vo byte cao
gia hai ln c. Gi tr c th c c khng ng. Gii php l c byte cao trc, k c
byte thp ri c byte cao li mt ln na. Nu byte cao thay i th lp li cc hot ng c.
Cc lnh di y c ni dung ca cc thanh ghi timer TL1/TH1 vo cc thanh ghi R6/R7:
AGAIN: MOV A, TH1
MOV R6, TL1
CJNZ A, TH1, AGAIN
MOV R7, A
PE
.P
TI
T.
ED
6.4.1. Gii thiu

8051 c mt cng ni tip trong chip c th hot ng nhiu ch , trn mt di tn s
rng. Chc nng ch yu ca cng ni tip l thc hin chuyn i song song sang ni tip i
vi d liu xut, v chuyn i ni tip sang song song vi d liu nhp.
Vc truy xut phn cng qua cng ni tip c thc hin bng cc chn TXD v RXD. Cc
chn ny l hai bit ca cng 3, P3.1 (TXD) v P3.0 (RXD).
Cng ni tip cho php hot ng song cng (full duplex), v b m thu (receiver buffering)
cho php mt k t s thu gi trong b m, trong khi k t th hai c nhn. Nu CPU c
k t th nht trc khi k t th hai c thu y , th d liu s khng b mt.
Hai thanh ghi chc nng c bit cho php phn mm truy xut n cng ni tip l: SBUF v
SCON. B m cng ni tip (SBUF) c a ch 99H thc cht bao gm hai b m. D liu ghi
vo SBUF s c truyn ra thit b bn ngoi, v c SBUF truy xut d liu thu c. y
l hai thanh ghi ring bit (mt thanh ghi ch ghi pht v mt thanh ghi ch c thu).
Thanh ghi iu khin cng ni tip (SCON) c a ch 98H l thanh ghi a ch ho theo bit,
n cha cc bit trng thi v cc bit iu khin. Cc bit iu khin cho php thit lp cc ch
hot ng cho cng ni tip, v cc bit trng thi ch th vic kt thc pht hoc thu k t. Cc bit
trng thi c th c kim tra bng phn mm hoc c th c lp trnh to ngt.
Tn s lm vic ca cng ni tip, cn gi l tc baud c th c nh (ly t b dao ng
trn chip). Khi mun tc baud thay i, cn lp trnh Timer 1.
6.4.2. Thanh ghi iu khin cng ni tip

Ch hot ng ca cng ni tip c thit lp bng cch ghi d liu vo thanh ghi iu
khin cng ni tip (SCON). ngha cc bit ca SCON c m t trong bng sau:
Bit
7
6
5
K hiu
SM0
SM1
SM2
a ch
9FH
9EH
9DH
Chc nng
Bit chn ch .
Bit chn ch .
Bit chn ch , cho php truyn thng tin trong ch a x l
trong ch 2 v 3; RI s khng tc ng nu nhn c bit th
9 bng 0.
140

REN
TB8
9CH
9BH
2
1
RB8
TI
9AH
99H
RI
98H
Cn c lp cho php nhn d liu.

Khi c lp bit th 9 s c truyn trong ch 3; bit ny c
th lp xo bng phn mm.
Khi c lp, bit th 9 s c nhn.
c lp khi kt thc truyn 1 byte d liu, bit ny c th xo
bng phn mm.
c lp khi nhn xong mt byte d liu, c th xo bng phn
mm.
4
3
SM1
0
1
0
1
Ch
0
1
2
3
Chc nng
Thanh ghi dch.
8bit UART
9bit UART
9bit UART
Tc baud
C nh (tn s dao ng/12).
Thay i (theo gi tr ca timer).
C nh (tn s dao ng/12 hoc 64.
Thay i (theo gi tr ca timer).
ED
SM0
0
0
1
1
U
.V
Cc ch truyn cng ni tip vi thit b bn ngoi c nh ngha bng cc bit SM1 v

SM0 nh m t trong bng sau:
T.
Trc khi s dng cng ni tip, phi khi ng SCON chn ch thch hp. V d,
lnh: MOV SCON, #01010010B s khi ng cng ni tip ch 1 (SM0/SM1 = 0/1), cho
php b thu (REN=1) v t c ngt pht (TI=1) ch b pht sn sng hot ng.
PE
.P
TI
6.4.3. Cc ch hot ng
Cng ni tip c 4 ch hot ng, c th chn c bng cch lp trnh cho cc bit SM0 v
SM1 trong SCON. C ba ch cho php truyn cn ng b (UART), trong ch ny, mi k
t c thu (nhn) hoc pht, u nm trong mt khung c mt bit start v 1 bit stop. ch 0,
cng ni tip hot ng nh mt thanh ghi dch thng thng.
Ch 0: (Thanh ghi dch 8 bit): Ch 0 c chn bng cch ghi SM1 v SM0 ca SCON
bng 0. Trong ch ny, cng ni tip hot ng ging nh mt thanh ghi dch 8 bit. D liu ni
tip vo v ra qua RXD v TXD theo xung nhp, 8 bit c pht hoc thu vi bit u tin l LSB.
Tc baud c nh 1/12 tn s dao ng trn chip.
Vic pht c khi ng bng mt lnh ghi d liu vo SBUF. D liu c dch ra ngoi
trn ng RXD (P3.0), vi cc xung nhp dch c gi ra ng TXD (P3.1). Mi bit c
pht i (trn RXD) trong mt chu k my. Trong mi chu k my, tn hiu xung nhp dch xung
thp S3P1 v tr v mc cao S6P1. nh thi d liu pht biu din trn hnh 6.15a.
Vic thu c khi ng khi bit cho php b thu (REN) l 1, v bit ngt thu (RI) l 0. Qui tc
chung l lp REN khi bt u chng trnh khi ng cng ni tip, ri xa RI bt u nhn
d liu. Khi RI b xa, cc xung nhp c a ra ng TXD khi bt u chu k my k tip, v
d liu c a ra ng RXD theo xung nhp. Mi bit d liu c nhn vo cng ni tip
cnh ln ca xung nhp trn ng TXD nh biu din trn hnh 6.15b.
Mt ng dng ca ch thanh ghi dch l m rng kh nng xut d liu ca 8051. IC thanh
ghi dch ni tip ra song song c th c ni vo cc ng TXD v RXD ca 8051 cung cp
thm 8 ng ra nh trn hnh 6.16. C th ni ni tip thm cc thanh ghi dch m rng thm
nhiu cng vo ra khc na.
141

Mt chu k my
S1
S2
S3
S4
S5
S6
P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2
Osc
ALE
S3P1
S6P1
ALE
Data out
RXD
D1
D2
D3
D4
D5
D6
D7
ED
D0
U
.V
Shift clock
Data out
Shift clock
TXD
ALE
Data in
RXD
D1
D2
D3
D4
D5
D6
D7
TI
D0
T.
a) nh thi pht ni tip trong ch 0
Shift clock
TXD
.P
b) nh thi nhn ni tip trong ch 0
Hnh 6.15: nh thi thu pht d liu trn cng ni tip ch 0
PE
8051
Thanh ghi dch
RXD
TXD
CLOCK
DATA
Hnh 6.16: Tng thm cng vo ra song song s dng cng ni tip ch 0
Ch 1 (Truyn bt ng b 8 bit vi tc baud thay i c): ch 1, cng ni tip ca

8051 lm vic nh mt b truyn nhn ni tip bt ng b (UART-Universal Asynchronous
Receiver/Transmitter) 8 bit, vi tc baud thay i c. UART thc hin thu pht d liu ni
tip vi mi k t d liu, i trc l bit start mc thp, theo sau l cc bit d liu v cui cng
l bit stop mc cao, ngoi ra c th chn thm bit kim tra chn l gia bit d liu cui cng v
bit stop.
Trong ch 1, mi k t d liu bao gm 10 bit c pht trn TXD hoc thu trn RXD bao
gm: 1 bit start (lun l 0), 8 bit d liu (LSB u tin) v1 bit stop (lun l 1). Khi thu, bit stop
142
PE
.P
TI
T.
ED
U
.V
c a vo RB8 trong SCON. Trong 8051 ch baud c t bng tc bo trn ca

Timer 1.
To xung nhp v ng b ho cc thanh ghi dch ca cng ni tip trong cc ch 1, 2 v 3
c thit lp bng b m 4 bit (chia cho 16), ng ra ca b m cung cp xung nhp xc nh
tc baud. Ng vo ca b m ny c chn qua phn mm.
Vic truyn d liu (pht) c khi ng bng cch ghi vo SBUF, nhng qu trnh pht d
liu s vn cha tht s bt u cho n vng quay k tip ca b m chia cho 16 cung cp tc
baud cho cng ni tip. D liu c dch ra ngoi trn ng TxD bt u bng bit start, theo
sau l 8 bit d liu, v sau cng l bit stop. rng (theo thi gian ca mi bit) l nghch o ca
tc baud c lp trnh trong timer. C ngt pht (TI) c t ln 1 khi bit stop xut hin trn
TxD.
Vic thu d liu c khi ng khi c s chuyn trng thi t 1 xung 0 trn ng RXD.
B chia 16 tc thi c xa ng b s m vi lung bit n (bit k tip s n vng m
16 k tip ). Lung bit n c ly mu gia cc vng m 16.
B thu s kim tra li bit start ln m sau, khi c chuyn trng thi t 1 xung 0 u tin
trn RxD. Nu thi im ny RxD khng cn gi trng thi 0, th b thu s xem nh tn hiu
start khng hp l (do nhiu ch khng phi do mt k t hp l). B thu c reset v quay v
trng thi ngh (idle), i s chuyn trng thi t 1 xung 0 k tip.
Khi pht hin c bit start hp l, cc bit ca k t s tip tc c thu. Bit start c b
qua v 8 bit d liu c a vo thanh ghi dch cng ni tip. Khi tt c 8 bit d liu c
nhn, cc bc tip theo s xy ra:
1. Bit th 9 (bit stop) c np vo RB8 trong SCON.
2. SBUF c np vi 8 bit d liu.
3. C ngt b thu (RI) c lp ln 1.
Tuy nhin, cc bc trn ch xy ra nu c nhng iu kin sau:
1. RI = 0.
2. SM2 = 1 v bit stop thu c l 1, hoc SM2 = 0.
Yu cu RI = 0 bo m l chng trnh c k t trc (v RI c xa). iu kin
th hai ch p dng trong ch truyn thng a x l. iu ny c ngha l khng t RI ln 1
trong ch truyn thng a x l khi bit d liu th 9 l 0.
Ch 2 (UART 9 bit vi tc baud c nh): Khi SM1 = 1 v SM0 = 0, cng ni tip lm
vic ch 2, nh mt UART 9 bit c tc baud c nh. 11 bit s c pht hoc thu: 1 bit
start, 8 bit d liu, bit d liu th 9 c th lp trnh c v 1 bit stop. Khi pht, bit th 9 l bt c
g c a vo TB8 trong SCON (c th l bit parity). Khi thu, bit th 9 thu c s trong
RB8. Tc baud ch 2 l 1/32 hoc 1/16 tn s dao ng trn chip.
Ch 3 (UART 9 bit vi tc baud thay i c): Ch ny ging nh ch 2 ngoi tr
tc baud c th lp trnh c trong timer. Tht ra, cc ch 1, 2 v 3 rt ging nhau. Khc
bit gia chng l tc baud (c nh trong ch 2, thay i trong cc ch 1 v 3) v s
bit d liu (8 trong ch 1, 9 trong cc ch 2 v 3).
6.4.4. Khi ng v truy xut cc thanh ghi cng ni tip
Cho php thu: bit cho php b thu (REN = Receiver Enable) trong SCON phi c lp ln 1
bng phn mm, cho php thu cc k t. Thng thng, vic ny c thc hin u chng
trnh khi khi ng cng ni tip, timer,... C th thc hin vic ny theo hai cch. Lnh:
SETB REN
S lp REN ln 1, hoc lnh:
143
PE
.P
TI
T.
ED
U
.V
MOV SCON, #xxx1xxxxB

S lp REN ln 1 v lp hoc xa cc bit khc trong SCON tu theo cc yu cu khc nhau
(Cc x phi l 0 hoc 1 khi ng cc ch hot ng).
Bit d liu th 9: bit d liu th 9 cn pht trong cc ch 2 v 3 phi c np vo trong
TB8 bng phn mm. Khi thu bit d liu d liu th 9 c np vo RB8. Tu theo yu cu ca
thit b ni tip s dng, m chng trnh c th s dng bit d liu th 9. Bit d liu th 9 ng
mt vai tr quan trng trong truyn thng tin a x l.
Thm 1 bit parity: Bit d liu th 9 thng s dng thm parity vo k t truyn nhn. Bit P
trong t trng thi chng trnh (PSW), c lp ln 1 hoc b xa v 0 sau mi chu k my,
thit lp kim tra chn l cho 8 bit trong thanh ghi tch ly. V d, khi cn truyn 8 bit d liu
cng thm kim tra chn, c th s dng cc lnh sau:
MOV C, P
; np bit parity vo c C
MOV TB8, C
; n tr thnh bit d liu th 9
MOV SBUF, A
; Chuyn 8 bit t ACC vo SBUF.
Nu cn parity l th sa cc lnh li nh sau:
MOV C, P
; Np bit parity chn vo c C
CPL C
; Chuyn sang parity l
MOV TB8, C
MOV SBUF, A
D nhin, vic s dng parity khng b gii hn cc ch 2 v 3. ch 1, 8 bit d liu
c truyn i c th bao gm 7 bit d liu cng thm bit parity. truyn m ASCII 7 bit vi
parity chn bit 8, c th s dng cc lnh sau:
CLR ACC.7
; xa MSB, parity chn trong P
MOV C, P
; chuyn vo c nh C
MOV ACC.7, C ; t parity chn vo MSB
MOV SBUF, A
; Gi k t i vi 7 bit d liu cng parity chn.
Cc c ngt: Hai c ngt thu v pht (RI v TI) trong SCON ng mt vai tr quan trng trong
truyn thng tin ni tip dng 8051. C hai bit c lp ln 1 bng phn cng, nhng phi c
xa bng phn mm.
V d, thng RI c t ln 1 khi kt thc vic thu mt k t v bo b m c d
liu. iu kin ny c th c kim tra trong phn mm, hoc c th c lp trnh gy ra
mt ngt. Nu phn mm mun nhn mt k t t thit b c ni vo cng, n phi i cho n
khi RI c lp ln 1, ri xa RI v c k t t SBUF. on chng trnh nh sau:
WAIT: JNB RI, WAIT ; Kim tra RI cho n khi n = 1
CLR RI
; Xa RI
MOV A, SBUF
; c k t
TI c lp ln 1 khi bit cui ca k t c pht v bo b m pht trng. Nu phn mm
mun gi mt k t n mt thit b c ni vo cng ni tip, trc ht n phi kim tra xem
cng ni tip sn sng cha. Ni cch khc, nu k t trc c ghi ti b m truyn gi
i, th phi i cho n khi vic truyn k t ny hon tt, mi c gi k t k tip. Cc lnh
sau s truyn k t trong thanh ghi tch ly:
WAIT: JNB TI, WAIT
; Kim tra TI cho n khi n bng 1
CLR TI
; Xa TI
MOV SBUF, A
; Gi k t i.
Cc on chng trnh trn l mt phn ca cc hm nhp v xut k t chun.
144
ED
U
.V
6.4.5. Truyn thng tin trong h thng a x l

Cc ch 2 v 3 cung cp kh nng truyn d liu trong h thng a x l. Trong cc ch
ny bit d liu th 9 khi thu s c np vo RB8. Cng ni tip c th lp trnh sau khi
nhn c bit stop, th ngt cng ni tip ch tch cc khi RB8 = 1. c tnh hot ng ny c th
thit lp bng cch lp bit SM2 trong SCON. Mt v d cho vic ng dng ch hot ng ny
m t trn hnh 6.17.
Khi 8051 ch (matter) mun truyn mt khi d liu ti 8051 ti (slaver) no , trc tin
n gi ra ngoi mt byte a ch xc nh 8051 t cn nhn d liu. Byte a ch s khc vi cc
byte d liu khc l c bit th 9 l 1. Tt c cc 8051 t c ngt v nhn ly byte a ch ny,
nhng ch c 8051 t no c a ch ng mi xo bit SM2 ca n i chun b nhn d liu t
8051 ch, cn tt c cc 8051 t khc s lp SM2 v b qua cc byte d liu k tip. Cc 8051 t
s c ngt tr li khi c byte a ch tip theo c gi n. S ny c th m rng cc
8051 t c th truyn d liu ti 8051 ch. Khi ny khng c s dng bit d liu th 9, nu
khng mt 8051 t khc c th tnh c c chn.
SM2 khng b tc ng trong ch 0, v trong ch 1 n c th s dng kim tra s hp
l ca stop bit. Trong ch 1, khi nhn nu SM2 =1, ngt nhn s khng tch cc khi khng c
stop bit hp l.
P0
P1 P2 P3
8051 Slave 1
TI
Matter 8051
32 ng vo ra
T.
32 ng vo ra
.P
TXD
RXD
P0
P1 P2 P3
8051 Slave 2
RXD
Hnh 6.17: Truyn thng tin ni tip trong h thng a x l.
PE
6.4.6. Tc baud cng ni tip

Nh gii thiu, tc baud cng ni tip l c nh cc ch 0 v 2. Trong ch 0,
n lun l tn s dao ng trn chip c chia cho 12. Thng thng thch anh n nh tn s dao
ng trn chip ca 8051, nhng cng c th s dng ngun xung nhp khc. Gi s vi tn s dao
ng danh nh l 12MHz, th tc baud ch 0 s l 1 MHz (hnh 6.18a).
Sau khi reset h thng, tc baud c mc nh l trong ch 2, n chnh l tn s b
dao ng chia cho 64. Tc baud cn c quyt nh bi mt bit trong thanh ghi iu khin
ngun cung cp (PCON). Bit 7 ca PCON l bit SMOD. Nu lp bit SMOD ln 1 s lm gp i
tc baud trong cc ch 1, 2 v 3. Trong ch 2, tc baud mc nh l 1/64 tn s dao
ng khi bit SMOD=0, n s c nhn i ln thnh 1/32 tn s dao ng khi SMOD=1 (hnh
6.18b).
V PCON khng c nh a ch theo bit, nn lp bit SMOD ln 1 cn thc hin cc lnh
sau:
MOV A, PCON
; Ly gi tr hin thi ca PCON
SETB ACC.7
; t bit 7 (SMOD) ln 1
MOV PCON, A
; Ghi gi tr ngc v PCON.
145

Tc baud trong cc ch 1 v 3 c xc nh bng tc trn ca Timer 1. V timer
hot ng tn s tng i cao, tc baud cho cng ni tip s bng tc trn timer c
chia thm cho 32 khi SMOD = 0 (chia16 nu SMOD = 1).
Dao ng
trn chip
12
Tc baud
64
SMOD = 0
32
SMOD = 1
b) ch 2
32
Dao ng
trn chip
Tc baud
SMOD = 1
ED
16
SMOD = 0
Tc baud
Dao ng
trn chip
U
.V
a) ch 0
c) ch 1 v 3
Hnh 6.18: Ngun cung cp xung nhp xc nh tc baud cho cng ni tip
.P
TI
T.
S dng Timer 1 lm xung nhp tc baud: cch thng dng to tc baud l khi ng
TMOD vi ch 8 bit t ng np li (ch 2), v np gi tr thch hp vo TH1, cho tc
trn ng vi tc baud mong mun. TMOD c khi ng nh sau:
MOV TMOD, #0010xxxxB
Cc bit x l 1 hoc 0 tng ng cho timer.
Cng c th t c cc tc baud thp bng cch s dng timer ch 2 vi TMOD =
0001xxxxB. Tuy nhin, khi chng trnh phn mm s phc tp thm, v cc thanh ghi
TH1/TL1 phi c khi ng li sau mi ln trn. Vic ny c th thc hin trong chng trnh
phc v ngt. Mt cch khc l cp xung nhp cho Timer 1 t ngoi dng T1 (P3.5). V tc
baud lun l tc trn ca Timer 1 c chia cho 32 (hoc cho 16, nu SMOD = 1).
Cng thc xc nh tc baud trong cc ch 1 v 3 l:
PE
Tc baud = Tc trn ca Timer 1 32.

V d, mun lm vic vi tc baud l 1200 baud, th tc trn ca Timer 1 phi l:
1200 32 = 38.4 KHz.
Nu dng thch anh 12 MHz, Timer 1 c cp xung nhp 1 MHz hay 1000 KHz. V tc
trn ca Timer 1 l 38.4 KHz v timer c cp xung nhp 1000 KHz, th cn trn sau 1000
38.4 = 26.04 xung nhp (lm trn l 26). V timer m ln v trn xy ra khi c s thay i t FFH
xung 00H b m. Nh vy gi tr ng cn np vo TH1 l 26. Cch d nht np gi tr
vo TH1 l:
MOV TH1, # 26
Trnh hp dch s thc hin chuyn i cn thit cho lnh. Trong trng hp ny 26 c
chuyn thnh 0E6H. Nh vy, lnh trn hon ton ging vi lnh:
MOV TH1, # 0E6H
Do vic lm trn nn c sai s nh trong tc baud. Tng qut th cho php dung sai 5%
trong truyn thng bt ng b (start/stop). C th c c tc baud chnh xc nu dng thch
anh 11.059 MHz. Bng sau y tm tt cc gi tr np vo TH1 cho cc tc baud thng dng
nht, dng thch anh 12 MHZ hoc 11.059 MHz:
146
6.5.
12 MHz
12 MHz
12 MHz
11,059 MHz
11,059 MHz
11,059 MHz
11,059 MHz
SMOD
1
0
0
1
0
0
0
NGT CA 8051 (INTERRUPT)
Gi tr np cho
TH1
-7 (F9H)
-13 (F3H)
-26 (E6H)
-3 (FDH)
-3 (FDH)
-12 (F4H)
-24 (E8H)
Tc baud thc
s
8923
2404
1202
19200
9600
2400
1200
Sai s
7%
0,16%
0,16%
0
0
0
0
Tn s thch anh
U
.V
Tc
baud
9600
2400
1200
19200
9600
2400
1200
PE
.P
TI
T.
ED
6.5.1. Gii thiu

Mt ngt l s xy ra mt iu kin - mt s kin - lm tm thi ngng chng trnh hin
hnh, iu kin c phc v bng mt chng trnh khc. Cc ngt ng mt vai tr quan
trng trong thit k cc ng dng vi iu khin. Chng cho php h thng p ng bt ng b
vi mt s kin v gii quyt s kin trong khi mt chng trnh khc ang thc thi.
Mt h thng c iu khin bng ngt lm ngi s dng cm gic nh h thng thc hin
nhiu cng vic mt cch ng thi. D nhin CPU mi ln khng th thc thi nhiu hn mt
lnh. Nhng n c th tm ngng vic thc hin mt chng trnh ny, thc hin chng trnh
khc, ri quay v chng trnh th nht. Vic phc v ngt ging nh vic gi mt chng trnh
con, CPU chuyn qua thc hin chng trnh con, sau quay tr li chng trnh chnh. Khc
bit l trong h thng iu khin bng ngt, th s ngt qung khng xy ra theo lnh (lnh CALL
subroutine), m l p ng vi mt s kin xy ra bt ng b vi chng trnh chnh. H
thng s khng xc nh chng trnh chnh s b ngt qung ti u.
Chng trnh gii quyt ngt c gi l chng trnh phc v ngt (ISR: Interrupt Service
Routine) hoc chng trnh x l ngt. ISR thc thi khi p ng mt ngt, v thng thng l
thc hin tc v xut nhp d liu vi mt thit b. Khi ngt xy ra, chng trnh chnh tm thi
dng hot ng v r nhnh n ISR: ISR thc thi v kt thc bng lnh tr v t ngt, lc ny
chng trnh chnh tip tc thc hin ch m n tm dng. Thng ngi ta xem chng trnh
chnh nh thc thi mc c s (base - level), v cc ISR thc thi mc ngt (interrupt - level).
Ngi ta cng dng cc thut ng foreground ch mc c s v background ch mc ngt.
Hnh nh khi qut ca cc ngt c m t trong hnh 6.19:
ISR
ISR
Quay v
p ng ngt
Main
ISR
Main
Main
Main
Hnh 6.19: Vic thc hin chng trnh vi p ng ngt.
147
Chc nng (1: cho php; 0: cm)

Cho php/cm ton b cc ngt.
Khng nh ngha.
D phng cho th h k tip.
Cho php ngt cng ni tip.
Cho php ngt timer 1.
Cho php ngt ngoi cp t INT1.
Cho php ngt timer 0
Cho php ngt ngoi INT0
ED
a ch
AFH
AEH
ADH
ACH
ABH
AAH
A9H
A8H
T.
K hiu
EA
ES
ET1
EX1
ET0
EX0
TI
Bit
IE7
IE6
IE5
IE4
IE3
IE2
IE1
IE0
U
.V
6.5.2. T chc ngt ca 8051

C 5 ngun yu cu ngt trong h thng 8051: 2 ngt ngoi, 2 ngt t timer v 1 ngt cng ni
tip. Tt c cc ngt u c mc nh b cm sau khi reset h thng, v c cho php tng
ngun ring bit bng phn mm.
Khi c hai hoc nhiu yu cu ngt ng thi, hoc mt ngt xy ra trong khi mt ngt khc
ang c phc v, h thng s p ng bng cch xt theo vng tun t v theo mc u tin
nh trnh cho vic thc hin cc ngt. Vng tun t th c nh, nhng u tin ngt th c th lp
trnh c.
Cho php v cm cc ngt: Mi ngun ngt c cho php hoc cm mt cch ring bit qua
thanh ghi cho php ngt (IE - Interrupt Enable) c nh a ch theo bit a ch A8H. Mi ngun
ngt s c 1 bit trong thanh ghi IE c th lp trnh cho php ring bit, ngoi ra cn c mt bit
cho php/cm ton b cc ngt (khi c xa s cm tt c cc ngt), nh trnh by trong bng
sau:
PE
.P
Nh vy khi mun cho php bt k ngt no cn phi lp hai bit: bit cho php ring v bit cho
php ton b. V d, cc ngt t Timer 1 c cho php nh sau:
SETB ET1
; Cho php ngt t Timer 1
SETB EA
; t bit cho php ton b.
Cng c th s dng lnh sau:
MOV IE, # 10001000B
Mc d hai cch ny c cng kt qu sau khi reset h thng, nhng chng s c kt qu s
khc nu IE c ghi gia chng trnh. Cch th nht khng nh hng n 5 bit khc trong
thanh ghi IE, tri li cch th hai s xa cc bit khc. Nn khi tr IE theo cch th hai thng s
dng u chng trnh (ngha l sau khi m my hoc reset h thng), cn khi mun cho php
v cm cc ngt ngay trong chng trnh th nn dng cch th nht, trnh nh hng n cc
bit khc trong thanh ghi IE.
u tin ngt: Mi ngun ngt c lp trnh ring vo mt trong hai mc u tin, qua thanh ghi
u tin ngt IP (Interrupt Priority), c a ch theo bit a ch B8H. Chc nng cc bit ca IP
c m t trong bng sau:
Bit
IP7
IP6
IP5
IP4
K hiu
PS
a ch
BDH
BCH
Chc nng (1: mc u tin cao; 0: mc u tin thp)

Khng nh ngha.
Khng nh ngha.
D phng.
u tin cho ngt cng ni tip.
148

IP3
IP2
IP1
IP0
PT1
PX1
PT0
PX0
BBH
BAH
B9H
B8H
u tin cho ngt timer 1.

u tin cho ngt ngoi INT1.
u tin cho ngt timer 0.
u tin cho ngt ngoi INT0.
Ngt
IE0
IE1
TF1
TF0
TI
RI
SFR v v tr bit
TCON.1
TCON.3
TCON.7
TCON.5
SCON.1
SCON.0
PE
.P
INT0
INT1
Timer 1
Timer 0
Serial port
Serial port
TI
T.
ED
U
.V
IP mc nh b xa sau khi reset h thng, t tt c cc ngt mc u tin thp. Vic u

tin cho php mt ISR s b ngt bi mt ngt khc, nu ngt ny c u tin cao hn ngt
ang phc v. iu ny thc hin d dng trn 8051, v ch c hai mc u tin. Nu mt ISR c
u tin thp ang thc thi, khi mt ngt c u tin cao xy ra th ISR hin hnh s b ngt. ISR c
u tin cao khng th b ngt.
Chng trnh chnh thc hin mc c s v khng lin h vi bt c ngt no, n c th
lun b ngt, bt chp u tin ca ngt. Nu hai ngt c u tin khc nhau xy ra ng thi, th
ngt c u tin cao hn s c phc v trc.
Hi vng tun t: Nu hai ngt cng u tin xy ra ng thi, vng tun t s xc nh ngt
no c phc v trc. Vng tun t c qui nh l: INT0, Timer0, INT1, Timer1, cng ni
tip.
Hnh 6.20 minh ha cc c ch phc v ca 5 ngun ngt,. Trng thi ca tt c cc ngun
ngt kh dng qua cc bit c tng ng trong cc SFR. D nhin, nu c bt k ngt no b cm,
ngt khng xy ra, nhng phn mm vn c th kim tra c ngt.
Cc v d timer v cng ni tip trong cc mc trc s dng cc c ngt, m khng gy ra
ngt tht s.
Ngt cng ni tip c t logic OR ca ngt thu (RI) v ngt pht (TI). Cc bit c to cc ngt
c tm tt bng sau:
6.5.3 Cc vector x l ngt

Khi mt ngt xy ra v c CPU chp nhn, chng trnh chnh s b ngt qung v nhng
hot ng sau xy ra:
- Hon tt vic thc thi lnh hin hnh.
- Ct PC vo ngn xp.
- Trng thi ngt hin hnh c ct bn trong.
- Cc ngt b chn mc ngt.
- Np vo PC a ch vector ca ISR.
- ISR thc thi.
149

IE
INT0
IE0
IT1
IE1
High Priority
Low Priority
Interrupt polling sequence
IT0
IP
INT1
TF0
U
.V
TF1
RI
TI
Interrupt Enable
ED
Global Enable
Hnh 6.20: C ch ngt ca 8051.
TI
T.
ISR thc thi v p ng cc yu cu ca ngt. ISR hon tt bng lnh RETI (quay v t ngt).
iu ny lm ly li gi tr c ca PC t nh ngn xp, vic thc hin chng trnh chnh tip tc
ch m n b dng.
Khi chp nhn ngt, gi tr c np vo PC c gi l vector ngt, n l a ch bt u ca
ISR cho ngun to ngt. Cc vector ngt c cho bng sau:
C
PE
.P
Ngt
Reset
INT0
Timer 0
INT1
Timer 1
Serial port
RST
IE0
TF0
IE1
TF1
RI hoc TI
a ch vector ngt
0000H
0003H
000BH
0013H
001BH
0023H
Vector reset h thng (RST a ch 0000H) c trong bng, v n ging ngt: n ngt chng
trnh chnh v np gi tr mi cho PC.
Khi ch n mt ngt, c gy ngt t ng c xa bi phn cng. Ngoi l ch c RI v
TI ca cc ngt cng ni tip cn c xo bng phn mm. V c ti hai ngun c th xy ra cho
ngt cng ni tip, nn CPU khng xa c ngt ny. Cc bit phi c kim tra trong ISR xc
nh ngun ngt v c to ngt s c xa bng phn mm. Thng thng s c mt lnh r
nhnh thch hp tu theo ngun ngt.
V cc vector ngt phn u ca b nh chng trnh, nn lnh u tin ca chng trnh
chnh thng l lnh nhy qua vng nh ny, v d nh LJMP 0030H.
150
; im vo reset
; Cc im vo ISR
; im vo chng trnh chnh
ED
; Bt u chng trnh chnh.
U
.V
ORG 0000H
LJMP MAIN
ORG 0030H
MAIN:
6.5.4. Thit k chng trnh dng cc ngt

Cc v d v timer v cng ni tip trong cc phn trc khng s dng cc ngt, m s dng
cc vng lp i kim tra cc c bo trn (TF0 hoc TF1), hoc cc c thu v pht cng ni
tip (TI hoc RI). Vi phng php ny thi gian hot ng c gi tr ca CPU b tiu tn trong
cc vng lp i cc c tc ng. iu ny hon ton khng thch hp vi cc ng dng iu
khin, trong b vi iu khin phi tng tc vi nhiu thit b nhp v xut ng thi v i
hi cao v thi gian x l.
Phn ny s kho st cch pht trin chng trnh dng ngt iu khin. Mi chng trnh
bt u ti a ch 0000H, vi gi thit rng n s bt u thc hin sau khi reset h thng. Khung
mt chng trnh c lp dng ngt c th thc hin nh sau:
T.
Lnh u tin nhy n a ch 0030H, va qua cc v tr vector bt u ca cc ISR. Nh

trnh by trn hnh 6.21, chng trnh chnh bt u a ch 0030H.
TI
B nh chng trnh
bn ngoi.
PE
.P
FFFF
0030
002F
LJMP main
Chng trnh
chnh
im bt u sau khi
reset v khi xy ra cc
ngt
Hnh 6.21: T chc b nh chng trnh khi s dng cc ngt.
Cc chng trnh phc v ngt c kch thc nh: Cc chng trnh phc v ngt phi bt u
gn phn u ca b nh chng trnh, di cc a ch trong bng Cc vector ngt. Mc d ch
c 8 byte gia cc im vo ngt, c th thc hin hot ng phc v ngt mong mun v
quay v chng trnh chnh.
Nu ch c mt ngun ngt c s dng, v d Timer 0, th c th s dng mt khung
chng trnh nh sau:
ORG 0000H
; Reset
LJMP MAIN
ORG 000BH
; im vo Timer 0
151
.P
TI
T.
ED
U
.V
T0ISR:
; Bt u ISR cho Timer 0
RETI
; Quay v chng trnh chnh
MAIN:
; Chng trnh chnh
Nu s dng nhiu ngt, cn phi bo m mi chng trnh phc v ngt bt u ng a ch
qui nh cho n, v khng chy qu sang ISR k. Trong v d trn, v ch c mt ngt c s
dng, chng trnh chnh c th bt u ngay sau lnh RETI.
Cc chng trnh phc v ngt c kch thc ln: Nu ISR di hn 8 byte, cn c lnh nhy
chuyn n ti ni khc trong b nh chng trnh, nu khng n s i l qua im vo ca ngt
k. Vi lnh nhy n vng nh khc, c th m rng chiu di ISR. V d ch xt Timer 0, c th
s dng khung chng trnh sau:
ORG 0000H
; im bt u sau khi reset
LJMP MAIN
ORG 000BH
; im bt u ca ngt Timer 0
LJMP T0ISR
ORG 0030H
; Di cc vector ngt tip theo
MAIN:
T0ISR:
; ISR cho Timer 0
RETI
; Quay v chng trnh chnh.
Xt mt chng trnh n gin nht khng thc hin g c, chng trnh chnh ch khi ng
cc timer, cng ni tip v cc thanh ghi ngt sau khng lm g na. Cng vic hon ton c
thc hin trong cc ISR. Sau cc lnh khi ng, chng trnh chnh cha lnh: HERE: SJMP
HERE
Hay dng vit gn nh sau:
SJMP $
Khi ngt xy ra, chng trnh chnh b ngt qung tm thi, trong khi ISR thc hin. Lnh RETI
cui ISR tr iu khin v chng trnh chnh v n tip tc khng lm g c. Trong nhiu ng
dng iu khin, nhiu cng vic tht ra c thc hin hon ton trong cc ISR.
Khi cn cc cng vic thc hin ngoi ngt, lnh SJMP $ (HERE: SJMP HERE) c th c thay
th bng cc lnh cn thc hin trong ng dng.
PE
6.5.5. Cc ngt ca 8051

Cc ngt timer: Cc ngt timer c a ch vector ngt l 000BH (Timer 0) v 001BH (Timer 1).
Ngt timer xy ra khi cc thanh ghi timer (TLx/THx) trn v lp c bo trn (TFx) ln 1.
Ch rng cc c timer (TFx) khng cn phi xa bng phn mm. Khi cho php cc ngt,
TFx t ng b xa bng phn cng khi CPU chuyn n ISR.
Cc ngt cng ni tip: Ngt cng ni tip xy ra khi hoc c ngt pht (TI) hoc c ngt thu
(RI) c t ln 1. Ngt pht xy ra khi truyn xong mt k t va c ghi vo SBUF. Ngt thu
xy ra khi mt k t c nhn xong v ang i trong SBUF c c.
Ngt cng ni tip khc vi ngt timer l c gy ra ngt khng b xa bng phn cng khi
CPU chuyn ti ISR. Nguyn nhn l do c hai ngun ngt cng ni tip: TI v RI. Ngun ngt
phi c xc nh trong ISR v c to ngt cn c xa bng phn mm.
Cc ngt ngoi: Cc ngt ngoi xy ra khi c mt mc thp hoc cnh xung trn chn INT0
hoc INT1 ca 8051. Cc c to cc ngt ny l cc bit IE0 v IE1 trong TCON. Khi quyn iu
khin chuyn n ISR, c to ra ngt ch c xa nu ngt c tch cc bng cnh xung.
152
ED
U
.V
Nu ngt c tch cc theo mc, th mc cao ca ngun yu cu ngt bn xo c thay cho phn
cng.
Vic chn ngt tch cc mc thp hay tch cc cnh xung c lp trnh qua cc bit IT0 v
IT1 trong TCON. V d, nu IT1 = 0, ngt ngoi 1 c kch khi bng mc thp chn INT1.
Nu IT1 = 1, ngt ngoi 1 s c kch khi bng cnh xung. Trong ch ny, nu cc mu
lin tip trn chn INT1 ch mc cao trong mt chu k v thp trong chu k k, c yu cu ngt
IE1 trong TCON c t ln 1. Ri bit c IE1 yu cu ngt.
V cc chn ngt ngoi c ly mu mt ln mi chu k my, ng vo cn c gi trong
ti thiu 12 chu k dao ng bo m ly mu ng. Nu ngt ngoi c tc ng theo cnh
xung, ngun bn ngoi phi gi chn yu cu cao ti thiu 1 chu k v gi n mc thp thm
mt chu k na bo m pht hin c cnh xung. IE0 v IE1 t ng c xa khi CPU
chuyn ti ngt.
Nu ngt ngoi c tc ng theo mc, ngun bn ngoi phi gi yu cu tc ng cho n
khi ngt c yu cu tht s c to ra. Ri n phi khng tc ng yu cu trc khi ISR c
hon tt, nu khng mt ngt khc s c lp li. Thng thng khi vo ISR ngi ta lm ngun
yu cu a tn hiu to ngt v trng thi khng tc ng.
6.6. TP LNH V HNG DN LP TRNH TRN 8051
PE
.P
TI
T.
Cc chng trnh c cu to t nhiu lnh ni tip nhau, mt chng trnh thng cn c

xy dng mt cch logic nht, c th thc hin mt cch nhanh chng hiu qu nht. Cng nh
cc b vi x l thng thng, mi h vi iu khin c mt tp lnh ring ca n.
Tp lnh ca 8051 c xy dng ti u cho cc ng dng iu khin 8 bit, n c cc ch
a ch cho php vic truy cp RAM ni mt cch nhanh chng, thch hp vi cc ng dng c
cu trc d liu nh. Tp lnh ca n cng c m rng x l cc bin theo bit, cho php vic
truy cp trc tip cc bit tin li cho cc h thng iu khin yu cu qu trnh x l logic.
Cng nh cc b vi x l 8 bit in hnh, tp lnh ca 8051 c cc opcode 8 bit. iu ny cho
php thc hin 28=256 lnh khc nhau, trong 255 lnh c thi hnh v 1 lnh khng c
nh ngha. Phn ton hng trong lnh cng bao gm 1 hoc 2 byte cha d liu, hoc a ch ca
d liu cn x l trong lnh. Ton b tp lnh c 139 lnh 1 byte, 92 lnh 2 byte v 24 lnh 3
byte.
6.6.1. Cc ch a ch (addressing mode)
Trong cc lnh x l d liu (tnh ton, sao chp) cn phi ch th ni cha d liu (trong
thanh ghi, trong RAM ni, trong b nh ngoi ). Vic ch th v tr ca d liu trong lnh c
thc hin bng cc cch nh v a ch.
Cc ch nh v a ch thng gn lin vi tp lnh ca mi h vi x l. Chng cho php
nh r ngun hoc ch cha d liu theo cc cch khc nhau ty thuc vo trng thi ca s lp
trnh. 8051 c 8 ch nh v a ch:
- Thanh ghi.
- Trc tip.
- Gin tip.
- Tc thi.
- Tng i.
153

- Tuyt i.
- Di.
- Ch s.
Opcode
n n n
a) nh v a ch thanh ghi, v d ADD A,R5

Opcode
Direct address
Opcode
Opcode
Direct address
d) nh v a ch tc thi, v d ADD A,#55H

Opcode
Relative offset
ED
e) nh v a ch tng i, v d ADD A,#55H
U
.V
c) nh v a ch gin tip, v d ADD A,@R0
A10 A8
b) nh v a ch trc tip, v d ADD A,direct
Opcode
A7 A0
f) nh v a ch tuyt i, v d AJMP dest
A15 A8
T.
Opcode
A7 A0
g) nh v a ch di, v d AJMP dest
Acc
TI
Opcode
Effective Address
h) nh v a ch di, v d AJMP dest
.P
Hnh 6.22: Cc ch nh v a ch ca 8051.
PE
Ch a ch thanh ghi (register addressing)

8051 c bn tp gm 32 thanh ghi 8 bit nm 32 byte u tin ca RAM ni t a ch 00H
n 1FH. Nhng ti 1 thi im ch c tp hot ng, chng c k hiu t R0 ti R7. Cc tp
thanh ghi c chn bng cc bit PSW4, PSW3 ca t trng thi chng trnh (PSW).
Trong cu trc cc lnh s dng ch a ch thanh ghi, cc thanh ghi c m ho bng 3
bit trng s thp ca m lnh. Nh vy, m chc nng v ton hng ca lnh c kt hp trong
mt byte 1 byte nh hnh 6.22a.
Trong lnh gi nh, ch a ch thanh ghi c ch th bng k hiu Rn (vi n t 0 ti 7).V
d lnh cng gi tr trong thanh ghi R7 vi thanh cha c vit:
ADD A,R7
Lnh c opcode l 00101111B: 5bit cao 00101 ch th lnh ADD v 3 bit thp 111 ch th
thanh ghi R7.
Mt s lnh c cc ton hng ngm nh cho 1 thanh ghi no , v th m opcode khng cn
cc bit m ho cho cc thanh ghi ny. Cc thanh ghi thng c ngm nh trong tp lnh ca
8051 nh: thanh ghi cha A, thanh ghi con tr d liu DPTR, thanh ghi b m chng trnh PC,
c C v cp thanh ghi AB.
154
PE
.P
TI
T.
ED
U
.V
nh v a ch trc tip (direct addressing)

nh v a ch trc tip cho php truy xut bt k a ch hoc thanh ghi phn cng no trong
chip. Trong kiu nh v ny, mt byte a ch trc tip thm vo sau opcode ca ch th hp dch
v tr ca d liu nh hnh 6.22b.
Tt c cc cng I/O v cc thanh ghi chc nng c bit, thanh ghi iu khin v thanh ghi
trng thi, u nm trong vng a ch t 128 n 255 (80H n FFH) ca RAM ni. Khi gi tr
byte a ch trc tip nm trong khong ny (ng vi bit 7 =1), th cc thanh ghi chc nng c
bit c truy xut. V d cng 0 v cng 1 c quy nh a ch trc tip l 80H v 90H, trong
m gi nh chng c k hiu l P0 v P1.
V d lnh:
MOV P1,A
Khi hp dch s i a ch trc tip ca cng 1 (P1) thnh 90H, v t vo byte th 2 ca
lnh (byte th nht l Opcode ca lnh).
nh v a ch gin tip (indirect addressing)
Trong nh v gin tip, ngi ta s dng thanh ghi gi a ch ca mt nh ni cha d
liu cn x l trong lnh. Cch nh v ny c bit tin li khi truy cp mt chui d liu trong
RAM ni, khi ch cn tng hoc gim gi tr thanh ghi tr ti d liu k ca chui.
8051 ch s dng cc thanh ghi R0 v R1 cho nh v a ch gin tip. Bit c trng s thp
nht trong opcode ca m lnh, c s dng m ho hai thanh ghi ny nh trn hnh 6.20c.
Trong m gi nh, nh v gin tip c k hiu bng du @ c t trc R0 hoc R1.
V d nu R1 cha gi tr 40H, v ni dung nh 40H l 55H, th lnh: MOV A,@R1 s chuyn
gi tr 55H vo thanh ghi A.
Cc lnh s dng nh v a ch gin tip, s gip gim ngn cc on chng trnh x l cc
chui d liu trong b nh. V d on chng trnh sau s xo cc nh t a ch 60H ti a
ch 7FH:
MOV
R0,#60H
LOOP: MOV
@R0,#0
INC
R0
CJNE R0,#80H,LOOP
Lnh u tin np a ch u tin ca khi d liu trong b nh. Lnh th 2 s dng nh v
gin tip ghi gi tr 0 vo nh c a ch cha trong R0. Lnh th 3 tng R0 ln 1 tr ti
nh k tip. V lnh cui cng kim tra xem R0 cha a ch ca cui khi d liu cha, nu
cha th lp li cc bc trn, lnh s dng gi tr so snh l 80H m bo nh 7FH c xo
trc khi vng lp kt thc.
nh v a ch tc thi (immediate addressing)
Khi ton hng ca lnh l mt hng s, m khng phi l mt bin, th hng s ny c th ch
th ngay trong m lnh nh mt byte d liu tc thi. Byte d liu tc thi ny s nm ngay sau
byte opcode ca lnh nh trn hnh 6.20d.
Trong lnh gi nh, nh v a ch trc tip c k hiu bng du # nm trc s, 1 tn
c nh ngha trc hoc 1 biu thc s hc biu din bng s, cc tn, cc hot ng. Trnh
hp dch tnh ton gi tr v thay th d liu trc tip vo trong lnh. Hng s s c trnh hp
dch thay th bng gi tr c th nm trong byte th 2 ca m.
V d lnh :
MOV A,#12 s np gi tr 12 (0CH) vo thanh cha.
Hu ht cc lnh nh v a ch tc thi, u c d liu tc thi 8 bit, tr mt ngoi l lnh
np gi tr 16 bit vo thanh ghi DPTR.
V d lnh: MOV DPTR,#8000H s bao gm 3 byte, n np gi tr 16 bit (8000H) vo thanh
ghi con tr d liu.
155
PE
.P
TI
T.
ED
U
.V
nh a ch tng i (relative addressing)

nh v a ch tng i ch s dng vi nhng lnh nhy. Mt a ch tng i (hoc
di - offset) l 1 s 8 bit c du, n s c cng vo b m chng trnh PC chuyn iu
khin chng trnh ti v tr mi trong b nh. Phm vi chuyn iu khin nm trong khong 128 n 127. di tng i l 1 byte nm sau opcode ca lnh nh biu din trn hnh 6.20e.
Trc khi c cng thm, b m chng trnh s c tng ti a ch ca lnh nm k
lnh nhy, v a ch mi s c tnh tng i so vi a ch ny. Trong lnh ch c s di
cng thm vo PC, m khng c mt gi tr a ch tuyt i ca ni cn chuyn ti.
Trong lnh gi nh, thng thng khng ch th gi tr ca s di. ch chuyn ti s c
ch th bng mt nhn, chng trnh hp dch s chuyn i nhn thnh s di.
V d nhn THERE i din cho lnh nm nh 1040H v lnh:
SJMP THERE
trong b nh ti cc nh 1000H v 1001H, th trnh hp dch gn s di tng i l 3EH
vo byte th 2 ca m lnh (1002H + 3EH = 1040H).
nh v a ch tng i c thun li l m lnh khng ph thuc vo v tr lnh nhy trong
b nh, nhng n cng c bt li l ch chuyn iu khin c trong mt phm vi ngn t -128
n 127 byte.
nh v a ch tuyt i (Absolute Addressing)
nh v a ch tuyt i ch c dng vi cc lnh ACALL v AJMP. Cc lnh 2 byte ny
cho php r nhnh chng trnh trong cc trang nh 2K ca b nh chng trnh, n chim 11 bit
thp ca a ch ch chuyn ti (A0-A10) c cung cp trong lnh nh trn hnh 6.20f. 5 bit cao
ca a ch ch l 5 bit cao hin c trong b m chng trnh. V th lnh ch cho php r nhnh
trong vng nh 2KB (v A11 A15 khng thay i). V d nhn THERE biu din cho mt lnh
ti a ch 0F46H, v lnh:
AJMP THERE
nm ti a ch 0900H v 0901H, th trnh hp dch s m ho lnh thnh:
11100001 trong byte th nht (bao gm A10 A8 v opcode ca lnh).
V 01000110 trong byte th 2 (bao gm cc bit A7 A0).
5 bit cao ca b m chng trnh khng b thay i khi thc hin lnh ny. Ch rng a ch
ch nm trong vng 2K t 0800H ti 0FFFH.
nh v a ch tuyt i c li im l ngn (2 byte), nhng bt li v ch r nhnh c trong
mt vng gii hn v m lnh ph thuc vo v tr ca n trong b nh.
nh v a ch di (Long Addressing)
nh v a ch di ch c dng vi lnh LCALL v LJMP. Chng l cc lnh 3 byte bao
gm: 1 a ch ni chuyn ti 16 bit y nm trong byte 2 v byte 3 ca m lnh (hnh 6.20g).
li im ca lnh l c th chuyn iu khin ti bt k v tr no trong vng nh m lnh 64K,
nhng c bt li l lnh di (3 byte) v m lnh tu thuc vo v tr ca n trong b nh. Vic ph
thuc ca m lnh vo v tr, s lm chng trnh hot ng sai nu c np vo mt vng nh
khc. V d mt chng trnh bt u ti a ch 2000H, v nu c lnh LJMP 2040H, th chng
trnh s khng c ghi vo v tr khc. V d nu ghi chng trnh trn bt u ti nh 4000H,
th lnh LJMP 2040H vn chuyn iu khin v a ch 2040H, y l v tr khng ng v
chng trnh chuyn ti v tr mi.
nh v a ch ch s (Indexed Addressing)
nh v a ch ch s dng 1 thanh ghi c bn (b m chng trnh con tr d liu), v mt
s di (trong thanh ghi A) to thnh a ch tc ng (effective address), s dng cho lnh
JMP hoc MOVC.
156

Cc bng nhy hoc cc bng tra c th thc hin mt cch d dng bng cch dng nh v a
ch ch s. V d: DPTR ang tr n a ch 1000H ca EPROM ngoi, v thanh ghi A cha ni
dung l 09H th lnh: MOVC A,@A+DPTR s np ni dung ca nh 1000H+09H=1009H.
M t hot ng
Cng c nh
ED
A = A source CF
U
.V
A = A +source
Tng A
Gim A
T.
Tng DPTR
Nhn A vi B
Chia A cho B
Chnh thp phn gi tr trong A
TI
Cch vit m gi nh
Cc lnh s hc.
ADD A,source
ADD A,#data
ADDC A,#source
ADDC A,#data
SUBB A,source
SUBB A,data
INC A
INC source
DEC A
DEC source
INC DPTR
MUL AB
DIV AB
DA A
Cc lnh logic
ANL A,source
ANL A,#data
ANL direct,A
ANL direct,#data
ORL A,source
ORL A,#data
ORL direct,A
ORL direct,#data
XRL A,source
XRL A,#data
XRL direct,A
XRL direct,#data
CLR A
CPL A
RL A
RLC A
RR A
RRC A
SWAP A
6.6.2. Tp lnh ca 8051

Tp lnh ca 8051 chia ra 5 nhm lnh chnh bao gm: Cc lnh s hc, cc lnh logic, cc
dch chuyn d liu, cc lnh x l bit, cc lnh r nhnh chng trnh. Bng tham kho nhanh
ca cc lnh nh sau:
PE
.P
Logic AND
Logic OR
Logic XOR
Xo A
B 1 ca A
Quay tri A
Quay tri A qua c nh
Quay phi A
Quay phi A qua c nh
Chuyn i 2 nibble ca A
157

A = source
Chuyn d liu t b nh ngoi vo A
ED
Xo bit
U
.V
Ct vo ngn xp
Ly ra khi ngn xp
Chuyn i v tr hai d liu
Chuyn d liu t b nh RAM ni vo A
Lp bit
T.
B 1 bit
And bit vi c C
And bit o vi c C
Or bit vi c C
Or bit o vi c C
Chuyn bit vo c C
PE
.P
TI
Cc lnh truyn d liu

MOV A,source
MOV A,#data
MOV dest, A
MOV dest,source
MOV dest,#data
MOV DPTR,#data16
MOVC A,@A+DPTR
MOVC A,@A+PC
MOVX A,@Ri
MOVX A,@DPTR
PUSH direct
POP direct
XCH A,source
XCHD A@Ri
Cc lnh x l bit
CLR C
CLR bit
SETB C
SETB bit
CPL C
CPL bit
ANL C,bit
ANL C,/bit
ORL C,bit
ORL C,/bit
MOV C,bit
MOV C,/bit
JC rel
JNC rel
JB bit,rel
JNB bit,rel
JBC bit,rel
Cc lnh r nhnh
ACALL addr11
LCALL addr16
RET
RETI
AJMP addr11
LJMP addr16
SJMP rel
JMP @A+DPTR
JZ rel
JNZ rel
CJNE A,direct,rel
Nhy nu c C = 1
Nhy nu c C = 0
Nhy nu bit = 1
Nhy nu bit = 0
Nhy nu bit lp sau xo
Gi chng trnh con
Quay v t chng trnh con

Quay v t chng trnh phc v ngt
Nhy tuyt i
Nhy di
Nhy ngn
Nhy ch s
Nhy nu A = 0
Nhy nu A = 1
So snh v nhy nu khng bng
158

CJNE A,#data,rel
CJNE Rn,#data,rel
CJNE @Ri,#data,rel
DJNZ Rn,rel
DJNZ direct,rel
NOP
Gim v nhy nu cha bng 0
U
.V
ED
Vi:
- Rn: cc thanh ghi R0 R7.
- Direct: 8 bit a ch RAM ni (00 FFH).
- @Ri: nh v a ch gin tip s dng R1 v R2
- source, dest: hoc Rn hoc direct hoc @Ri
- #data: hng s 8 bit.
- #data16: hng s 16 bit.
- Bit: a ch trc tip theo bit (0 7)
- Rel: s di c du 8 bit.
- Addr11: 11 bit a ch trong trang nh 2K hin hnh.
- Addr16: 16 bit a ch.
Khng hot ng.
PE
.P
TI
T.
6.6.3. Chng trnh hp ng ca 8051

6.6.3.1.Gii thiu
Theo phn cp ngn ng lp trnh, hp ng nm gia ngn ng my v ngn ng cp cao.
Cc ngn ng cp cao in hnh nh ngn ng Pascal, c,... s dng cc t hoc cc khai bo d
hiu vi ngi s dng, mc d n vn cn khong cch rt xa so vi ngn ng t nhin. Cn
ngn ng my l ngn ng nh phn ca my tnh. Mt chng trnh ngn ng my l mt chui
cc byte nh phn biu din cho cc lnh m my tnh c th thc hin c.
Hp ng thay th cc m nh phn ca ngn ng my, thnh cc m gi nh thun li hn khi
lp trnh. V d lnh cng trong ngn ng my c biu din bng m nh phn 10110011,
cn trong hp ng l ADD. Vic lp trnh c thc hin bng hp ng thay v bng ngn ng
my.
Cc ton hng ca lnh c biu din bng cc cch nh v a ch khc nhau, trong m nh
phn ca cc lnh ngn ng my, cng c thay th bng cc k hiu trong lnh hp ng.
Mt chng trnh hp ng (assembly) khng th thc hin c trn my tnh, m n phi c
dch sang m nh phn ngn ng my. Tu thuc vo mc phc tp ca mi chng trnh, m
qu trnh dch sang chng trnh ngn ng my c th bao gm mt hoc nhiu bc. Chng
trnh dch ti thiu c gi l chng trnh hp dch, n dch cc lnh gi nh thnh cc lnh m
my. Bc i hi tip theo thng l lin kt (linker). Mt chng lin kt thc hin vic kt
hp cc phn khc nhau ca chng trnh trn cc tp tin khc nhau, v thit lp a ch trong b
nh ni chng trnh s thc hin.
6.6.3.2.Hot ng ca trnh hp dch (assembler operation)

C nhiu trnh hp dch v cc chng trnh h tr khc hin c pht trin cc ng dng vi
iu khin. ASM51 hp dch chun nht so vi cc chng trnh khc. Trong phn ny s gii
thiu v cu trc lp trnh vi ASM51. Mc d c tiu chun ho, nhng mt s khai bo
trong phn ny cng c th khng s dng c vi cc trnh hp dch khc.
159
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ASM51 l trnh hp dch mnh, n s dng cho vic pht trin h thng vi iu khin trn cc
h thng Intel v cc my tnh h IBM PC. V cc my tnh s dng chy phn mm ny c
CPU khc 8051, nn ASM51 c gi l trnh hp dch cho (cross assembler). Chng trnh
ngun 8051 c th vit trn my tnh, bng cc trnh son tho vn bn, sau c th hp dch
thnh file i tng (object) v file lit k (listing) bng ASM51. Ch rng, my tnh vi mt
CPU khc nn n s khng hiu c cc lnh nh phn ca file i tng. V th cn mt chng
trnh c kh nng np chng trnh i tng vo h thng 8051 thc hin.
thc hin vic hp dch bng ASM51, c th nh lnh sau t du nhc h thng:
ASM51 source file {assembly controls}
Source file l tn ca file ngun cn hp dch, cn assembler controls l cc kho iu khin
to ra cc tc ng khc nhau khi hp dch. ASM51 s nhn mt file ngun lm ng vo (v d
PROGRAM.SCR) v to ra 1 file i tng (PROGRAM.OBJ) v file listing (PROGRAM.LST)
V hu ht cc trnh hp dch xem xt chng trnh ngun 2 ln trong lc dch n sang ngn
ng my, nn chng c m t qua giai on hp dch (two - pass assembler) l:
Giai on 1 (pass1): file ngun c xem xt tng ng v bng k hiu c xy dng. V tr
b m chng trnh c mc nh l 0, hoc c thit lp bng ch th ORG (origin). Khi file
c xem xt, b m c tng ln tu theo di ca mi lnh. Cc ch th nh ngha d liu
(DB hoc DW) tng b m bng vi s byte c nh ngha. Cc ch th nh lu tr (DS) tng
b m bng s byte c d tr.
Khi tm thy 1 nhn (bt u mt hng r nhnh), th n s c t trong bng k hiu theo
gi tr hin hnh ca b m. Cc k hiu c nh ngha bng ch th EQU (equal) c t
trong bng k hiu. Bng k hiu c ct gi v sau dng trong giai on hp dch th 2.
Giai on 2 (pass2): to ra cc file i tng v lit k. Cc lnh gi nh c dch thnh cc
opcode v t trong file ra. Cc ton hng c nh gi tr v t pha sau opcode. Khi cc ton
hng l cc k hiu, gi tr ca chng s c ly li t bng k hiu (c to ra trong giai on
1), v dng to thnh d liu hoc a ch ng cho cc lnh.
Vi 2 giai on c thc hin nh trn, nn chng trnh ngun c th s dng cc k hiu
trc khi n c nh ngha, v d nh cc lnh r nhnh u chng trnh m cc nhn
chuyn ti cha c nh ngha.
File i tng khi hp dch thnh cng s ch cha cc byte nh phn (00H n FFH) ca
chng trnh ngn ng my. File i tng nh v (object relocatable) s cha mt bng k hiu
v thng tin khc cn thit cho s lin kt v nh v chng trnh. File lit k l mt file vn bn
bao gm c cc lnh gi nh v m my tng ng ca n. Khi c lnh li, file lit k cng cha
c cc thng bo li.
6.6.3.4.Khun dng mt chng trnh hp ng 8051

Cc lnh trong chng trnh hp ng bao gm: cc lnh my, ch th hp dch ca trnh hp
dch, lnh iu khin trnh hp dch v cc ch thch.
Cc lnh my tng ng vi cc lnh gi nh, chng c i thnh cc lnh m my khi hp
dch (v d nh ANL). Cc ch th hp dch ca trnh hp dch, c s dng trnh hp dch
nh ngha cu trc chng trnh, cc k hiu, cc d liu, cc hng... (v d ORG). Cc lnh iu
khin s thit lp cc ch hp dch, v ch th hng thc hin ca trnh hp ng (v d
$TITLE). Cc ch thch s dng gii thch v hot ng v mc ch ca cc chui lnh, gip
ngi c d hiu hn.
Cc dng lnh phi c vit theo mt nguyn tc nht nh c qui nh bi trnh hp dch.
Khun dng mi hng lnh nh sau:
160
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(label:) mnemonic [ operand ] [ ; operand ] [... ] [ ; comment ]

Ch c phn m gi nh (mnemonic) l bt buc phi c trong hng lnh trong tt c cc trnh
hp dch. Mt s trnh bin dch yu cu phi c nhn ct th nht trong tt c cc dng lnh, v
cc phn sau n phi c ngn cch vi nhau bng khong trng (space) hoc khong cch
qung (tab). Vi ASM51 nhn khng nht thit phi c trn mi hng lnh, v nhn cng khng
cn phi nm cng hng vi lnh gi nh.
Nhn (label field): Mt nhn tng trng cho a ch ca lnh (hoc d liu) nm sau n. Khi
r nhnh n lnh ny, nhn ny c dng trong ton hng ca lnh r nhnh hoc lnh nhy (v
d SJMP SKIP).
Khc vi nhn lun ch th mt a ch, k hiu (symbol) c ng dng tng qut hn. Nhn
ch l mt trong cc loi ca k hiu v n c phn bit bng du hai chm (:) pha sau. K
hiu gn cc gi tr hoc thuc tnh s dng trong cc ch th hp dch ca hp ng nh: EQU,
SEGMENT, bit, DATA... Cc k hiu c th l a ch, hng s, tn cc on (segment), hoc cc
cu trc khc c hiu bi ngi lp trnh. Sau y l 1 v d phn bit nhn v k hiu:
PAR EQU 500
; PAR l k hiu biu din thay cho gi tr 500.
START: MOV A,#0FFH
; start l nhn tng trng a ch lnh MOV.
Mt k hiu hoc nhn phi bt u bng mt ch ci, du ? hoc du _, v c th cha ti
31 k t. Cc k hiu c th l ch hoa hoc ch thng u c hiu ging nhau, nhng chng
khng c trng vi cc lnh gi nh, cc k hiu c nh ngha trc v cc ch th hp
dch.
Lnh gi nh (mnemonic): Cc lnh gi nh hoc cc ch th hp dch c vit ti phn
mnemonic ca dng lnh sau nhn hoc k hiu. V d cc lnh gi nh nh: ADD, MOV, DIV,
INC...; V d cc ch th hp dch nh: ORG, EQU hoc DB.
Ton hng (operand): Phn ton hng c vit sau phn m gi nh trong hng lnh. Vng ny
cha a ch hoc d liu s dng trong lnh. Mt nhn c th c dng biu din cho a ch
ca d liu, hoc mt k hiu c th c dng biu din cho hng d liu. C nhiu cch biu
din cc ton hng tu thuc vo cc lnh c th. Mt s lnh khng c ton hng (nh RET,
NOP), cn mt s lnh li c nhiu ton hng c phn ra bng cc du phy.
Ch thch (comment): Cc ch thch lm d hiu chng trnh, chng t cui mi dng lnh,
v trc n phi c du chm phy (;). Cng c th thc hin c mt dng ch thch bng cch bt
u bng du ;. Mt chng trnh con hoc mt on lnh di c th bt u bng mt khi ch
thch (gm nhiu dng lin tip) gii thch tnh cht chung ca phn chng trnh bn di.
Cc k hiu hp dch c bit (special assembler symbol): Cc k hiu hp dch c bit c
dng trong cc ch nh v thanh ghi c th. Chng bao gm thanh ghi A, R0 R7, DPTR, PC,
C, v AB. Cng nh k hiu $ c dng biu din gi tr hin hnh ca b m chng trnh.
V d lnh JNB TI,$ tng ng vi dng lnh sau:
HERE : JNB TI,HERE
a ch gin tip (indirect address): mt s lnh c ton hng l mt thanh ghi cha a ch ca
d liu. K hiu @ cho bit a ch gin tip v ch c th dng vi R0, R1, DPTR. V d lnh
MOV A,@R0 np d liu t RAM ni ti a ch trong R0 vo thanh cha A. Lnh MOVC
A,@A+PC np d liu t b nh m ngoi ti a ch l tng ni dung thanh ghi A vi b m
chng trnh vo thanh cha A.
D liu tc thi (Immediate data): Cc lnh s dng nh v tc thi, cung cp d liu ton hng
trong mt phn ca lnh. Cc d liu tc thi phi bt u bng du #. V d
CONSTANT
EQU 100
MOV A,#0FFH
161
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ORL 40H,#CONSTANT
Tt c cc ton hng tc thi (tr trong lnh MOV DPTR,#DATA) u l 8 bit. Nu d liu
c vit thnh 16 bit th byte thp s c s dng. Tt c cc bit trong byte cao phi ging nhau
(00H hoc FFH). Nu khng s c thng bo li value not fit in a byte (gi tr khng nm trong
mt byte).
V d cc lnh sau ng c php:
MOV A,#0FF00H
MOV A,#00FFH
Hai lnh sau y sinh ra thng bo li:
MOV A,#0FE00H
MOV A,#01FFH
Cc hng s thp phn t -256 n +256 cng c th s dng c cho ton hng tc thi. V
d 2 lnh sau ng c php v tng ng vi nhau:
MOV A,# -256
MOV A,#0FF01H
a ch trc tip (DATA address): Nhiu lnh truy xut cc vng nh s dng nh v trc tip
v cn 1 ton hng a ch RAM ni (00H n FFH). Cc k hiu c nh ngha c th c
dng cho cc a ch SFR.
V d:
MOV A,45H
hay
MOV A,SBUF tng ng vi lnh MOV A,99H.
a ch bit (bit address): Mt trong cc im mnh ca cc b vi iu khin l kh nng truy
xut cc bit ring l. Cc lnh truy xut cc bit phi cung cp 1 a ch bit trong RAM ni (vng
00H n 7FH), hoc a ch bit trong cc SFR (vng 80H n FFH).
C 3 cch ch th a ch bit trong mt lnh: dng a ch bit trc tip, dng ch s ch th v tr
ca bit trong mt byte d liu, dng k hiu hp dch c nh ngha trc.
V d:
SETB 0E7H
; Dng a ch bit trc tip
SETB ACC.7 ; Dng ch s ch th v tr bit.
JNB TI, $
; Dng k hiu c nh ngha TI.
a ch m (code address): a ch m c dng cho ton hng ca cc lnh nhy bao gm:
nhy tng i (nh SJMP v nhy c iu kin), nhy v gi tuyt i (ACALL, AJMP), nhy
v gi di (LJMP, LCAL). a ch m thng c cho dng nhn. V d:
HERE:
_
_
_
SJMP HERE
ASM51 s xc nh m a ch ng a vo lnh: hoc l a ch di 8 bit c du, hoc
a ch trang 11 bit hoc a ch di 16 bit tu theo tng lnh.
Cc lnh nhy v gi s dng chung (generic jumps and calls): ASM51 cho php ngi lp
trnh dng cc lnh gi nh s dng chung JMP hoc CALL. Lnh JMP c th c dng
thay cho SJMP, AJMP hoc LJMP, v CALL c th c dng thay cho ACALL hoc
LCALL. Trnh hp dch bin i lnh gi nh chung thnh mt lnh thc t sau vi quy lut
n gin. Lnh gi nh chung c bin i thnh dng ngn (ch s dng cho JMP) nu ni
nhy n khng theo hng ti v trong vng -128, hoc thnh dng tuyt i nu ch chuyn
n khng theo hng ti vt qu gii hn ngn, nhng nm trong vng 2K. Nu cc dng ngn
v tuyt i khng s dng c th lnh chung s c chuyn thnh dng di.
V d :
ORG 1234H
162
Start: INC A
JMP Start
;Hp dch nh lnh SJMP
ORG Start + 200
JMP Start
; Hp dch nh lnh AJMP
JMP Finish
; Hp dch nh lnh LJMP
Finish: INC A
END
S hp dch ny khng thc hin vic la chn tt nht cho chng trnh. V d nu nhy theo
hng ti (JMP Finish) ch cch khong vi byte nhng lnh chung JMP vn c i thnh lnh
nhy di (LJMP 3 byte), m khng i thnh lnh nhy ngn (SJMP ch c 1 byte).
PE
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6.6.3.5. Biu thc tnh ton tc thi khi hp dch (assemble - time expression evaluation)
Cc gi tr v hng s trong mt ton hng c th biu din theo ba cch: biu din bng gi
tr tc thi (v d 0EFH), biu din bng k hiu c nh ngha trc (v d Acc) hoc bng
mt biu thc (v d 2 + 3).
Vic s dng biu thc cung cp mt k thut mnh cho vic thc hin cc chng trnh hp
ng c kh nng d c v mm do hn. Khi hp dch cc biu thc trong lnh gi nh s c
tnh ton thnh gi tr c th a vo lnh.
Tt c cc biu thc u c tnh ton bng cc php tnh s hc 16 bit, tuy nhin cc s 8
bit cng c th s dng khi cn thit. V d hai lnh sau l hon ton tng ng:
MOV DTPR,#04FFH + 3
MOV DPTR,#0502H
Tng qut v cc nguyn tc cho cc biu thc tnh ton trong chng trnh hp ng bao gm
cc phn nh sau:
Cc s (Number bases): Cc con s trong cc biu thc thng s dng ging nh trong cc vi
x l ca Intel. Cc hng s cn phi theo sau bi cc k t qui nh: B cho s nh phn, O
hoc Q cho cc s trong h 8, D hoc khng c g cho s h 10 v H cho s h 16. V d:
MOV
A,#15
; thp phn
MOV
A,#1111B ; nh phn
MOV
A,#0FH ; hex
MOV
A,#15D ; thp phn
MOV A,#17Q
; Octal.
Ch rng cc s trong h 16 phi lun bt u bng cc con s (v d 0AH).
Cc chui k t (character strings): cc chui 1 hoc 2 k t c th c dng nh cc ton
hng trong cc biu thc. Cc m ASCII ca k t s c bin i thnh m nh phn tng ng
ca n khi hp dch. Cc hng k t phi nm trong du ngoc kp (a). V d:
CJNE
A,#Q,AGAIN.
Cc php ton s hc (Arithmetic operations): Cc php ton s hc thc hin c trong
biu thc l:
+ : cng
- : tr
. : nhn
/ : chia
MOD : php ly d sau khi chia.
V d lnh MOV A,#10+10H v lnh MOV A,#1AH l tng ng, 2 lnh MOV A,#25
MOD 7 v MOV A,#4 cng ging nhau.
163
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Cc php ton logic (logical operations): Cc php ton logic cho php trong biu thc gm:
OR, AND, XOR, NOT. Cc php ton logic c thc hin trn cc bit tng ng trong mi ton
hng. Cc php ton phi c phn cch vi nhau bng k t khong trng (space) hoc cch
qung (tab). V d 3 lnh MOV sau y ging nhau:
THERE
EQU 3
MINUS_THREE EQU_3
MOV A,# (NOT THREE) +1
MOV A,#MINUS_THREE
MOV A,#11111101B
Cc php x l c bit (special operations): Cc php x l c bit l: SHR (dch phi), SHL
(dch tri), HIGH (byte cao), LOW (byte thp)
V d 2 lnh: MOV A,#8 SHL 1 v MOV A,#10H thc hin cng mt vic ging nhau, v hai
lnh MOV A,#HIGH 1234H v lnh MOV A,12H cng tng ng.
Cc php so snh (Relation Operators): Khi thc hin php so snh 2 ton hng th kt qu
hoc sai (0000H) hoc ng (FFFFH). Cc php so snh cho php trong biu thc bao gm:
EQ = equals
bng.
NE
<> not equals
khng bng.
LT < less than
nh hn.
LE <= less than or equals to nh hn hoc bng
GT
> greater than
ln hn.
GE >=
greater than or equals to ln hn hoc bng.
Ch rng mi php so snh c th vit hai dng (v d EQ hoc =).
V d cc lnh sau u c kt qu trong A = 0FFH:
MOV A,#5=5
MOV A,#5 NE 4
MOV A,#100 GE 50
MOV A,X LT Z
MOV A,X >=X
u tin ca cc php ton (operator precedence): S u tin ca cc php ton trong mt
biu thc t cao xung thp l:
()
HIGH, LOW
*, /, MOD, SHL, SHR
+, EQ, NE, LT, LE, GT, GE, =, <>, <, <=, >, >=
NOT
AND
OR XOR
Khi s dng cc php ton c cng u tin trong mt biu thc th chng c thc hin t
tri sang phi.
6.6.3.6. Cc ch th hp dch
ASM51 cung cp cc loi ch th sau:
- iu khin trng thi hp dch (ORG, AND,USING).
- nh ngha k hiu (SEGMENT, EQU, SET, DATA, NDATA, BIT, CODE).
164

- Khi ng gi tr/khai bo hng bin (DS, DBIT, DB, DW)
- Lin kt chng trnh (PUBLIC, EXTRN, NAME)
- Chn on (PSEG, CSEG, DSEG, ISEG, BSEG, XSEG).
Ch th iu khin trng thi hp dch
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+ Ch th ORG (origin):
Dng ca ch th ORG l:
ORG expression.
Ch th ORG thay i gi tr ca b m chng trnh, n khi ng mt gi tr mi cho b
m chng trnh bng mt biu thc i sau n.
V d: sau lnh ORG 100H , gi tr ca b m chng trnh s l 100H
Sau lnh ORG ($ +1000H) AND 0F000H s thit lp b m chng trnh tr ti vng 4 K
k tip.
+ Ch th END:
Ch th END t cui cng trong file ngun.
Dng ca n l:
END
+ Ch th USING:
Dng ca ch th ny l:
USING expression
Ch th USING cho php chng trnh chuyn i tp thanh ghi tch cc hin hnh. Cc lnh
theo sau s dng cc k hiu ca a ch thanh ghi c nh ngha trc AR0 AR7, s c
trnh hp dch chuyn i thnh a ch trc tip thch hp cho tp thanh ghi ang tch cc. V d
trong chui lnh sau:
USING 3 ; tch cc tp thanh ghi th 3
PUSH AR7
; ct a ch ca R7. (a ch R7 hin hnh = 1FH)
USING 1 ; tch cc tp thanh ghi th 1
PUSH AR7
; ct a ch hin hnh ca R7 thuc bng 1 = 0FH
Ch rng ch th USING khng thc s thc hin vic chuyn tp thanh ghi tch cc, n ch
thng bo cho trnh bin dch bit tp thanh ghi tch cc. Khi mun chuyn bng thanh ghi phi
thc hin cc lnh gi nh thch hp thay i gi tr cc bit 3 v 4 ca PSW. V d trn s phi
thc hin nh sau:
MOV PSW,#00011000B ;chn tp thanh ghi th 3
USING 3
PUSH AR7
; ct gi tr 1FH vo ngn xp
MOV PSW,#00001000B ; chn tp thanh ghi th 1
USING 1
PUSH AR7
; ct gi tr 0FH vo ngn xp
nh ngha k hiu (symbol definition)
K hiu nh ngha, cho php to ra cc k hiu biu din cho cc on, cc thanh ghi, cc
hng s v cc a ch. Chng bao gm:
+ Segment:
Dng ca ch th segment nh sau: symbol SEGMENT segment_type
Trong symbol l tn ca segment. ASM51 s dng nhiu loi on hn cc trnh bin dch
khc. Cc kiu on ca n c th l: CODE (on m lnh) XDATA (on d liu ngoi),
DATA (vng d liu ni c th truy xut bng nh v trc tip t 00H n 7FH), IDATA (ton
b vng d liu ni), BIT (vng a ch theo bit, trng vi cc a ch byte t 20H n 2FH ca
RAM ni).
V d EPROM SEGMENT CODE khai bo k hiu EPROM l 1 SEGMENT kiu CODE.
165
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+EQU (equal):
Dng ca ch th EQU:
symbol EQU expression
Ch th EQU gn mt gi tr bng mt tn c th, ch tn phi khc lnh gi nh, khng
trng nhau, bt u bng ch, khng c khong trng v cc i 31 k t. V d:
N27 EQU 27
HERE EQU $
CR EQU 0DH
MESSAGE: EQU This is a message
+ Cc ch th nh ngha k hiu khc:
Ch th SET tng t nh ch th EQU ch khc ch k hiu s dng trong ch th SET c
th s dng li trong mt ch th SET khc.
Cc ch th DATA, IDATA, XDATA, BIT v CODE s dng gn a ch ca cc on
tng ng cho mt k hiu. Cc ch th ny khng phi l cc ch th c bn. C th thc hin mt
cch tng t vi ch th EQU.
Khi ng gi tr/khai bo hng bin (storage initialization/reservation)
Cc ch th ny cho php khi ng gi tr cho mt bin hoc khai bo 1 vng nh (1 t, 1
byte hoc 1 bit). Cc gi tr/bin khai bo bt u ti vng nh c ch nh bi gi tr hin hnh
ca b m chng trnh. Cc ch th ny c th nm sau 1 nhn.
+ Khi ng gi tr ( DS - define storage):
Dng ca DS l:
[ label: ] DS expression.
Ch th DS khai bo bin 1 byte trong b nh. N c th c dng trong bt k kiu on
no, ngoi tr on BIT. Khi gp pht biu DS trong chng trnh, th b m chng trnh ca
segment hin hnh c tng 1 khong, bng gi khai bo. Tng ca b m chng trnh v
gi tr c khai bo, khng c vt qu gii hn ca vng a ch hin hnh.
Cc lnh sau to ra 1 vng m 40 byte trong on d liu ni:
DSEG AT 30H
; t vo segment DATA ni
LENGTH EQU 40
BUFFER: DS LENGTH
; khai bo 40 byte.
Nhn BUFFE biu din cho a ch u tin ca vng nh c khai bo. Trong v d trn
BUFFER bt u a ch 30H bi v AT 30H c ch ra trong DSEG. Vng m ny c
th xa nh sau:
MOV R7,#LENGTH
MOV R0,# BUFFER
LOOP: MOV @R0,#0
DJNZ R7,LOOP
to ra 1 vng m 1000 byte trong RAM ngoi bt u ti a ch 4000H, c th s dng

cc ch th sau:
XSTART EQU 4000H
XLENGTH
EQU 1000
XSEG AT XSTART
XBUFFER:
DS
XLENGTH
Cc lnh sau y xa vng m trn:
MOV DPTR,#XBUFFER ; a a ch 4000H vo 0 DPTR
LOOP: CLR A
166
PE
.P
TI
T.
ED
U
.V
MOVX @DPTR,A
; Xa ni dung ti a ch 4000H tr i
INC DPTR
; tng thm 1 (trng hp u 4001H)
MOV A, DPL
CJNE A,#LOW (XBUFFER = XLENGTH + 10),LOOP
MOV A, DPH
CJNE #HIGH (XBUFFER = XLENGTH + 1), LOOP
y l mt v d in hnh v li im ca ASM51 trong vic s dng cc ch th v cc biu

thc hp dch. cc lnh khng cn phi so snh con tr d liu vi cc gi tr tc thi, th k
hiu cn c khai bo trc. C 2 lnh so snh dng trn, vi byte thp v byte cao DPTR. V
lnh CJNE ch lm nhim v i vi thanh ghi A hoc thanh ghi Rn, do byte thp hoc byte
cao ca b m d liu phi c MOV vo A trc lnh CJNE. Vng lp ch kt thc khi b
m d liu t c gi tr XBUFFER = LENGTH +1.
+ Khai bo DBIT (define bit):
Dng ca ch th DBIT c vit: [ label:]
Dbit
expression
Ch th DBIT khai bo mt bin bit, v cp trc cho bin ny mt bit nh, n ch c th c
dng trong on bit. Khi gp pht biu DBIT trong chng trnh, th b m v tr ca on bit
hin hnh c cng thm gi tr ca biu thc khai bo. Ch rng on bit c n v tng ca
b m v tr l bit ch khng phi byte. Cc ch th sau khai bo mt on bit v khai bo ba c
trong :
BSEG
KBFLAG: DBIT 1
PRFLAG DBIT 1
DKFLAG DBIT 1
+ Khai bo byte DB (define byte):
Dng ca ch th DB l: [label:]
DB expression [,expression] [...]
Ch th DB khi ng trong chng trnh vi cc gi tr byte, ch th ny khai bo d liu
trong vng nh chng trnh, nn on CODE phi tch cc. Danh sch biu thc l 1 chui ca 1
hoc nhiu gi tr byte (mi ci c th l 1 biu thc) c phn cch bng du phy.
Ch th DB cho php cc chui di hn 2 k t (c km theo trong du ngoc kp n). Mi
k t trong chui c bin thnh m ASCII tng ng ca chng. Nu 1 nhn c dng, th
nhn c n nh a ch ca byte u tin.
V d: CSEG AT 0100H
SQUARES: DB
0,1,4,9,16,25 ; bnh phng t 0 n 5
MESSAGE: DB
Login:,0
Kt qu trong b nh chng trnh ngoi s c cc gi tr nh sau:
a ch
0100H
0101H
0102H
0103H
0104H
0105H
0106H
Gi tr
00H
01H
04H
09H
10H
19H
4C
167

0107H
0108H
0109H
010AH
010BH
010CH
6F
67
69
6E
3A
00
Gi tr
12H
34H
00H
02H
Ch thch
Byte cao ca 1234H
Byte thp ca 1234H
Byte cao ca 2
Byte thp ca 2
T.
ED
a ch
0200H
0201H
0202H
0203H
U
.V
+ Khai bo t DW (define word):

Dng ca ch th DW l: [label:]
DW expression [,expression] [...]
Ch th DW tng t ch th DB, ch khc l n dnh ra hai nh 1 byte cho bin khai bo.
V d sau cc ch th sau:
CSEG AT 200H
DW 1234H,2.
Cc gi tr trong b nh ngoi s l:
PE
.P
TI
6.6.3.7. Lin kt chng trnh

Ch th lin kt chng trnh cho php ghp nhiu module (file), bng cch khai bo s lin
kt trong module v tn ca cc module cn lin kt. Mt module c th bao gm mt hoc nhiu
file.
Ch th PUBLIC:
Dng ca ch th PUBLIC c khai bo nh sau:
PUBLIC symbol2 [,symbol2]
Ch th ny cho php lit k cc k hiu s dng trong mt module khc vi module hin
hnh. Vic khai bo ny cho php tham kho ti cc module khc. V d: PUBLIC INCHAR,
OUTCHAR, INLINE, OUTLINE
Ch th EXTRN (external):
Dng ca ch th EXTRN c vit nh sau:
EXTRN segment_type (symbol [,symbol], )
Ch th ny cho php lit k cc k hiu tham kho trong module hin hnh, m n c
nh ngha trong cc module khc. Vic lit k cc k hiu bn ngoi cn km theo loi on
c khai bo ng vi mi k hiu. Kiu on khai bo s ch th cch m k hiu s c s
dng.
6.7.
B NH ROM CA VI IU KHIN 8051
Cc b vi iu khin thng c ch to vi nhiu loi ROM khc nhau. Cng ging nh

cc b nh ROM thng thng, ROM ni ca cc b vi iu khin c cc loi nh:
- Mask ROM: ROM lp trnh khi ch to v khng th lp trnh li, cc loi vi iu khin
ny thng nm trong cc thit b in t, do cc hng ch to thit b t hng.
168
U
.V
- EPROM: loi ny c th lp trnh nhiu ln bi ngi s dng, xo bng tia cc tm.

- EEROM: lp trnh v xo bng in p cao.
Cc vi iu khin thng thng u c hai ch hot ng: vi chng trnh bn trong
ROM ni, hoc chng trnh bn ngoi s dng cho cc ng dng ln m dung lng b nh ni
khng p ng.
V d vic lp trnh cho 2KB EPROM ni ca 8051 thc hin theo s hnh 6.21.
Cc ch lp trnh bao gm:
Np chng trnh vo EPROM (Program): thc hin vic np chng trnh vo EPROM,
8051 cn chy vi tn s dao ng 4 ti 6 MHz cung cp bng thnh anh t bn ngoi (v cn phi
chuyn a ch v d liu mun lp trnh vo cc thanh ghi ni). Bt u a ch nh u tin
mun lp trnh ca EPROM cn c cung cp vo P1 v cc ng P2.0 P2.3 ca P2, cng vi
d liu cn lp trnh cung cp ti P0. Cc tn hiu cn li ca P2 l RST, PSEN v EA phi c
gi ti cc mc logic cho ch Program, ch nh trong bng trn. Ng vo ALE c cung
cp xung lp trnh 50 msec mc thp, lc ny m lnh cung cp P0 s c np vo a ch ch
nh trn P1 v P2.
+5V
Cung cp a ch
nh mun lp trnh
VCC
ED
P1
P2.0
P2.3
Dont care
Dont care
VIH
VIL
ALE
T.
P2.4
P2.5
P2.6
P2.7
XTAL2
P0
Cung cp d liu cn
lp trnh
Xung lp
trnh 50 msec
Vpp
RST
VIH
TI
EA
XTAL1
PSEN
VSS
.P
Hnh 6.23: S cung cp tn hiu lp trnh cho 8051.
Cc tn hiu s dng cho vic lp trnh 8051 c cho trong bng sau:
RST
1
PSEN
0
ALE
EA
Vpp
P2.7
1
P2.6
0
Inhibit
Verify
1
1
0
0
1
1
X
1
1
0
0
0
Vpp
PE
Mode
Program
Security
P1, P2
Address
input
Dont care
Address
input
Dont care
P0
Data input
Dont care
Data
output
Dont care
Thng thng EA c gi mc logic cao cho n ngay trc khi cp xung lp trnh ti ng
vo ALE. Sau EA c a ln mc ngun lp trnh Vpp (thng 12V hoc 21V tu thuc
vo tng loi 8051), khi ht xung ALE cn chuyn ng vo ny tr v mc logic cao. Ch rng
ng vo ny khng c vt qu mc lp trnh ch nh (12,5 V hoc 21,5V), ngay c nhng
nhiu hp trn ng ngun ny cng c th lm h hng 8051. Tn hiu xung lp trnh cng
khng c c sai s qu ln.
169
ED
U
.V
Ch kim tra lp trnh (Verify): Ch ny s dng xem d liu mi c lp trnh c ng

khng. Vi ch ny, c th c li d liu ghi vo EPROM ri so snh vi d liu lp trnh.
Nu hai d liu ny khng ging nhau th vic lp trnh mi thc hin khng thnh cng. Nguyn
nhn c th do EPROM b hng, ngun hoc xung lp trnh khng c m bo ng.
Ch ny ch thc hin c khi cc bit bo mt (security) khng c lp trnh. c d
liu nh no cn cung cp a ch ti P1 v P2. Cc tn hiu khc cn gi ng mc logic nh
ch nh. D liu trong nh ch nh s c a ra P0.
Ch cm lp trnh (inhibit): Ch ny s dng i a ch v d liu cn lp trnh cho
mt nh khc. Thng thng ch ny thc hin vi EA mc logic cao, n khc vi ch
lp trnh l khng cp xung lp trnh (ALE = 1). Ch ny cng ch khc ch kim tra lp
trnh ch EA khng cn thit phi logic cao.
Ch bo mt chng trnh (Security): ch ny thc hin vic lp trnh cc bit bo mt, khi
cc bit bo mt c lp trnh, chng trnh lp trnh trong EPROM s khng c c ra
bn ngoi. Cc tn hiu cn cung cp cho 8051 trong ch ny cng ging nh ch lp trnh,
ngoi tr P2.6 c gi mc logic cao, P0, P1 v P2.0 P2.3 c th bt c trng thi no. Cc
tn hiu cn li phi c gi mc logic ng nh ch nh. Khi lp trnh cc bit bo mt,
th chng ch c xo khi xo ton b d liu trong EPROM.
PE
.P
TI
T.
Tm tt ni dung chng:
Vi iu khin l mt h thng vi x l bao gm CPU, b nh v vo ra c tch hp vo
trong mt vi mch duy nht. V th, vic thc hin phn cng cho h thng vi iu khin s
rt n gin, nn n thch hp cho cc ng dng nh khng yu cu dung lng b nh v
vo ra ln.
V b nh ca cc vi iu khin s thay i tu theo tng loi trong h, cc thanh ghi ca
8051 c thit k nm ngay trong b nh RAM ca n, v th cc thanh ghi c th truy cp
bng a ch RAM ni hoc bng tn ca chng.
Cc thanh ghi a nng bao gm R0 R7 c th s dng lu tr d liu, R0 v R1 c th s
dng lm thanh ghi a ch. truy cp b nh ngoi s dng thanh ghi con tr d liu
DPTR. Thanh ghi con tr ngn xp 8 bit khi khi ng s mang gi tr 07 v nh ngn xp s
bt u ti nh 08. Thanh ghi cha 8 bit A s dng cho tt c cc lnh logic, s hc v thanh
ghi cha ph B s dng cng A trong cc lnh nhn chia. Cc thanh ghi cho cng song song
l P0 P3. Cc thanh ghi cho cng ni tip l SMOD khi ng cng ni tip v SBUF s
dng truyn d liu qua cng ni tip. Cc thanh ghi cho Timer l: TMOD khi ng ch
timer, TCON iu khin hot ng timer, TH1, TL1 l cc thanh ghi m cho timer 1, TH0,
TL0 l cc thanh ghi m cho timer 0. Cc thanh ghi cho vic iu khin ngt: IE l thanh ghi
cho php ngt v IP l thanh ghi lp trnh u tin cho cc ngun ngt.
i vi cc cng song song c th truy cp 8 bit ca tng cng bng lnh MOV, cng c th
truy cp tng bit ca cng bng lnh SETB hoc CLR. Ch khi mun c mt cng vo trc
tin cn phi khi ng n bng cch cp ra bit 1.
i vi cng ni tip, trc tin cn chn ch hot ng bng cch ghi gi tr ti SMOD,
sau c th truyn nhn d liu bng cch ghi hoc c thanh ghi SBUF. Ch khi chn
cc ch c tc truyn thay i, cn khi ng Timer 1 hot ng ch 2 vi gi tr
m tng ng vi tc truyn d liu mong mun. Ngoi ra tc truyn d liu trong cc
ch cn ph thuc vo trng thi SMOD trong thanh ghi PCON.
170
U
.V
i vi timer cn chn ch timer bng cch ghi gi tr ti thanh ghi TMOD, sau khi
ng gi tr cho b m timer bng cch ghi gi tr vo cc thanh ghi THx v TLx. B m
Timer s bt u m tng khi iu kin cho php (tu theo cc bit GATE, TR v ng vo
INTx), vi ch cho php bn trong (GATE=0) th lnh SETB TRx s lm b m bt u
m ln. B m s m ln ti gi tr cc i (tt c cc bit bng 1) thm mt xung n s
quay v 0 v c TFx s lp, chng trnh c th s dng lnh JNB TFx,@ gim st qu
trnh m.
i vi ngt, trc ht cn lp trnh cho php ngt bng cch ghi gi tr vo thanh ghi IE, khi
mun ngt no c u tin cao hn c th lp trnh bit tng ng cho thanh ghi IP. Cc ngt
ngoi xy ra khi tc ng cnh xung hoc mc thp ti cc ng vo INTx. Ngt cng ni tip
xy ra khi nhn xong hoc truyn xong mt byte d liu. Ngt timer xy ra khi c trn TFx
c lp. Khi xy ra mt ngt iu khin chng trnh s chuyn v mt a ch c nh c
quy nh trc.
PE
.P
TI
T.
ED
BI TP
Bi 1: Thc hin chui lnh thc hin vic OR bit ti a ch 00 vi bit ti a ch 01 kt qu ghi
vo a ch 02 trong RAM ni ca 8051.
Bi 2: Cc a ch bit no c lp sau chui lnh sau:
MOV R0,#26H
MOV @R0,#7AH
Bi 3:M t chui lnh ghi gi tr 0ABH vo a ch 9A00H ca RAM ngoi trong h thng 8051.
Bi 4: Gi s 8051 hot ng vi thch anh 18 MHz, xc nh tn s xung ca ng ra ALE khi
khng c lnh truy cp b nh ngoi no c thc hin.
Bi 5: Tn hiu iu khin no ca 8051 s dng chn cc b nh EPROM v RAM ngoi.
Bi 6: Vit lnh lp bit thp nht ca thanh ghi cha m khng nh hng ti cc bit khc.
Bi 7: Vit chui lnh chp ni dung thanh ghi R7 vo a ch 100H ca b nh RAM ngoi.
Bi 8: Gi s lnh u tin thc hin sau khi Reset h thng l mt lnh gi chng trnh con,
thanh ghi PC s c cha vo a ch no ca RAM ni trc khi iu khin c chuyn
ti chng trnh con.
Bi 9: Lnh no chuyn 8051 qua ch power down.
Bi 10: Vit chui lnh chuyn gi tr trong nh c a ch 50H ca RAM ni vo thanh ghi
cha s dng nh v a ch gin tip.
Bi 11: Tnh gi tr offset tng i cho lnh SJMP AHEAD, gi s lnh ny nm ti a ch
0400H v 0401H, v nhn AHEAD biu din cho lnh nm ti a ch 041FH.
Bi 12: Tnh gi tr offset tng i cho lnh SJMP AHEAD, gi s lnh ny nm ti a ch
A050H v A051H, v nhn AHEAD biu din cho lnh nm ti a ch 9FE0H.
Bi 13: Gi s thanh ghi A cha gi tr 5AH. Gi tr ca A s bng bao nhiu sau khi lnh XRL
A,#0FFH c thc hin.
Bi 14: Nu PSW cha gi tr 0C0H v A cha gi tr 50H, sau khi lnh RLC A thc hin thanh
cha s c gi tr l bao nhiu ?
Bi 15: Gi s 8051 hot ng vi thnh anh 12 MHz, vit on chng trnh to ra xung vung
83.3 kHz trn cng P1.7.
Bi 16: Vit chng trnh to ra xung tc ng mc cao trong 4 sec trn cng P1.7 sau mi 200
sec.
Bi 17: Vit cc on chng trnh thc hin cc hm logic nh trn hnh v sau:
171
P1.4
P1.5
P1.6
P1.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.7
U
.V
Bi 18: Xc nh gi tr ca thanh cha sau khi cc lnh sau c thc hin:

MOV A,#7FH
MOV 50H,#29H
MOV R0,#50H
XCHD A,@R0
Bi 19: Vit cc lnh chp c zero trong thanh ghi PSW ti cng P1.5.
Bi 20: Mt cng tc 4 v tr v mt b led 7 on c ni vi 8051 nh hnh v:
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P1.8
a
b
c
d
e
f
g
dp
T.
P3.0
P3.1
P3.2
P3.3
ED
8051
PE
.P
TI
Vit on chng trnh nhn d liu t cc cng tc cng 3, ri hin th gi tr nh phn

tng ng ca n ln led 7 on.
Bi 21: iu g nh hng sau khi thc hin lnh SETB 8EH.
Bi 22: iu g nh hng sau khi thc hin lnh MOV TMOD,#110010101B.
Bi 23: Vit chng trnh pht xung vung 12 KHz ng ra P1.2 s dng Timer0.
Bi 24: Vit chng trnh khi ng cng ni tip ca 8051 ch 8 bit UART. Sau thc
hin cc chng trnh con sau:
a) OUTSTR thc hin vic gi mt chui k t ASCII kt thc vi byte bng 0 ra cng
ni tip. Chui ASCII c cha trong b nh RAM ngoi c a ch xc nh bng
gi tr trong thanh ghi con tr d liu DPTR, c thit lp trc khi gi chng trnh
con.
b) INLINE nhp mt dng k t ASCII kt thc bng m Carriage return (0AH, 0DH) t
ng vo cng ni tip t vo b nh RAM ni bt u ti a ch 50H.
c) Vit chng trnh s dng chng trnh con OUTSTR gi mt chui m ASCII c th
hin th ti thit b kt ni vi cng ni tip ca 8051.
Bi 25: Thit k mch tng s lng cng song song ca 8051 s dng cng ni tip ch
thanh ghi dch. Vit chng trnh khi ng cng ni tip ca 8051 v cung cp d liu ra
cng trn vi tc 10 ln /sec.
Bi 26: Vit chng trnh tm v tr bit 1 c trng s nh nht trong thanh ghi cha, np v tr tm
c vo thanh ghi R7. V d A = 0001000B th R7 = 4.
172
Chng 7: Thit k h thng chuyn dng vi vi iu khin 8051
CHNG VII: THIT K H THNG CHUYN DNG VI

VI IU KHIN 8051
TI
T.
ED
U
.V
Gii thiu:
Ni dung chng ny cung cp phng php thc hin cc h thng vi iu khin cho cc ng
dng c th, bng cc v d c th nh thit k h thng o thng s tn hiu xung v h thng
truyn d liu ni tip.
Cng ging nh vic thit k cc h thng vi x l chuyn dng, trc tin cn phn tch
nhim v m h thng cn thc hin a ra cc yu cu c th v phn cng v phn mm. Sau
t cc yu cu c th , xy dng nn s phn cng vi cc khi mch chc nng cn
thit, tip theo thc hin cc gii thut phn mm cho chng trnh iu khin, v cui cng l
vit chng trnh iu khin cho h thng.
V h thng o thng s tn hiu xung, trc ht cn hiu c ngha ca cc thng s cn
o, tip theo tm hiu v nguyn tc o cc thng s . Ch khi hiu r c nhim v cn thc
hin ca h thng, chng ta mi c th thc hin c h thng vi x l thc hin nhim v .
y cn ch ti chc nng ca timer v cch s dng n trong vic o lng rng xung.
Ngoi ra cng cn tm hiu v cc LED 7 on v nguyn tc iu khin mt b hin th LED 7
on theo kiu multiplex.
V h thng truyn d liu ni tip, trc ht cn hiu r hot ng ca cng ni tip 8051, v
vi phn cng truyn nhn ni tip c tch hp sn, trong s phn cng ch cn ch ti
vic i mc tn hiu s ph hp gia vi iu khin v my tnh. V phn mm truyn nhn
trn my tnh cn tm hiu cch s dng i tng MSCOMM trong th vin MSDN.
.P
7.1. THIT K H THNG O THNG S TN HIU XUNG
PE
7.1.1. Nguyn tc o rng xung

o rng xung ca xung vung c chu k nhim v 50%, c th thc hin bng cch
m s xung chun lng vo c chu k T0 vo bn k dng ca bn k tn hiu cn o nh trn
hnh 7.1.
B to xung
chun
T0
AND
B m
Hin th kt
qu.
Hnh 7.1: Nguyn tc o rng xung.
Trn hnh 7.1, cng AND s cho php cc xung T0 chuyn ti ng vo b m khi xung cn
o mc cao. S m c trong thi gian xung cn o mc 1 s tng ng vi rng ca n.
Gi tr m c s c hin th ngi s dng thy c kt qu o. Theo nguyn tc ny s
c rng xung cn o Tx = N.T0, vi T0 l chu k xung chun v N l s xung m c.
Tuy nhin o lin tc th b m cn c xo v 0 trc khi xung cn o ln mc cao tr li.
173
PE
.P
TI
T.
ED
U
.V
7.1.2. S phn cng ca h thng o rng xung bng vi iu khin

Vi cc h thng vi iu khin vic m thi gian cho mt xung c th thc hin theo hai
cch: Hoc c th s dng cc chng trnh to tr bng phn mm, thi gian T0 c thc hin
cc lnh. thc hin mt lnh, vi iu khin cn tn mt khong thi gian nht nh, v thng
thng chng ta c th s dng cc vng lp to ra thi gian mong mun.
Hnh 7.2: S mch phn cng my o rng xung
Cch th 2 c th s dng cc b nh thi (Timer) trong vi iu khin, khi xung cn m

c s dng cho php timer bt u m v s xung chun ca h thng m c trong
Timer s tng ng vi rng xung cn o. S phn cng h thng o rng xung s dng
timer ca vi iu khin 8951 trnh by trn hnh 7.2. Trn s , t C1 v in tr R1 s dng lm
mch Reset khi cp ngun, khi mi cp ngun t C1 np cp Vcc vo chn RST (Reset CPU), khi
t np y chn RST s c mc 0 (ngng Reset). T C2, C3 v thch anh Y1 l cc linh kin
to dao ng cho hot ng ca mch vi iu khin. J1 l ng vo ca xung cn o rng. 8
174

LED 7 on s dng hin th gi tr o c, b hin th ny c iu khin theo cch Multiplex.
mt LED sng ln mt s, cn phi cp ngun vo chn CA (Commond Anode) ca n, bng
cc cp mc 1 ra ng tng ng trn cng P2 lm Transistor dn, mt khc on LED sng
cn cp mc 1 ti cng P0 tng ng transitor darlington trong IC ULN2803 dn, cp mc 0
cho on LED .
7.1.3. Xy dng chng trnh iu khin
Sai
ED
P3.2 = 0 ?
U
.V
Khi ng Timer
P3.2 = input
Start
ng
T.
Lu s m c trong
Xo b m v 0
TI
Call HEX to DEC
Call Display
.P
Call DEC to LED7 code
PE
Hnh 7.3. Gii thut chng trnh chnh h thng o rng xung.
Nhim v h thng thc hin vic o rng xung ng vo v hin th gi tr o c ln cc

LED 7 on. C th chia thnh cc nhim v nh nh sau:
Khi ng b nh thi ch m 16 bit xung chun bn trong chip cho php v
ngng m t bn ngoi. Khi khi ng xong b m s bt u m ln khi chn INT0
mc cao.
Gim st ng vo INT0, khi bng 0 b m ngng m th gi tr m c chnh l
rng xung cn o tnh bng sec. Ly gi tr ny lu vo bin chun b hin th. Nu
chn ny cha bng 0 th chuyn qua chng trnh hin th.
Gi tr m c l s HEX cn phi i ra gi tr thp phn tng ng.
thy c trn LED cn i gi tr thp phn ra m LED 7 on.
Hin th ln LED.
Gii thut cho chng trnh c th biu din trn hnh 7.3. Trn s gii thut cc cng vic:
i gi tr thp lc phn ra thp phn, i gi tr thp phn ra m LED 7 on v hin th l cc
175

nhim v kh phc tp nn c tch thnh cc chng trnh con. Vic tch chng trnh con lm
cho thut ton d hiu hn v chng trnh d kim sot g ri hn khi thc hin chng trnh.
i s thp lc phn thnh s thp phn, do s thp lc phn 16 bit ln nht l FFFFH =
65535, nn c th s dng gii thut chia cho 10000, sau ly s d cn li chia cho 1000, ly
s d chia tip cho 100, ly s d cn li chia tip cho 10 v cui cng s d cn li s l hng
n v. Gii thut chng trnh con ny c th m t trn hnh 7.4. vi X l s Hex cn i. Tuy
nhin tp lnh ca 8051 khng c lnh chia 16 bit, v vy vic chia ny c th thc hin bng
php tr nhiu ln.
X10000 ?
?
Sai
X/10000= ChucNgan
ED
D = D1
U
.V
ng
Start
D11000 ?
?
Sai
T.
ng
D1/1000= Ngan
TI
D = D2
PE
.P
ng
D2100 ?
?
Sai
D2/100= Tram
D = D3
D310 ?
?
D2/10= Chuc
D = DonVi
Ret
Hnh 7.4. Gii thut chng trnh i HEX ra DEC.
i gi tr thp phn ra m LED 7 on c th s dng phng php tra bng d liu.
Trc ht cn nh ngha mt bng d liu vi 10 m LED 7 on tng ng vi cc s thp phn
176
t 0 ti 9, cc m ny c sp xp theo trnh t tng dn ca cc s thp phn tng ng vi n

trong bng d liu. S thp cn i phi c tch ring r ra tng ch s, nu a ch u bng l
X th a ch (X+i) s cha m LED 7 on tng ng vi s thp phn i. Cng vic ny c th
thc hin d dng bng ch a ch ch s @A+DPTR, vi DPTR l a ch u bng d liu v
A l s thp phn cn i.
hin th, vi 8 LED 7 on c th khai bo 8 bin trong b nh cha 8 m cn hin th.
Chng trnh hin th c th thc hin bng mt vng For 8 ln, trong mi vng s gi m hin
th ra cng 1 v gi m chn LED ra cng 2. Gii thut chng trnh con ny m t trn hnh 7.5.
U
.V
Start
i=8
Position = 00000001B
7Code=a ch u bng
hin th
i = 0?
?
ng
TI
Sai
T.
ED
Port2=Position
Port1=7Code[i]
i=i-1
Quay tri Position
.P
Ret
Hnh 7.5. Gii thut chng trnh con hin th d liu.
Vi cc gii thut xy dng chng trnh phn mm bng hp ng cho h thng c th vit
nh sau:
PE
:Chng trnh chnh

ORG 0
HEX1 EQU 10H
HEX2 EQU 11H
MOV TMOD,#00001001B
MOV SP,#30H
SETB P3.2
MOV 08H,#00H
MOV 09H,#00H
MOV 0AH,#00H
MOV 0BH,#00H
MOV 0CH,#00H
MOV 0DH,#00H
MOV 0EH,#00H
;Khi ng Timer cho php t bn ngoi, ch timer 1.

;Khi ng nh ngn xp ti a ch 30h
;Khi ng chn P3.2 l ng vo
;Khi ng 8 nh hin th gi tr LED khng sng.
177
PE
.P
TI
T.
ED
U
.V
MOV 0FH,#3FH
;n thp nht khi khi ng sng s 0
CONT: JB P3.2 DISP
;P3.2 = 1 hin th d liu
MOV HEX1,TL
;Lu d liu ca b m timer
MOV HEX2,TH
MOV TL,#0
;Xo b m
MOV TH,#0
ACALL HEXtoDEC
;Gi chng trnh i ra gi tr thp phn
ACALL DECtoLED7
;Gi chng trnh i ra gi tr hin th
DISP: ACALL DISPLAY
;Gi chng trnh con hin th
SJMP CONT
;Chng trnh con i s HEX ra s DEC
ChucNgan EQU 20H
Ngan
EQU 21H
Tram
EQU 22H
Chuc
EQU 23H
Donvi
EQU 24H
HEXtoDEC: MOV ChucNgan,#0
MOV Ngan,#0
MOV Tram,#0
MOV Chuc,#0
MOV DonVi,#0
TinhChucNgan: CJNE HEX2,#HIGH(10000),CN1
;Kim tra s HEX c ln hn 10000
CJNE HEX1,#LOW(10000),CN2
;Bng th tnh hng chc ngn.
TinhChucNgan1: MOV SoTruHi,#High(10000)
MOV SoTruLo,#Low(10000)
ACALL CHIA
;Tnh gi tr hng chc ngn
INC ChucNgan
;c 1 ln chc ngn
SJMP TinhChucNgan
;Tip tc so snh vi 10000.
CN2:
JNC TinhChucNgan1
;Byte cao bng byte thp ln hn HEX>10000
SJMP TinhNgan
;Byte cao bng byte thp nh hn HEX<10000
CN1:
JNC TinhChucNgan1
;byte cao ln hn th HEX>10000
TinhNgan: CJNE HEX2,#HIGH(1000),N1
;HEX<10000 th Kim tra s HEX > 1000 ?
CJNE HEX1,#LOW(1000),N2
;Bng th tnh hng ngn
TinhNgan1: MOV SoTruHi,#High(1000)
ACALL CHIA
;Tnh gi tr hng chc ngn
INC Ngan
;c 1 ln ngn
SJMP TinhNgan
;Tip tc so snh vi ngn.
N2:
JNC TinhNgan1
SJMP TinhTram
N1:
JNC TinhNgan1
TinhTram: CJNE HEX2,#HIGH(100),T1
CJNE HEX1,#LOW(100),T2
;Bng th tnh hng trm
TinhTram1: MOV SoTruHi,#High(100)
ACALL CHIA
;Tnh gi tr hng trm
178
PE
.P
TI
T.
ED
U
.V
INC Tram
;c 1 ln trm
SJMP TinhTram
;Tip tc so snh trm
T2:
JNC TinhTram1
SJMP TinhChuc
T1:
JNC TinhTram1
TinhChuc: CJNE HEX2,#HIGH(10),C1
CJNE HEX1,#LOW(10),C2
;Bng th tnh hng chc
TinhChuc1: MOV SoTruHi,#High(10)
ACALL CHIA
;Tnh gi tr hng chc
INC Chuc
;c 1 ln chc
SJMP TinhChuc
;Tip tc so snh chc
C2:
JNC TinhChuc1
SJMP TinhDonVi
C1:
JNC TinhChuc1
TinhDonVi: MOV DonVi,HEX1
;S d cui cng cn li l hng n v.
RET
;Chng trnh con chia 16 bit
CHIA:
CLR C
;Xo c C s dng lnh tr c nh
MOV A,HEX1
SUBB A,SoTruLo
;Tr byte thp trc
MOV HEX1,A
;S d cha tr li HEX1
MOV A,HEX2
SUBB A,SoTruHi
;Tr byte cao
MOV HEX2,A
RET
;Chng trnh con hin th d liu
DISPLAY: MOV R0,#00000001B
;M chn LED bit 1 D7 chn LED bn tri nht
MOV R1,#08H
;R1 gi a ch u vng nh hin th
MOV R2,#08H
;R2 m s vng lp hin th (8 led)
D1:
MOV P1,R0
;a m chn v tr LED sng ra cng 1
MOV P2,@R1
;Cp m hin th ra cng 2
MOV P2,#0
;Xo m va hin th khng sng qua LED k
RR R0
;Chn LED k tip
INC R1
;Chn m hin th k tip
DJNZ R2,D1
;Lp li khi cha ht 8 vng
RET
; Chng trnh con i gi tr thp phn ra m LED 7 on
DECtoLED7: MOV R0,#20H
;R0 gi a ch u vng nh cha gi tr s thp phn
MOV R1,#08H
;R1 cha a ch bt u vng nh cha m hin th
TIEP:
MOV A,@R0
;A cha s thp phn cn i
ACALL CONV
;Gi chng trnh con i ra m LED
MOV @R1,A
;Ct m LED i xong vo vng nh hin th
INC R0
;i s thp phn k tip
INC R1
; nh hin th k tip
CJNE R0,#25H,TIEP
;Nu cha ht s cn i th tip tc
179

RET
VCC
VCC
U
.V
;Chng trnh con tra bng i gi tr thp phn 1 ch s ra m LED 7 on

ORG 500H
LED7: DB 3FH, 03H, 5BH, 4FH, 66H, 6DH, 7DH, 07H, 7FH, 6FH ;Bng m LED 7 on
CONV:
MOV DPTR,#500H ;DPTR gi a ch u bng, A gi s thp phn cn i m.
MOVC A,@A+DPTR ; A s bng m LED tng ng vi s thp phn cn i
RET
Vi chng trnh trn, xung o c rng ln nht l 216 sec do b m ca Timer ch c 16
bit. B hin th ch sng nhiu nht 5 n (t hng chc ngn n hng n v). o c cc
xung c rng ln hn cn s dng thm cc thanh ghi bn ngoi, khi b m Timer trn c th
tng thanh ghi ny ln 1, nu cn khi thanh ghi th nht trn c th tng gi tr trong thanh ghi th
2 . Tuy nhin chng trnh i Hexadacimal ra Decimal cn i ti hng trm ngn, hng t
U1
40
20
R1IN
R2IN
T1OUT
T2OUT
R1OUT
1
3
4
5
2
6
C5
C8
T1IN
10
10uF
VCC
MAX232
PE
R
R
KEY5
KEY6
D1
KEY1
D2
KEY7
P37 (RD)
P36 (WR)
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
39
38
37
36
35
34
33
32
KEY0
KEY1
KEY2
KEY3
KEY4
KEY5
KEY6
KEY7
30
29
17
16
KEY2
D3
KEY3
D4
KEY4
D5
KEY5
D6
KEY6
D7
KEY7
D8
R
LED0
R3
LED
R
LED1
R5
LED
R
R7
LED
LED2
R
R9
LED
LED3
R
LED4
R11
LED
R
R13
LED
KEY-8
ALE
PSEN
LED
KEY0
KEY-7
R16
P3.0 (RxD)
P3.1 (TxD)
P3.2 (INT0)
P3.3 (INT1)
P3.4 (T0)
P3.5 (T1)
KEY-6
R14
XTAL2
KEY-4
KEY4
R12
10
11
12
13
14
15
KEY-5
R
R10
33pF
KEY-3
KEY3
R8
XTAL1
KEY-2
KEY2
R6
19
Y1
4MHz
18
KEY-1
KEY1
R4
C4
C6
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
21
22
23
24
25
26
27
28
89C51
KEY0
R2
33pF
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
11
.P
+
10uF C7
T2IN
EA
RST
1
2
3
4
5
6
7
8
R1
R
15
VCC
DB9
12
TI
10uF +
11
C1+
C1C2+
C2V+
V-
GN D
C3
10uF
31
9
T.
R2OUT
C2
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
ED
13
8
14
7
VC C
U2
16
C1
0.1uF
COMPORT1
1
2
3
4
5
6
7
8
9
10
VCC
GND
LED5
R
R15
LED
LED6
R
R17
LED7
Hnh 7.6: S kt ni phn cng cho h thng truyn d liu vi my tnh.
180
7.2. THIT K H THNG TRUYN D LIU NI TIP.
U
.V
7.2.1. S kt ni phn cng h thng vi iu khin truyn d liu ni tip.

Phn ny m t vic thc hin mt h thng vi iu khin 8051 truyn d liu vi my tnh
bng cng ni tip. Vi vi iu khin d liu ni tip c truyn ra ng TxD v nhn vo
bng ng RxD trn cng 3, tng ng vi my vi tnh d liu ng nhn d liu l RxD v
truyn bng TxD ca cng COM. S kt ni phn cng cho cng vic ny trnh by trn hnh
7.6. Trn hnh v, do mc logic ca vi iu khin l 0V cho mc 0 v +5V cho mc 1, cn i vi
cng RS232 ca my tnh th mc 0 tng ng l -12V v mc 1 l +12V, nn cn mt mch
chuyn mc logic MAX232. d dng kim tra vic truyn nhn d liu gia 2 h thng, mch
s dng thm 8 LED n ni ti cng 2 hin th d liu truyn xung t my tnh, v 8 nt
nhn d liu t n ln my tnh. Tc l d liu nhn c s chuyn thng ti cc LED, bit 1
s lm LED tng ng sng, trng thi cc nt nhn s c chuyn ln my tnh, nt no nhn s
lm bit tng ng vi n bng 0.
T.
ED
7.2.2. Xy dng chng trnh iu khin.

Vic xy dng chng trnh iu khin cho h thng bao gm hai b chng trnh: Mt
chng trnh chy trn h thng vi x l 8051 v mt chng trnh chy trn my tnh PC. Sau
y s ln lt trnh by vic xy dng chng trnh hp ng cho 8051 v chng trnh Visual
Basic chy trn my tnh.
PE
.P
TI
7.2.2.1.Chng trnh cho h thng vi iu khin.

Chng trnh chy trn vi iu khin thc hin cc cng vic chnh nh sau:
Khi ng cng ni tip hot ng ch thch hp.
Nhn d liu t my tnh cung cp ti cng 2 lm sng cc LED
Nhn d liu t cc phm nhn v truyn ln my tnh.
Gii thut chng trnh chnh kh n gin c m t trn hnh 7.7. Trong gii thut ny cc
cng vic truyn nhn d liu c chia nh thnh cc chng trnh con.
Start
Khi ng cng ni tip:

- Truyn UART 8 bit
- 1 stop bit, Tc timer
Khi ng cng 0 input
Ly d liu t cc phm nhn.
Gi chng trnh con truyn d liu.
Gi chng trnh con nhn d liu
Gi d liu ra cng LED
Hnh 7.7. Gii thut chng trnh truyn nhn d liu cng ni tip.
181

Vi cng ni tip ca 8051, truyn d liu ch vic ghi n ti thanh ghi SBUF, tuy
nhin nu d liu trc trong SBUF cha c truyn xong m mt d liu mi c
ghi ti s lm mt d liu truyn. gii quyt vn ny c th kim tra c truyn TI, khi
c ny c lp d liu c truyn xong, lc ny c th gih ti SBUF mt d liu mi.
Tng t nh vy, khi nhn d liu c th kim tra c RI, nu c ny bng 1 c th c
mt d liu mi t SBUF. Gii thut cc chng trnh truyn nhn d liu trn cng ni tip
8051 m t trn cc hnh 7.8 v 7.9.
TI = 1?
?
ng
Ghi d liu ti SBUF
ED
End
U
.V
Sai
Start
Hnh 7.8: Lu chng trnh truyn d liu ni tip bng 8051
RI = 1?
?
ng
TI
Sai
T.
Start
End
.P
c d liu t SBUF
PE
Hnh 7.9: Lu chng trnh nhn d liu ni tip bng 8051
Vi cc s gii thut trn chng trnh truyn nhn d liu cho h thng 8051 bng
hp ng nh sau:
ORG 0
MOV TH1,#0F9H
; S dng Timer 1 xc nh tc truyn 9600 baud vi
MOV TMOD,#00100000B; thnh anh 12 MHz, Timer 1 ch 2
SETB TR1
;Cho php Timer1 chy
MOV SCON,#00001001B ;Khi ng cng ni tip ch 1, UART 8 bit.
TIEP:
CALL NHAN
;Gi chng trnh nhn d liu
MOV P2,A
;Gi d liu nhn c ra cng 2.
MOV A,P0
;Ly gi tr t cng tc vo A
CALL TRUYEN
;Gi chng trnh truyn d liu
SJMP TIEP
182

;Chng trnh con truyn d liu
TRUYEN: JNB TI,THOAT
MOV SBUF,A
THOAT: RET
;Chng trnh con nhn d liu
NHAN: JNB RI,TRUYEN
MOV A,SBUF
RET
;Nu TI = 0 th chuyn qua nhn d liu

;
;RI = 0 chuyn qua truyn

;c d liu vo thanh ghi A
ED
T.
.P
TI
Option Explicit
Dim LEDs As Integer
Dim Switches() As Byte
Dim sData As String
Dim temp As String
Dim Button As Integer
Dim PB0 As Integer
Dim PB1 As Integer
Dim PB2 As Integer
Dim PB3 As Integer
Dim PB4 As Integer
Dim PB5 As Integer
Dim PB6 As Integer
Dim PB7 As Integer
U
.V
7.2.2.2. Chng trnh truyn nhn d liu trn my tnh.

Chng trnh truyn nhn d liu trn my tnh c vit bng Visual Basic vi chc nng
truyn nhn s dng th vin MsComm nh sau:
PE
Private Sub About_Click()

frmAbout.Show
End Sub
Private Sub Check9_Click()

If Check9.Value = 0 Then
PB0 = 0
Check9.BackColor = QBColor(10)
ElseIf Check9.Value = 1 Then PB0 = 1
End If
Call Command1_Click
End Sub
183
U
.V
.P
TI
T.

PB3 = 0
End If
Call Command1_Click
End Sub
ED

PB2 = 0
End If
Call Command1_Click
End Sub
PB1 = 0
End If
Call Command1_Click
End Sub
PE

PB4 = 0
End If
Call Command1_Click
End Sub
PB5 = 0
End If
Call Command1_Click
184
U
.V
ED

PB6 = 0
End If
Call Command1_Click
End Sub
PB7 = 0
End If
Call Command1_Click
End Sub
End Sub
PE
.P
TI
T.
Private Sub Command1_Click()

Dim bytInput() As Byte
Dim bytElement As Byte
Dim iX As Long
Dim iY As Long
Dim iL As Long
Dim sResult As String
Dim sData As String
Dim i As String
LEDs = PB0 + PB1 + PB2 + PB3 + PB4 + PB5 + PB6 + PB7
MSComm1.Output = Chr$(LEDs)
Switches = MSComm1.Input
Text1.Text = LEDs
Text2.Text = Chr$(LEDs)
iX = UBound(Switches(), 1)
For iY = 0 To iX
bytElement = Switches(iY)
'Get Single Byte Element
sData = Chr$(bytElement)
'and Its Character
For iL = 1 To 8
'Iterate Each Bit of the Byte
sResult = Abs((BitOn((bytElement), iL))) & sResult
Text3.Text = sResult
i = Mid(sResult, 8, 1)
If i = "0" Then
Shape1.FillColor = QBColor(12)
Else: Shape1.FillColor = QBColor(10)
185
U
.V
TI
T.
ED
End If
If i = "0" Then
End If
If i = "0" Then
End If
If i = "0" Then
End If
If i = "0" Then
End If
Next
Next
End Sub
PE
.P
Function BitOn(Number As Long, Bit As Long) As Boolean

Dim iX As Long
Dim iY As Long
iY = 1
For iX = 1 To Bit - 1
iY = iY * 2
Next
If Number And iY Then BitOn = True Else BitOn = False
End Function
Private Sub com1_Click()

If MSComm1.PortOpen = True Then
MSComm1.PortOpen = False
MSComm1.CommPort = 1
MSComm1.PortOpen = True
End If
End Sub
Private Sub com2_Click()
If MSComm1.PortOpen = True Then
MSComm1.PortOpen = False
186

MSComm1.CommPort = 2
End If
End Sub
ED
U
.V
Private Sub Form_Load()

LEDs = Hex(0)
On Error GoTo Errorhandler
If MSComm1.PortOpen = False Then 'if comport is disabled....
' enable it.
End If
Timer1.Interval = 100
' Set Timer interval.
Text3.Text = "00011111"
Exit Sub
Private Sub Timer1_Timer()

Call Command1_Click
End Sub
PE
.P
TI
T.
Errorhandler:
If Err = 8005 Then
'if COM1 port is open then...
com2.Value = True
'check the 2th option button
MSComm1.CommPort = 2 'change to COM2 port
Resume
'return
End If
End Sub
Giao din chng trnh khi chy nh trn hnh 7.10.
Hnh 7.10: Giao din chng trnh truyn d liu ni tip trn my tnh.
187
PE
.P
TI
T.
ED
U
.V
Tm tt chng:
Nguyn tc o rng xung l dng xung cn o m cng cho mt xung chun cung
cp cho b m, v da vo s xung chun m c c th xc nh c rng xung
cn o.
Khi s dng 8051, xung chun s c cp t b dao ng ni, b m s s dng b m
timer v xung cn o s c cp ti ng vo INT cho php b m bt u m ln,
nh vy timer cn c khi ng ch cho php chy t bn ngoi (GATE=1). Xung
m c khi ng vo cho php ht mc 1 s di dng s HEX, biu din cho rng
xung tnh bng sec. hin th gi tr ny trc ht cn i ra gi tr thp phn tng
ng. Tip theo, cn phi i cc s thp phn cn hin th ra m LED 7 on cung cp
ti b hin th. i t HEX ra thp phn c th chia lin tip cho 10000, 1000, 100 v
10, cc thng s tng ng s l hng chc ngn, hng ngn, hng trm, hng chc, v
s d cui cng cn li s l hng n v. i ra m LED 7 on c th dng cch tra
bng vi ch a ch tng i ch s s dng DPTR. Chng trnh hin th s qut cc
LED theo kiu multiplex, chng trnh s tun t cung cp m chn LED (ti mt thi
im ch chn 1 LED) ra mt cng, v m hin th ln LED ra cng cn li ca 8051.
Cc LED s tun t c hin th. Nu chng trnh qut LED c gi li trong mt thi
gian ngn, ton b cc LED s sng do mt khng thy c tc sng tt rt nhanh ca
cc LED.
H thng truyn d liu ni tip thc hin vic truyn nhn d liu gia my tnh v h
thng 8051. h thng 8051 khi truyn nhn ni tip c tch hp sn, nhng mc
tn hiu truyn nhn l 0V cho mc 0, v 5V cho mc 1, vi cng COM my tnh l -12V
cho mc 0 v +12V cho mc 1. V vy cn s dng IC MAX232 chuyn i gia hai
mc logic ny. V phn mm cn phi khi ng khung truyn nhn v tc truyn
nhn d liu ca 8051 v my tnh ging nhau. Vi 8051 c th ghi gi tr thch hp vo
thanh ghi SMOD, vi my tnh dng cc lnh ca MSCOMM.
BI TP:
Bi 1: Thit k h thng m s ngi vo mt sn vn ng i qua mt ca quay. Gi s rng
cm bin ca quay c ni vi Timer1 s pht ra mt xung khi c mt ngi i qua,
cng P1.7 c ni ti 1 n bo, n s sng khi cng c cung cp mc 1. Vit
chng trnh bt sng n khi ngi th 10000 i qua cng.
Bi 2: Thit k phn cng v gii thut phn mm mt ng h in t s dng timer ca 8051
vi ngun xung chun bn trong chy vi thch anh 12 MHz.
Bi 3: Thit k giao tip bn phm ma trn 4x4 v mn hnh 8 led 7 on vi 8051 vi ch b
nh trong. Thit k mch cung cp tn hiu ngt nh thi sau mi 20 msec.
a) Vit chng trnh qut bn phm i thnh m hin th led 7 on ct vo b nh.
b) Vit chng trnh ngt hin th 8 nh ln mn hnh led 7 on.
Bi 4: Thit k h thng vi iu khin nhn tn hiu quay s trn mt in thoi hin th ln cc
LED 7 on (ti a 10 s).
Bi 5: Thit k h thng vi iu khin ng m n giao thng trn mt ng t t ng vi cc
thi gian sng n , xanh, vng nh trc.
Bi 6: Thit k h thng o v hin th nhit bng vi iu khin 8051.
Bi 7: Thit k b m sn phm chy trn mt bng ti bng vi iu khin 8051.
Bi 8: Thit k h thng vi x l o tc quay ca mt ng c vi ng vo l mt cm bin tc
(rotting encoder).
188
Chng 8: Vi iu khin 32 bit MC68332
CHNG VIII: VI IU KHIN 32 BIT MC68332
T.
ED
U
.V
Gii thiu:
Chng ny gii thiu v mt trong cc b vi iu khin 32 bit c cu hnh rt mnh l
MC68332. Trc ht cn quan tm ti cc tnh nng c th h tr ca vi iu khin ny, n bao
gm cc khi chc nng no v c nhim v g trong hot ng ca h thng. Cn c bit quan
tm ti cc tnh nng h tr iu khin rt mnh ca khi TPU. Cc chc nng truyn d liu ni
tip ca QSM, c bit l chc nng truyn theo chun SPI cha c cp ti trong chng
trnh. Ngoi ra v phn cng cn quan tm ti cc thanh ghi trong vi iu khin, chc nng s
dng ca chng d dng hn khi lp trnh.
Lp trnh cho vi iu khin MC68332 cng ging nh i vi 8051 hay 80286, trc ht cn
ch ti cc lnh gi nh. d dng ghi nh tp lnh cn chia thnh cc nhm lnh vi cc
chc nng chung, v c bit ch ti cch vit lnh khc so vi cc vi x l vi iu khin h
Intel, ngoi ra cn cn ch ti cch ch th di d liu trong lnh.
Khung chng trnh hp ng vit cho MCU68332, trc ht cn khi ng cho cc ngoi l
(bao gm c cc ngt). Nu khng s dng ngt t nht cng phi khi ng cc gi tr cho cc
thanh ghi SP v PC trong ngoi l reset. Sau khi khi ng ngoi l cn khi ng cn khi ng
thanh ghi trng thi ca CPU. Sau khi khi ng xong CPU, tip theo cn khi ng cho cc
thanh ghi ca SIM, cui cng c th thc hin cc lnh ca chng trnh. Tuy nhin nu s dng
cc khi chc nng ca MCU, cn phi vit cc on chng trnh khi ng chng v nu s
dng ngt cn vit cc chng trnh ngt.
TI
8.1. CU TRC CHC NNG V CC THNH PHN CA

MC68332
PE
.P
S khi phn cng MC68332 nh trn hnh 8.1 bao gm cc khi chc nng nh:
M un tch hp h thng (SIM System Integrated Module): Khi ny thc hin cc tnh
nng nh:
- H tr cc tn hiu giao tip BUS bn ngoi.
- Cung cp cc ng ra chn mch (Chip select) c th lp trnh c.
- Cung cp cc logic bo v h thng.
- C cc b nh thi Watchdog, b gim st clock v b gim st h thng.
- C khi dao ng to xung clock vi thch anh 32.768 MHz tiu th ngun thp.
- C khi chc nng chy th nghim (Test/Debug) lm cng c pht trin phn mm cho
ngi s dng h thng.
- Hai cng vo ra 8 bit hai chc nng.
- Mt cng ra 7 bit hai chc nng.
B vi x l (CPU - Central Processing Unit): MCU68332 s dng CPU 32 bit vi cc tnh
nng nh:
- C kh nng tng thch hng ln, cc phn mm khng cn sa i vn thc hin
c.
- C cc lnh mi chuyn dng cho chc nng iu khin.
- C kh nng qun l b nh o.
- C ch lp cc lnh.
- C chc nng s dng cc bng do tm (Lookup Table) v lnh a vo.
189

Ci tin cc tnh nng x l ngoi l cho chc nng iu khin.
H tr cho lp trnh ngn ng bc cao.
Chc nng d tm thay i iu khin ca chng trnh.
C ch to im dng bng phn cng v ch nn.
PE
.P
TI
T.
ED
U
.V
Hnh 8.1: S khi MC68332.
B x l thi gian (TPU Time Procesor Unit): L b x l chuyn dng hot ng c lp

vi b vi x l 32 bit c cc tnh nng nh:
- 16 knh c lp c th lp trnh c.
- Mt knh bt k c th thc hin hm nh thi bt k.
- Hai thanh ghi m nh thi c b chia trc c th lp trnh.
- Mc u tin cho cc knh c th lp trnh c.
M un ni tip c hng i (QSM Queued Serial Module)
190
PE
.P
TI
T.
ED
U
.V
- Giao tip ni tip tc cao.

- Giao tip ni tip c hng i.
- Mt cng ni tip hai chc nng
M un RAM c th s dng lm b nh m phng cho b x l thi gian (TPURAM)
- Dung lng 2KB RAM tnh.
- C th s dng lm b nh RAM thng thng hoc b nh RAM cha m vi chng
trnh cho TPU.
Bn a ch b nh: Bn b nh h thng c m t trn hnh 8.2, 2KB RAM (RAM
array) c nh v bng cc thanh ghi a ch c s trong khi RAM iu khin (TPURAM
CONTROL).
BUS kt ni cc m un (IMB InterModule BUS): l loi BUS chun, n bao gm cc
mch h tr qu trnh x l ngoi l, phn chia khng gian a ch b nh, phn b cc mc ngt
v cc vector ngt. Cc m un trong MC68332 lin lc vi nhau v vi cc thit b kt ni bn
ngoi bng IMB. IMB ca MC68332 c 24 ng a ch v 16 ng d liu.
Hnh 8.2: Bn b nh ca MCU68332.
8.2. M UN TCH HP H THNG (SIM-SYSTEM INTEGRATED MODULE)
M un tch hp h thng bao gm 5 khi chc nng thc hin cc chc nng: khi ng,
khi to, cu hnh cho cc khi chc nng v truy cp BUS ngoi nh m t trn hnh 8.3.
Khi bo v v nh cu hnh cho h thng iu khin MCU thit lp cc cu hnh v cc ch
hot ng. Khi ny cn cung cp BUS v gim st cc phn mm Wachdog.
B to cclock s cung cp clock cho hot ng ca SIM, cc khi mch khc v cc thit b
bn ngoi. Ngoi ra n cn c b to chu k ngt h tr vic thc hin cc chng trnh ngt theo
gii hn thi gian nht nh.
Khi giao tip BUS ngoi x l vic truyn thng tin gia m un IBM v khng gian a ch
bn ngoi.
191
PE
.P
TI
T.
ED
U
.V
Khi chn chip cung cp 11 tn hiu chn chip a dung v 1 tn hiu chn ROM khi ng
(boot ROM). C hai nhm tn hiu chn ny u to ra cng vi cc thanh ghi a ch c s v cc
thanh ghi la chn.
Khi kim tra h thng bao gm cc khi mch phn cng cn thit cho vic chy kim tra
MCU. N thc hin cc th nghim cho cc chc nng thc hin trong nh my m khng h tr
cho cc ng dng bnh thng.
Cc thanh ghi iu khin ca SIM bao gm 128 byte nh m t trong bng 8.1. Cc thanh ghi
khng s dng (Not Use) khi c s tr v gi tr bng 0. Trong ct (ACCESS) ch S ch th thanh
ghi ch c truy cp mc gim st Suppervisor, ch S/U ch th thanh ghi c th truy xut
mc gim st Supervisor hoc mc ngi s dng User tu theo trng thi ca bit SUPV
trong thanh ghi SIMCR.
Hnh 8.3: M un tch hp h thng SIM.
Bng 8.1: Cc thanh ghi iu khin ca SIM.

Address
$YFFA00
$YFFA02
$YFFA04
$YFFA06
S
S
S
S
$YFFA08
$YFFA0A
$YFFA0C
$YFFA0E
Access
S
S
S
S
15
8 7
0
SIM CONFIGURATION (SIMCR)
FACTORY TEST (SIMTR)
CLOCK SYNTHESIZER CONTROL (SYNCR)
NOT USED
RESET STATUS REGISTER
(RSR)
MODULE TEST E (SIMTRE)
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
192
$YFFA18
$YFFA1A
$YFFA1C
$YFFA1E
$YFFA20
S
S
S
$YFFA22
$YFFA24
$YFFA26
S
S
S
S
S
S
S
S
S
S/U
$YFFA28
$YFFA2A
$YFFA2C
$YFFA2E
$YFFA30
$YFFA32
$YFFA34
$YFFA36
$YFFA38
$YFFA3A
$YFFA3C
$YFFA3E
$YFFA40
$YFFA42
$YFFA44
$YFFA46
$YFFA48
$YFFA4A
$YFFA4C
$YFFA4E
$YFFA50
$YFFA52
$YFFA54
$YFFA56
$YFFA58
$YFFA5A
.P
PE
S/U
S
S
S
S
S
S
S
S
S
S
S
S
S/U
S/U
S/U
U
.V
$YFFA16
PORT E DATA (PORTE0)

PORT E DATA (PORTE1)
PORT E DATA DIRECTION
(DDRE)
NOT USED
PORT E PIN ASSIGNMENT
(PEPAR)
NOT USED
PORT F DATA (PORTF0)
NOT USED
PORT F DATA (PORTF1)
NOT USED
PORT F DATA DIRECTION
(DDRF)
NOT USED
PORT F PIN ASSIGNMENT
(PFPAR)
NOT USED
SYSTEM PROTECTION
CONTROL (SYPCR)
PERIODIC INTERRUPT CONTROL (PICR)
PERIODIC INTERRUPT TIMING (PITR)
NOT USED
SOFTWARE SERVICE
(SWSR)
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
TEST MODULE MASTER SHIFT A (TSTMSRA)
TEST MODULE MASTER SHIFT B (TSTMSRB)
TEST MODULE SHIFT COUNT (TSTSC)
TEST MODULE REPETITION COUNTER (TSTRC)
TEST MODULE CONTROL (CREG)
TEST MODULE DISTRIBUTED REGISTER (DREG)
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
PORT C DATA (PORTC)
NOT USED
NOT USED
CHIP-SELECT PIN ASSIGNMENT (CSPAR0)
CHIP-SELECT PIN ASSIGNMENT (CSPAR1)
CHIP-SELECT BASE BOOT (CSBARBT)
CHIP-SELECT OPTION BOOT (CSORBT)
CHIP-SELECT BASE 0 (CSBAR0)
CHIP-SELECT OPTION 0 (CSOR0)
ED
NOT USED
NOT USED
NOT USED
T.
$YFFA10
$YFFA12
$YFFA14
TI
S/U
S/U
S/U
193

NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
U
.V
$YFFA5C
$YFFA5E
$YFFA60
$YFFA62
$YFFA64
$YFFA66
$YFFA68
$YFFA6A
$YFFA6C
$YFFA6E
$YFFA70
$YFFA72
$YFFA74
$YFFA76
$YFFA78
$YFFA7A
$YFFA7C
$YFFA7E
ED
S
S
S
S
S
S
S
S
S
S
S
S
S
S
PE
.P
TI
T.
Y = M111, vi M l trng thi ca bit bn m un (module mapping - MM) trong thanh ghi
SIMCR.
Hnh 8.4; Cc khi chc nng ca SIM.
194

8.2.1. Khi nh cu hnh v bo v h thng
Khi ny cung cp chc nng nh cu hnh iu khin cho cc khi chc nm bn trong
MCU. N cn thc hin chc nng chn ngt, gim st BUS v cc chc nng kim tra hot ng
h thng. Khi bo v MCU bao gm: 1 b gim st BUS, mt b gim st treo (HALT), mt b
gim st ngt gi v m b nh thi watchdog phn mm. Cc khi chc nng ny c tch hp
sn trong vi iu khin gim cc linh kin ni ghp bn ngoi h thng. Hnh 8.4 m t cc
khi chc nng v cc tn hiu c bn ca khi ny.
ED
Hnh 8.5: S khi b to clock trong SIM
PE
.P
TI
T.
8.2.3. Khi giao tip BUS ngoi
U
.V
8.2.2. Khi to clock h thng

Khi to clock h thng trong SIM cung cp tn hiu nh thi cho n un IMB v cc thit b
ngoi vi bn ngoi. Do MCU hot ng trng thi tnh (fully static), nn ni dung ca cc thanh
ghi v b nh khng b nh hng khi tc clock thay i. Tn hiu clock h thng c th to ra
theo 3 cch: bng khi vng kho pha bn trong c th tng hp tn hiu clock, t mt ngun dao
ng bn trong, hoc t mt ngun dao ng bn ngoi. S khi b to clock trong SIM biu
din trn hnh 8.4.
Khi giao tip BUS ngoi (EBI External Bus Interface) truyn cc thng tin gia BUS bn
trong MCU v cc thit b bn ngoi. BUS bn ngoi c 24 ng a ch v 16 ng d liu.
EBI c BUS d liu c th truy xut 8 hoc 16 bit. Vi cu trc ny MCU c th thc hin cc
lnh truyn d liu theo byte, t hoc t di (2 t). Cc cng c truy xut bng cc chu k cn
ng b v c iu khin bng cc tn hiu xc nh kch thc d liu truyn (SIZ1, SIZ2) v
cc tn hiu nhn bit (DSACK1, DSACK0). Khi truy xut c ghi cc cng 8 bit cng cn cc
chu k BUS.
Trong cc chu k truy xut cng vo ra, d liu lun c c ghi vi s bit ln nht. Cc
thit b bn ngoi cn tun theo cc th tc bt tay ca EBI. Cc tn hiu iu khin s ch th: bt
195
ED
U
.V
u chu k, a ch truy xut, ln d liu truyn v loi chu k truyn. di ca chu k

truyn s ph thuc vo d liu c chn. Cc tn hiu cht ch th a ch hp l v cung cp
nh thi cho d liu. Vi mi ln d liu truyn trn cng EBI lun hot ng ch cn
ng b.
tng thm mm do v gim bt cc tn hiu logic bn ngoi, MCU s dng cc tn
hiu chn mch ng b vi iu khin truyn nhn ca EBI. Cc tn hiu chn mch cn cung
cp cc tn hiu iu khin BUS bn trong cho cc chu k truy xut ny.
T.
Hnh 8.6: S khi b chn mch
PE
.P
TI
8.2.4. Khi to tn hiu chn mch

Cc b vi iu khin thng kt ni thm cc vi mch phn cng to ra cc tn hiu chn
mch bn ngoi, ring MCU MC68332 cung cp sn 20 tn hiu chn mch c th lp trnh c
lp c tc truy xut nhanh trong hai chu k cho cc b nh v ngoi vi bn ngoi. Cc tn hiu
ny cho php chn dung lng t 2KB ti 1MB.
Cc tn hiu chn mch c th ng b vi cc tn hiu iu khin BUS cung cp cc tn
hiu cho php ra, cc tn hiu cht c ghi hoc cc tn hiu chp nhn yu cu ngt. Cc logic
chn mch cng to ra cc tn hiu DSACK bn trong, mt tn hiu DSACK to ra c chia s
cho tt c cc mch. Cc tn hiu chn nhiu mch cn c gn cng a ch v c cng s chu
k ch. Cc tn hiu chn mch cng c th ng b vi tn hiu ECLK trn ADDR23.
Khi thc hin chu k truy xut BUS logic chn mch s c so snh vi loi khng gian a
ch, vi a ch, kiu chu k truy cp, kch thc d liu truy cp, trnh t u tin ngt (trong
trng hp ngt c chp nhn) vi cc tham s cha trong cc thanh ghi chn mch. Nu tt c
cc tham s u ging nhau th tn hiu chn mch tng ng s c to ra, tn hiu ny s tc
ng mc thp. Hnh 8.6 m t tc ng ca mt tn hiu chn mch.
Bng 8.2: Cc tn hiu chn mch v v tr ca chng trn cc chn MCU.

Chn
CSBOOT
BR
BG
BGACK
Tn hiu chn
CSBOOT
CS0
CS1
CS2
Cng ng ra
196

CS3
CS4
CS5
CS6
CS7
CS8
CS9
CS10
PC0
PC1
PC2
PC3
PC4
PC5
PC6
ECLK
FC0
FC1
FC2
ADDR19
ADDR20
ADDR21
ADDR22
ADDR23
U
.V
8.2.5 Cc ng vo ra a dng
Cc chn tn hiu ca SIM c th lp trnh to thnh 2 cng vo ra a dng E v F. Cc
thanh ghi d liu cng, nh hng truyn d liu cho cng v gn chn cho cng s cho php
iu khin vic truy cp cc cng ny.
PORTE0, PORTE1 Thanh ghi d liu cng E - a ch $YFFA11, $YFFA13
8
ED
15
TI
T.
Khi thc hin lnh ghi ti thanh ghi d liu cng E, d liu s c cha cc b ci bn
trong thanh ghi, nu chn no ca cng E c lp trnh thnh ng ra th gi tr ca bit s c
cung cp ti cc chn ng ra bn ngoi. Khi c d liu ca thanh ghi cng E s tr v gi tr ch3a
cc chn vo bn ngoi ch khi chng c lp trnh l mt ng vo, nu khng gi tr c
c ch l gi tr trong cc b ci ca thanh ghi ny.
.P
Thanh ghi d liu cng E bao gm hai a ch, a ch $YFFA11 cho cng PORTE0 v a ch
$YFFA13 cho cng PORTE1. Thanh ghi ny c th c ghi ti bt c thi im no v gi tr ca
n khng b nh hng khi RESET.
PE
15
DDRE Thanh ghi hng d liu cng E - $YFFA15
Thanh ghi nh hng d liu cng E s dng nh ngha hng truyn d liu cho cc chn
vo ra cng E. C mt bit ca thanh ghi ny bng 1 th chn cng E tng ng vi n s l cng
ra, ngc li bit bng 0 s nh ngha chn vo. Thanh ghi ny cng c th c ghi ti mi thi
im.
PEPAR Thanh ghi gn chn cng E - $YFFA17
15
Cc bit trong thanh ghi gn chn cng E s dng iu khin chc nng mi chn ca cng
ny. Khi mt bit trong thanh ghi ny c lp, chn cng E tng ng vi n s l mt tn hiu
iu khin BUS nh trong bng 8.3. Khi bit trong thanh ghi PEPAR xo v 0, chn tng ng vi
n s l ng vo ra c iu khin bng cc thanh ghi PORTE v DDRE.
197

Bit DATA8 (Data bus bit 8) s iu khin trng thi cc bit thanh ghi ny sau khi Reset. Nu
DATA8 = 0 th PEPAR s bng $FF, cc ng cng E s l tn hiu iu, ngc li DATA8 = 0
th PEPAR = $00 v cc chn cng E l nhng ng vo ra.
Bng 8.3: Chc nng cc bit thanh ghi gn chn cng E.
Tn hiu iu khin Bus
SIZ1
SIZ0
AS
DS
RMC
AVEC
DSACK1
DSACK0
Tn hiu cng E
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
U
.V
PEPAR Bit
PEPA7
PEPA6
PEPA5
PEPA4
PEPA3
PEPA2
PEPA1
PEPA0
ED
PORTF0, PORTF1 Thanh ghi d liu cng F - $YFFA19, $YFFA1B

15
T.
Tng t nh cng E, cng F cng c iu khin bi cc thanh ghi d liu (PORTF0,

PORTF1), nh hng truyn d liu (DDRF) v gn chn cng F (PEPAR) vi cc chc nng
tng t. Gi tr ca PFPAR sau khi RESET s tu thuc vo bit DATA9.
.P
TI
DDRF Thanh ghi nh hng d liu cng F- $YFFA1D
PFPAR Thanh ghi gn chn cho cng F - $YFFA1F
Bng 8.4: Chc nng cc bit thanh ghi gn chn cng F.

Tn hiu cng F
Cc tn hiu iu khin
PFPA7
PF7
IRQ7
PFPA6
PF6
IRQ6
PFPA5
PF5
IRQ5
PFPA4
PF4
IRQ4
PFPA3
PF3
IRQ3
PFPA2
PF2
IRQ2
PFPA1
PFPA0
PF1
PF0
IRQ1
MODCLK
PE
Cc bit PFPAR
8.2.6. RESET
Qu trnh RESET thng s dng khi ng li h thng v phc hi li h thng khi xy
198
U
.V
ra cc li nghim trng. MCU MC68332 thc hin qu trnh RESET kt hp gia phn cng v
phn mm. Khi x l RESET tch hp trong MCU s xc nh cc gi tr RESET cn thit v tn
hiu iu khin phn cng thc hin li cu hnh c bn cho MCU da theo cc ng vo chn
ch , sau tr iu khin v cho CPU.
Qu trnh RESET s xy ra khi cung cp mc thp ti ng vo RESET ca MCU. Qu trnh
RESET cn ng b xy ra khi c cc li nghim trng trong h thng ti mt cnh clock bt k.
Cn qu trnh RESET ng b s xy ra ti cui mi chu k BUS. Nu khng cung cp clock khi
RESET th qu trnh RESET s khng xy ra, iu ny trnh xung t cho cc chu k ghi xy ra
ngay ti thi im RESET.
RESET l ngt c u tin cao nht ca CPU, bt c qu trnh no cng b ngt khi xy ra
RESET v cc qu trnh s khng c thc hin li, ch c cc tc v c bit mi c thc
hin trong khi RESET, cn cc qu trnh khi ng khc cn phi thc hin bng cc chng
trnh con x l ngoi l.
PE
.P
TI
T.
ED
8.2.7. Ngt
Qu trnh cng nhn v phc v ngt l mt qu trnh x l phc tp gia CPU vi cc
module tch hp trong h thng v cc thit b hoc cc module yu cu ngt. MC68332 c 8 mc
u tin ngt (0 7), by vector ngt c t ng v 200 vector ngt c th thay i c. Tt c
cc ngt c th t u tin nh hn by c th che bng cc bit u tin ngt (IP) trong thanh ghi
trng thi. MC68332 x l cc ngt ging nh cc ngoi l cn ng b.
Vic cng nhn ngt da theo trng thi ca cc tn hiu yu cu ngt IRQ[7:1] v cc gi tr
che (IP), mi tn hiu yu cu ngt c mc u tin khc nhau, IRQ1 c mc u tin thp nht v
IRQ7 c mc u tin cao nht.
Trng u tin IP bao gm ba bit c gi tr nh phn t 000B ti 111B to ra 8 mc u tin.
Cc bit che s b qua mt yu cu ngt c th t u tin nh hn hoc bng vi gi tr che (tr
IRQ7) k t khi bt u cng nhn v thc hin qu trnh x l ngt. Khi IP cha gi tr 000B
khng c ngt no b che. Trong cc qu trnh x l ngoi l th trng u tin ngt IP c thit
lp gi tr u tin ca ngt bt u c phc v.
Tn hiu yu cu ngt c th cung cp t cc thit b bn ngoi hoc t cc module bn trong
MCU. Cc ng yu cu c ni ti cc ng vo mt cng NOR bn trong MCU. Cc yu cu
ngt tc ng bn trong MCU s khng lm nh hng ti trng thi logic cc chn tng ng
ca MCU. Cc yu cu ngt ngoi s ni ti CPU thng qua khi giao tip BUS ngoi v khi
logic iu khin ngt ca SIM, nn CPU s x l cc ngt ngoi ging nh n c cung cp t
SIM.
Cc ngt ngoi t IRQ6 ti IRQ1 tc ng mc thp, cn IRQ7 tc ng cnh xung, IRQ7
yu cu c hai tc ng cnh v mc thp ca tn hiu yu cu.
IRQ1 IRQ6 l cc ngt c th che c, cn IRQ7 khng th che c, ng vo IRQ7 tc
ng cnh trnh chng trnh ngt thc hin nhiu ln v ngn xp c th b trn. Ngt khng
che s tc ng khi ng vo IRQ7 c cnh xung v gi tr ca IP trong thanh ghi trng thi phi
nh hn 111B (trong khi IRQ7 tc ng).
Cc yu cu ngt c ly mu lin tc ti mi cnh xung ca chu k xung clock. Yu cu
ngt hp l s khng tc ng tc thi trong khi CPU x l cc ngoi l, qu trnh ch s c
thc hin cho ti khi kt thc lnh hoc cho ti khi cc yu cu ngt c u tin cao hn kt thc.
MC68332 khng ci li mc u tin ca mt yu cu ngt ang ch, nu ngt c mc u tin
cao hn yu cu phc v, trong khi mt ngt c u tin thp hn ang ch th ngt c mc u tin
199

cao hn s c phc v trc. Nu mt ngt c mc u tin bng hoc thp hn gi tr IP hin
hnh, ngt ny s khng c phc v.
8.2.8. Khi kim tra phn cng
Khi kim tra phn cng trong SIM h tr vic qut kim tra c bn cc khi chc nng trong
MCU, n c tch hp trong MCU h tr kim tra sn phm. Cc thanh ghi trong trong khi
kim tra phn cng bao gm:
SIMTR
Thanh ghi kim tra h thng
- $YFFA02
- $YFFA08
TSTMSRA Thanh ghi dch ch A
- $YFFA30
TSTMSRB Thanh ghi dch ch B
- $YFFA32
TSTRC
Thanh ghi m xung t module
CREG
Thanh ghi iu khin module kim tra
DREG
Thanh ghi phn b module kim tra
U
.V
Thanh ghi m dch module kim tra
- $YFFA34
- $YFFA36
- $YFFA38
- $YFFA3A
ED
TSTSC
SIMTRE Thanh ghi kim tra h thng (E Clock)
8.3. B VI X L (CENTRAL PROCESSING UNIT)
PE
.P
TI
T.
MC68332 s dng CPU MC68020 l loi CPU 32 bit vi hiu sut hot ng h thng cao v
cho php thc hin cc chng trnh ca cc Cpu h Motorola M68000. MC68332 c m lnh
hon ton tng thch vi h M68000, nhng n tri hn v cc gii thut tnh ton chuyn su v
h tr ngn ng bc cao. MC68332 h tr tt c cc tc v c bit M68010 v hu ht cc tc v
c bit ca M68020 nh: h tr qun l b nh o, cc ch lp, cu trc ng ng v cc
php ton 32 bit. N c cc ch a ch mnh trong hp ng v tng hiu qu lm vic i vi
cc trnh bin dch ngn ng cp cao. MC68332 cn c cc lnh c bit nh bng truy tm, ni
suy, ngng hot ng vi ngun thp, cc lnh c bit cho cc ng dng iu khin. N cng c
ch g ri nn cho php tm dng ch hot ng bnh thng nhn cc lnh gi ri cung
cp t h thng.
Vic h tr lp trnh l mt yu t kh quan trng cn xt ti khi s dng cc MCU. Tp lnh
ca MC68332 c ti u ho cho hiu sut cao. MC68332 c 8 thanh ghi d liu 32 bit s dng
cho vic thc hin cc lnh tnh ton 8, 16 hoc 32 bit. MC68332 h tr h tr kh nng kim tra
v chun on chng trnh, lm nng cao kh nng tm kim v by mc lnh.
Vic s dng ngn ng bc cao cho cc vi iu khin vi mc ch lm nng cao kh nng
pht trin phn mm, lm gim li lp trnh v d dng s i chng trnh hn. Tuy nhin khi
lp trnh bng ngn ng bc cao cho cc vi iu khin s lm cc chng trnh iu khin ln
hn, phc tp hn. Cu trc h tr ngn ng bc cao bng phn cng ca MC68332 s lm gim
ln v phc tp ca cc chng trnh iu khin khi thc hin chng bng ngn ng cp
cao.
200
ED
U
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.P
TI
T.
Hnh 8.7: Cc thanh ghi trong mc l trnh ng dng.
Hnh 8.8: Cc thanh ghi thm trong mc lp trnh gim st.
PE
8.3.1. Cc m hnh lp trnh

CPU ca MC68332 c 16 thanh ghi 32 bit, mt thanh ghi b m chng trnh 32 bit, mt
thanh ghi con tr ngn xp 32 bit, mt thanh ghi trng thi 16 bit, hai thanh ghi m lnh c chc
nng thay i c v mt thanh ghi vector c s 32 bit.
Cc m hnh lp trnh ca CPU bao gm: m hnh lp trnh ng mc ng dng v m hnh lp
trnh mc gim st, tng ng vi mc c quyn ngi s dng v mc c quyn gim st. Mt
s lnh ch thc hin c mc gim st, m khng s dng c mc ng dng. iu ny
cho php chng trnh gim st bo v cc ti nguyn h thng. Bit S trong thanh ghi trng thi s
xc nh mc c quyn ca chng trnh.
M hnh lp trnh ngi s dng khng thay i so vi cc th h trc trong h vi iu khin
M68000. Cc chng trnh ng dng khng mc c quyn vit mc ng dng cho cc th h
trc c th chy trn h thng MC68332, tuy nhin cc chng trnh c mc c quyn trong
MC68332 s khng xc nh c quyn trong cc th h khc ca h M68000.
201

8.3.2 Thanh ghi trng thi chng trnh
Thanh ghi trng thi cha cc m iu kin ca cc php ton c thc hin trc , chng
c th s dng lm iu kin thc hin cc lnh khc trong chng trnh. Cc m iu kin
cha trong byte thp ca thanh ghi trng thi, v chng trnh mc ng dng ch c th truy cp
mt phn ca thanh ghi trang thi, phn ny c gi l thanh ghi m iu kin (CCR
Condition code register) trong cc chng trnh ng dng. Ti mc lp trnh gim st, chng
trnh c th truy cp ton b cc bit ca thanh ghi trng thi bao gm c trng IP (interrupt
Priority Mask) v cc bit iu khin khc.
U
.V
SR Status Register (Thanh ghi trng thi).
PE
.P
TI
T.
ED
Hai byte ca thanh ghi trng bao gm byte h thng v byte ng dng:
Byte h thng gm cc bit:
T[1:0] Trace Enable - Cho php ch tm kim.
S Supervisor/User State Bits - Bit trng thi mc Gim st/ng dng.
[12:11] Unimplemented - Khng s dng.
IP[2:0] Interrupt Priority Mask Trng che u tin ngt.
Byte ng dng (thanh hgi m iu kin) bao gm cc bit:
Bits [7:5] Unimplemented khng s dng.
X Extend M rng.
N Negative - C m tc ng khi kt qu l mt s m.
Z Zero C zero tc ng khi kt qu bng 0.
V Overflow c trn tc ng khi c s i du vi cc php tnh trn cc s dng.
C Carry - c nh tc ng khi php tnh c nh,
CPU ca MC68332 h tr su kiu d liu bao gm:
- Kiu Bits.
- S BD nn.
- Kiu s nguyn theo byte (8 bit).
- Kiu s nguyn theo t (16 bit)
- Kiu s nguyn theo t kp 932 bit)
- Kiu s nguyn 4 t (64 bit)
Cc ch a ch m CPU ca MC68332 bao gm:
- Trc tip thanh ghi.
- Gin tip thanh ghi.
- Ch gin tip thanh ghi c ch s.
- Ch gin tip b m chng trnh c di.
- Ch gin tip b m chng trnh c ch s.
- Ch tuyt i.
Ch ia ch tc thi nm trong ch a ch gi tip thanh ghi c kh nng tng trc,
gim trc v c di (offset). Ch tng i b m chng trnh cng h tr ch s v
di. Ngoi ra trong tt c cc ch a ch u c cc ch th ngm nh s dng thanh ghi trng
thi, thanh ghi con tr ngn xp hoc thanh ghi b m chng trnh.
202

8.3.3 Ch g ri
Ch g ri nn thc hin cc vi lnh ca CPU, cc lnh ny m t trong bng 8.5.
Dump Memory
Block
U
.V
FILL
.P
Fill Memory
Block
ED
Write Memory
Location
M t
c d liu t thanh ghi a ch hoc d liu, tr
kt qu thng qua giao tip noi tip.
WDREG/WAREG Ghi mt d liu ti thanh ghi a ch hoc thanh
ghi d liu.
RSREG
c mt thanh ghi iu khin h thng. Tt c
cc thanh ghi c th c trong mc gim st u
c th c trong ch gi ri.
WSREG
Ghi d liu ti mt thanh ghi iu khin h
thng.
READ
c d liu t mt nh c a ch 32 bit.
Thanh ghi m chc nng ngun (Source
Function Code - SFC) s xc nh loi b nh
c truy cp.
WRITE
Ghi d liu t mt nh c a ch 32 bit. Thanh
ghi m chc nng ch (Destination Function
Code - DFC) s xc nh loi b nh c truy
cp.
DUMP
Lnh ny s dng cng vi lnh READ c
mt khi d liu.
T.
Write System
Register
Read Memory
Location
M gi nh
RDREG/RAREG
TI
Lnh
Read D/A
Register
Write D/A
Register
Read System
Register
GO
CALL
PE
Resume
Execution
Patch User Code
RST
NOP
ng ng lnh s c xo v ly y lnh
trc khi thc hin lnh ti v tr PC hin hnh.
B m chng trnh hin hnh s c ct vo
nh ngn xp. iu khin chng trnh s
chuyn qua vng nh m lnh ca ngi s
dng.
Chn thm tn hiu REST di 512 chu k xung
clock. CPU s khng bit RESET bng lnh ny.
Lnh ny khng thc hin cng vic no c.
Reset
Peripherals
No Operation
Lnh ny s dng cng vi lnh WRITE ghi

lin tip vo mt khi d liu trong b nh.
8.4. KHI X L THI GIAN
TPU l mt b vi iu khin thng minh, hot ng bn t ng thc hin cc tc v iu

khin thi gian. N hot ng ng thi vi CPU, n thc hin cc tc v c nh trnh
trong TPU, x l cc lnh trong ROM, truy xut cc d liu chia s cng CPU v tc ng cc
ng vo ra nh trnh. S khi ca TPU nh trn hnh 8.8.
B x l thi gian cung cp hiu sut ti u cho cc chng trnh iu khin c lin quan ti
203
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ED
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thi gian. TPU bao gm cc khi: mt b thc thi chuyn dng, mt b nh trnh 3 mc u tin,
mt b nh RAM cha d liu, hai b nh thi c bn v mt b nh ROM cha vi lnh. TPU
iu khin 16 knh c lp nhau, mi knh c mt chn vo ra v n c kh nng thc hin cc vi
lnh thi gian. Mi knh c cc phn cng chuyn dng ring, cho php cc s kin vo v ra trn
tt c cc knh c x l ng thi.
Hnh 8.8: S khi ca TPU.
PE
.P
TI
TPU thc hin hai thao tc c th lp trnh trc l m kt thc s kin (match) v so snh
bt s kin (capture). Khi TPU thc hin mt chui cc s kin (match v capture) th n c
gi l thc hin mt hm chc nng. Cc hm chc nng ca TPU s thay th cho cc hm chc
nng thc hin bng phn mm v n s yu cu ngt host CPU. Cc hm chc nng ca TPU bao
gm:
- Chc nng m bt/xc nh c s chuyn mc ng vo Input capture/Input Transition
Counter.
- Chc nng so snh Output compare.
- Chc nng iu rng xung PWM Pulse Width Modulation.
- Chc nng iu rng xung ng b Synchronized Pulse Width Modulation.
- Chc nng o chu k v pht hin chuyn i mc cng thm Period measurement with
addtion transition detect.
- Chc nng o chu k v pht hin chuyn i mc b mt Period measurement with
missing transition detect.
- B to xung ng b v tr Possition synchronyzed pulse generator.
- B iu khin ng c bc Step motor.
- B cha rng v chu k xung Period/pulse width accumulator.
8.4.1. Cc khi chc nng trong TPU

Cc khi chc nng trong TPU bao gm: hai b thi gian c s 16 bit, 16 knh nh thi c
lp, mt b nh trnh nhim v, mt microengine v mt b giao tip host. Ngoi ra n cn c
mt mt b nh RAM hai cng s dng khai bo cc tham s giao tip gia TPU vi host CPU.
204
8.4.1.1. B thi gian c s Time Base

Hai b m 16 bit s cung cp thi gian tham chiu c s cho tt c cc ng ra so snh v tt
c cc ng vo bt s kin. Host CPU s iu khin t l chia cho hai b m thi gian c s ny
bng cc bit tng ng trong thanh ghi cu hnh TPU (TPUMCR TPU module configuration
Register). Cc thanh ghi TCR1, TCR2 (Timer Count Register) gi cc gi tri m hin hnh.
Clock cp cho TCR1 c ly t clock h thng cn TCR2 hoc c ly t clock h thng hoc
c cp t bn ngoi qua chn T2CLK. TCR1 v TCR2 c th c ghi bng cc vi lnh ca
TPU, nhng host CPU khng c ghi trc tip c.
ED
U
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8.4.1.2. Cc knh nh thi Timer channels

TPU c 16 knh nh thi c lp, mi knh c ni ti mt chn ca MPU, cc knh u c
cu to phn cng ging ht nhau ngoi tr knh 15 trn TPU2 c thm cc ng ra. Mi knh bao
gm cc thanh ghi v chn logic iu khin. Cc thanh ghi bao gm mt thanh ghi capture 16 bit,
mt thanh ghi compare/match 16 bit v mt thanh ghi so snh ln hn hoc bng 16 bit. Chn ni
ra ngoi c th l ng ra hoc ng vo tu thuc vo TPU micro engine, mi knh c th s dng
chung xung nh thi c s cho capture v match hoc s dng ring.
TI
T.
8.4.1.3. Giao tip host

Khi giao tip host cho php CPU iu khin hot ng ca TPU, host CPU s ghi cc t iu
khin thch hp ti cc thanh ghi ca giao tip host khi ng hot ng ca TPU. Qu trnh
khi ng s thit lp cc tham s chnh nh: chc nng hot ng (function), mc ngt, mc u
tin ca mi knh. Ngoi ra CPU cn ghi ti giao tip host cc yu cu phc v, cc thanh ghi
tun t nh ngha chc nng hot ng v khi ng gi tr cho mi knh.
PE
.P
8.4.1.4. RAM thng s hot ng (Parameter RAM)

Parameter Ram nm 200 byte u tin trong vng nh ca TPU, tham s thit lp cho cc
knh bao gm 100 t 16 bit. Cc knh 0 n 13, mi knh c 6 tham s, cc knh 14 v 15 mi
knh c 8 tham s.
Parameter RAM ca TPU2 c 256 byte nm nh vng nh ca TPU2. Cc tham s lu tr
theo cc t 16 bit. 16 knh ca TPU2 mi knh s c 8 tham s.
Cc parameter RAM l cc b nh hai cng c th truy cp t CPU hoc t TPU. Cc tham s
ny phi c lp trnh khi TPU bt u hot ng.
8.4.1.5. B nh trnh (scheduler)

Sau khi cho php tt c cc knh nh thi u khng c hot ng. Host CPU cn gn cho
cc knh mc u tin cao, trung bnh hoc thp. B nh trnh s xc nh trnh t c phc v
ca cc knh da theo s knh c gn mc u tin v mc u tin c gn cho chng.
8.4.1.6. B thc hin vi lnh (Microengine)
B thc hin vi lnh c kt hp gia b nh iu khin (control store) v n v thc hin.
B nh iu khin l b nh ROM cha cc vi lnh thc hin cc chc nng thit lp ca nh sn
xut. Trong ch m phng ca TPU cc vi lnh s c thc hin trong RAM thay vi trong
ROM iu khin, v th ch m phng cho php pht trin cc hm chc nng ca ngi s
dng.
205

8.4.2. Cc chc nng thi gian ca MC68332
8.4.2.1. Cc ng vo ra (DIO - Discrete Input/Output).
Khi cc chn c s dng lm cc ng vo, chng s c mt b tham s ch th 15 mc
dng vo ca 1 chn. Bit 15 ca b tham s ch th trng thi gn nht, bit 14 ch th trng thi gn
k . Ngi lp trnh c th chn 1 trong 3 iu kin cp nht cc tham s: 1) khi xy ra
chuyn trng thi; 2) Khi CPU yu cu, 3) hoc khi gp ng tc ca mt b tham s khc.
Khi mt chn c s dng lm ng ra, n s c cung cp gi tr 0 hoc 1 tu theo yu cu ca
CPU.
ED
U
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8.4.2.2. Ng vo bt (capture)/ ng vo chuyn i (Transition) ca b m (ITC)

Mt knh ca TPU c th bt mt gi tr lp trnh trc ca TCR sau mi khi chuyn i gi
tr, hoc sau m s ln chuyn i gi tr nh trc to ra mt ngt CPU. Mt knh c th thc
hin vic bt mt ng vo lin tc, hoc pht hin mt ln chuyn i hay mt s ln chuyn i
nh trc sau n s hot ng lin tc cho n khi c khi ng li. Sau mi ln chuyn
i, hoc mt s ln chuyn i nh trc, knh c th to ra mt kt ni khi ti mt chui knh
khc (ln ti 8 knh). Ngi lp trnh c th ch nh knh bt u ca khi v s knh trong khi.
Vic to ra kt ni khi lin tip tu thuc vo ch hot ng. Ngoi ra sau mi ln chuyn i
hoc mt s ln chuyn i nh trc mt byte tham s trong RAM (ti a ch xc nh bng
tham s knh) c th s tng, v n c th s dng lm c thng bo c s chuyn i cho mt
knh khc.
.P
TI
T.
8.4.2.3. Ng ra bt gi tr (OC - Output Capture)

Ng ra OC s to ra cnh ln, cnh xung hoc o trng thi theo 1 trong 3 cch:
1) Khi to CPU tc thi bng cch to ra mt xung c di bng thi gian tr c th lp
trnh c.
2) Khi ht mt thi gian tr c lp trnh trc.
3) Mt cch lin tc sau khi nhn c mt kt ni t mt knh.
PE
8.4.2.4. iu ch rng xung (PWM Pulse Width modulation)

TPU c th to ra mt dng sng iu ch rng xung vi chu k nhim v t 0 n 100%.
to ra tn hiu ny TPU cn lp trnh mt tham s xc nh chu k tn hiu v mt tham s xc
nh mc cao ca tn hiu. Khi cp nht cc tham s ny c th lp tc lm thay i dng sng
PWM ti ng ra.
8.4.2.5. iu ch rng xung ng b. (SPWM synchronized PWM)

TPU c th to ra mt xung PWM m CPU c th thay i chu k v phn cao ti bt c thi
im no. Khi c ng b vi knh th 2, thi im chuyn trng thi t thp ln cao ca
SPWM s c quan h vi thi im chuyn trng thi trn knh th 2.
8.4.2.6. o chu k c pht hin chuyn mc cng thm (PMA- Period Measurement with
Additional Transition Detect)
Chc nng ny s dng hiu qu cho vic o tc quay ca mt vt. Khi o chu k vi
chc nng pht hin chuyn mc tn hiu cng thm cho php vic o chu k 23 bit trong cc ng
dng c bit. N c th pht hin ra chuyn mc tn hiu cng thm gy ra bi cc tc nhn bn
ngoi khng theo chu k v ch th t l nh hn ca chu k ny so vi cc chu k o trc .
Khi pht hin ra trng thi chuyn mc khng theo chu k, cc trng thi ny c th c m
206

v so snh vi mt gi tr lp trnh trc v reset TCR2 v $FFFF. Ngoi ra, tham s knh s xc
nh mt a ch c th lm c trng thi, khi c bng 1 th TCR2 = $FFFF c ngha l c 1 s
chuyn mc thm tip theo c pht hin.
8.4.2.7. o chu k c pht hin mt trng thi chuyn mc (PMM)

B o chu k c pht hin mt trng thi chuyn mc cng c 23 bit. N pht hin c vic
mt trng thi chuyn mc bt thng do tc nhn bn ngoi gy ra v ch th gi tr t l ln hn
so vi chu k o c trc . S ln mt chuyn trng thi xung bt thng c th m so
snh vi mt s lp trnh trc v Reset TCR2 v $FFFF. Tng t nh PMA, PMM cng c
mt c trng thi pht hin mt chuyn trng thi th 2 xy ra.
TI
T.
ED
U
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8.4.2.8. B to xung ng b vi v tr (PSP Position Synchronized Pulse Generator)

Bt k mt knh no ca TPU cng c th to ra i mc ng ra, hoc xung ng ra da theo
chu k c tnh ton trc ca mt knh khc. Trong gii thut ny cn s dng 2 TCR: TCR1
c cp clock bn trong, v TCR2 c cp clock t mt b ch th v tr trong thit b ca ngi
s dng. V d TCR2 c cp clock t s rng ca mt bnh xe o tc ca xe t s dng
PMA hoc PMM. Cc rng bnh xe s dng nhn bit vng quay ca ng c theo , v th
TCR2 s biu din quay ca ng c, hay b m s biu din cho quay.
TPM c ti 15 knh to xung ng b theo v tr, mi knh c mt ng vo tham chiu ring
cung cp t mt knh PMA hoc PMM. Cc chu k ca cc bnh rnng bnh xe s c o l
lu tr li. TCR2 s c reset khi ng c chy ti v tr tham chiu. Ng ra ca cc knh s tc
ng ti mt s quay c th ca ng c tu theo s chu k c lp trnh trc. Do gia hai
rng bnh xe c th trn 30 , phn l ny s c nhn ln tnh ra gi tr thch hp. C hai
ch hot ng cho php xc nh chiu di xung theo hoc theo thi gian.
PE
.P
8.4.2.9. Khi iu khin ng c bc (SM Step Motor)

Khi ny cung cp chc nng iu khin ng c bc tng hoc gim tc ng c bc
tuyn tnh theo 14 tc bc lp trnh. Ngi s dng c th lp trnh chn mt nhm knh
bt k (ln ti 8 knh) to ra cc logic iu khin cho ng c bc.
Khong thi gian gia cc bc (P) c xc nh theo cng thc:
P(r) = K1 K2 * r
Vi r l s bc (1 ti 14) v K1, K2 l cc tham s lp trnh.
Sau khi lp trnh s bc cho v tr mong mun vo mt tham s 16 bit, CPU s to ra s
bc ng theo yu cu. Bc tip theo TPU s iu khin TPU s iu khin ng c tng bc
ti v tr mong mun vi tc tng hoc gim tuyn tnh theo cc tham s c lp trnh.
CPU c th thay i cc tham s iu khin trong khi TPU iu khin ng c. V gii thut iu
khin mi s c thc hin ngay bc k tip ca ng c.
CPU s khi ng mt tham s 16 bit nh ngha trng thi ng ra ca chn tng ng.
CPU cng ghi cc bit mu nh ngha phng php iu khin bc l ton bc hay na bc
(full step hay half step). Sau mi bc tham s 16 bit ny s c quay i 1 bit, thi gian gia hai
ln dch chuyn k tip s c nh ngha trc trong tham s tc bc.
8.4.2.10. Thanh ghi cha chu k/ rng xung (PPWA Period/Pulse-Width Accumulator)
Thanh ghi PPWA s dng cha tng s xung hay rng xung ca mt tn hiu ng vo theo
s chu k hoc xung c lp trnh trc t 1 ti 255, tng cha c th l 16 hoc 24 bit tu theo
chn la ca ngi lp trnh. Sau mt chu k cha, gii thut iu khin c th to ra mt ng
207
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kt ni ti mt chui ni tip cc khi (ln ti 8 knh). Ngi lp trnh c th ch nh knh bt

u v s knh trong khi, v vic to ra chui ni tip cc khi s tu thuc vo ch hot
ng. Bt c knh no cng c th s dng o tng s chu k ca mt tn hiu vo, thanh cha
c th s dng cc i ln ti 24 bit. TPU s o t 1 ti 255 chu k ri cng vi s chu k c
o trc to ra ngt CPU, iu ny cho php o lng tn s tc thi hoc trung bnh v gi
tr cui cng ca thanh cha ( theo s chu k c lp trnh)
Vic o rng xung ca mt tn hiu ng vo (phn cao ca tn hiu) v cng vi s c
o trc (1-255) s cho php o rng xung tc thi hoc trung bnh. Khi kt hp chc nng
so snh ra vi PPWA, c th to ra mt tn hiu ra t l vi mt tn hiu vo c ch nh trc,
v t l ny c th lp trnh c. iu ny cng cho php to ra nhiu tn hiu ra vi tn s khc
nhau t l v ng b vi mt tn hiu vo trn cc knh khc nhau.
8.4.2.11. B gii m 4 (Quadrature Decode QDEC)
Chc nng gii m 4 s dng hai knh gii m mt cp tn hiu khng cng pha cung
cp cho CPU cc thng tin v hng v v tr. Chc nng ny c bit thch hp c cc cc b
m ho tc quay (rote encoder) trong iu khin ng c. Chc nng ny nhn cc xung t
encoder a ti b m 16 bit c cc chc nng ngt khi trn b m.
Cc tham s b m trong Ram s c cp nht khi pht hin thy mt gi tr chuyn trng
thi hp l trn mt hoc hai ng vo. Bt m s tng hoc gim tu thuc vo s nhanh hoc
chm gia hai tn hiu ng vo ti thi im c s dch chuyn xung. Ngi s dng c th c
hoc ghi b m ti bt k thi im no. B m s chy t do v trn cc gi tr 0000H hoc
FFFFH tu thuc vo hng m.
PE
.P
TI
8.4.2.12. Bng iu khin ng c bc (TSM Table Stepper Motor)

Chc nng TSM cho php iu khin tng v gim tc cho ng c bc vi kh nng lp
trnh c ti 58 cp tc khc nhau, TSM s dng mt bng d liu cha trong PRAM thay
cho vic iu khin ng c bc bng gii thut lp trnh, cc bng nh ngha tng gim tc
ngi s dng hon ton c th nh ngha c. Ngoi ra b tham s vn tc gc cho php iu
khin mn tc quay ca ng c c lp vi bng tham s gia tc. CPU ch cn ghi ti TPU v
tr cn iu khin, TPU s thc hin cc cng vic: tng tc, chnh tc quay v gim tc dt
c v tr mong mun. Ngoi ra chc nng ny ca TPU h tr c haoi kiu iu khin ton bc
hoc na bc cho cc ng c hai pha.
8.4.2.13. B m Bt/i mc ng vo mi (New Input Capture/Transition Counter

NITC)
Bt k mt knh TPU nao cng c th bt gi tr trong mt thanh ghi TCR hoc trong mt
nh RAM tham s bt k khi xy ra mi qu trnh chuyn i trng thi hay mt s qu trnh
chuyn i trng thi, sau to ra mt yu cu ngt trn BUS ch. Thi gian chuyn gia hai ln
chuyn mc gn nht c lu trong parameter RAM. Mt knh c th thc hin bt ng vo lin
tc, hoc theo mt trng thi chuyn mc hoc theo mt s ln chuyn mc nht nh cho n khi
chng c khi ng li. Sau mi ln chuyn mc hoc mt s ln chuyn mc nht nh, mt
knh c th to ra mt kt ni ti mt knh khc.
8.4.2.14. Hng i so snh ra (Queued Output Match - QOM)
QOM c th to ra mt hoc nhiu ng ra so snh ng bng mt bng cc s kin trong
parameter RAM. Vi chc nng ny, TPU c th to ra mt chui xung phc tp, mt ln, mt s
208

ln hoc lin tc ng ra. Chc nng ny c th cho php hot ng bng mt ng kt ni t
mt knh khc ti. QOM c th to ra dng sng iu rng xung vi mc cao c th thay i t 0
ti 100%.
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8.4.2.15. Thanh cha thi gian c th lp trnh c (Programmable Time Accumulator PTA)
PTA l mt thanh ghi 32 bit cha tng thi gian mc cao, tng thi gian mc thp hoc tng
thi gian ca mt chu k ca mt tn hiu ng vo theo s chu k hoc s xung c th lp trnh
c. B cha c th bt u hot ng mt cnh ln hoc mt cnh xung, sau mt s chu k
hoc xung lp trnh trc, PTA c th to ra mt yu cu ngt hay mt kt ni ti mt knh khc.
TPU c th o t 1 ti 255 chu k v mt php o c th cng vi 1 hoc nhiu php o trc
to ra tn hiu ngt CPU, chc nng ny cho php thc hin cc php o tn s tc thi v
tn s trung bnh.
TI
T.
ED
8.4.2.16. iu ch rng xung a knh (Multichannel Pulse Width Modulation MCPWM)

MCPWM c th to ra cc ng ra iu ch rng xung vi chu k nhim v (duty cycle) t
0 ti 100% c l p vi cc hot ng khc ca TPU. Mt knh PWM ny cn hai knh m ca
TPU v mt cng logic (mi knh PWM n c th to ra bng QOM).
Cc xug PWM a knh m MCPWM tao ra c th hai dng: gn cnh hoc gn gia thi
im mc cao. Ch gn cnh s s dng n+1 knh TPU cho xung PWM n knh. Ch gn
gia s dng 2n+1 knh. Ch gn gia cho php cho php ngi s dng nh ngha gii hn
thi gian (dead time) trc, v th hai knh PWm da knh c th s dng li trc tip cu H
(H-bridge). Chc nng ny rt quan trng cho cc ng dng iu khin ng c.
PE
.P
8.4.2.17. Gii m cm bin tc nhanh (Fast Quadrature Decode - FQD)

FQD l chc nng phn hi v tr cho vic iu khin ng c, n gii m hai tn hiu cung
cp t cm bin vng quay (Rote Encoder) tng b m v tr 16 bit. FQD c kt hp vi
mt kho chuyn tc (speed switch) cho php gii m tn hiu tc cao. Mi b m c
mt tem thi gian (time stamp) c th ni suy ra v tr v vn tc quay khi ng c chy vi
vn tc thp hn hoc s dng encoder c phn gii thp hn. Ng ra th 03 ca cc encoder
s c x l bng cc knh ICTC.
8.4.2.18. B truyn nhn ni tip cn ng b (Universal Asynchronous

Receiver/Transmitter - UART)
UART s dng hai knh ca TPU thc hin chc nng truyn d liu ni tip cn ng b.
di ca d liu truyn c th lp trnh thay i c t 1 ti 14 bit. Ngoi ra n cn h tr cc
tnh nng kim tra chn l, lp trnh tc truyn. Tc truyn cng ni tip c th ln hn 100
Kbaud. TPU c th chy ng thi 8 knh truyn cn ng b hai chiu vi tc ln hn 9600
baud.
8.4.2.19. o chiu ng c khng chi than (Brushless Motor Commutation - COMM)

Chc nng ny cho php to ra tn hiu o pha cho mt s loi ng c khng chi than nh
ng c 3 pha iu khin trc tip bng dng in. N c th to ra trng thi o chiu trc tip
t b gii m v tr FQD m khng cn s dng cc b gii m hiu ng Hall (Hall Effect Decode)
209

Chui trng thi s c thc hin theo mt bng trng thi m ngi s dng lp trnh, v th
chc nng ny c th s dng mm deo cho cc ng dng chung khc. Mt bng tham s trong
CPU cho php tt c cc gc chuyn mch c th tng hoc gim t CPU, tnh nng ny rt hu
dng cho vic duy tr moment quay tc cao.
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8.4.2.20. o tn s (Frequency Measurement - FQM)

FQM s m s chu k tn hiu ng vo ca mt knh TPU trong mt chu k ca s do ngi
s dng lp trnh. Chc nng ny c th chy ch lin tc hoc tng ca s ring. Ngi s
dng c th la chn cc xung s c pht hin mi cnh xung hoc mi cnh ln. Chc nng
ny s dng cho vic o tn s cao, vic o tn hiu tn s thp c kh nng loi b nhiu c th
thc hin bng PTA.
ED
8.4.2.21. Gii m hiu ng Hall (Hall Effect Decode - HALLD)

Chc nng ny s dng cho vic gii cm bin tn hiu t cc ng c khng chi than cng
vi mt ng vo xc nh hng t CPU thnh m ts trng thi. Chc nng ny h tr 2 hoc 3
knh gii m. S trng thi c gii m s c ghi vo mt knh COMM, cung cp ng ra
li trng thi o chiu. Ngoi cc ng dng cho brushless motor, chc nng ny cn c th s
dng cho cc ng dng chung khc nh gii m cc cng tc chn (option switch).
T.
8.5. MODULE TRUYN NHN NI TIP C HNG I (QUEUE

SERIAL MODULE - QSM)
PE
.P
TI
QSM bao gm hai b giao tip ni tip: cng giao tip ni tip c hng i (queued serial
peripheral interface - QSPI) v giao tip thng tin ni tip (serial communication interface - SCI),
hai khi ny hot ng c lp nhau.
QSPI l giao tip truyn d liu ni tip ng b song cng cho php truyn d liu ni tip
vi cc thit b ngoi vi v vi cc MCU khc vi 03 ng dy: data in, data out v clock. V n
h tr thm c ch hng i cho vic truyn nhn d liu. Bn chn chn thit b vo ra lp trnh
c cho php chn ti 16 thit b vo ra. Hng i Ram ca cng ny cho php lu tr ti 16 ln
truyn ni tip, mi gi tr truyn c th 8 hoc 16 bit., hoc c th cho php truyn ti 256 bit d
liu m khng cn c s can thip iu khin ca CPU. Mt ch gim st c bit cho php ly
mu lin tc ng vo v t ng ghi li trong RAM ca QSPI, c ch ny cho php giao tip rt
hiu qu vi cc b bin i A/D.
SCI l giao tip ni tip UART n c c ch truyn d liu theo chun NRZ (non return to
zero), n c th hot ng trong ch song cng hoc bn song cng. C hai bit cho php ring
cho b truyn v b nhn d liu v hai b m d liu cho cng. Mt b to tc truyn loi
modulus cho php to ra tc truyn t 64 ti 524 Kbaud vi tn s clock ca h thng l 16.78
Mhz, hoc t 110 ti 655 Kbaud vi tn s clock ca h thng l 20.97 Mhz. Chiu di d liu
truyn c th 8 hoc 9 bit c th lp trnh c bng phn mm. Mch pht hin li c th pht
hin sai 1/16 bit trong mt chu k truyn. Chc nng nh thc (Wakeup) cho php CPU chay
khng b ngt cho ti khi c mt d liu y trn cng.
S khi ca QSM trn hnh 8.9, n c 9 chn vo ra trong 8 chn nu khng s dng
cho cc chc nng ca QSM th c th s dng ging nh cc cng vo ra thng thng, cn chn
210
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RxD l mt ng ch vo s dng ring cho SCI.

Cc chn ca SCI bao gm RxD v TxD, chn RxD c s dng lm chn nhn d liu cho
cng SCI, khi SCI khng c cho php chn ny s khng c s dng, n khng s dng l
chn vo ra thng thng. TxD l chn xut d liu ca cng SCI, khi b truyn ca SCI khng
c cho php, n c th s dng nh mt chn vo ra thng thng, n c th l mt ng vo
hoc mt ng ra tu thuc vo bit TxD trong thanh ghi DDRQS. Khi b truyn c cho php
hot ng bit TxD trong DDRQS s khng c xt n. B truyn ca SCI s c php khi lp
bit TE trong thanh ghi iu khin 1 ca QSM (SCCR1).
.P
Hnh 8.9: S khi ca QSM.
PE
Khi QSPI bao gm 7 tn hiu, khi khng s dng chc nng QSPI cc tn hiu ny tr thnh
cc ng vo ra s thng thng, hng truyn d liu trn cc ng ny s xc nh trong
thanh ghi DDRQS, ngi s dng cn phi khi ng ng gi tr ca DDRQS cc chc nng
QSPI hot ng ng.
- Cc chn PCS3 PCS0 (Pripheral Chip Select) c QSPI cung cp chn thit b vo
ra.
- SS (Slave Select)- Tn hiu ny s c tc ng chn QSPI khi n ch Slave.
- SCK (Serial Clock) Tn hiu ny c QSPI cung cp khi n ch Master, v nhn
clock t master khi n ch slave.
- MISO (Master In Slave Out): L ng nhn d liu trong ch Master v truyn d
liu trong ch slave.
- MOSI (Master Out Slave In): l ng truyn d liu trong ch master v nhn d liu
trong ch Slave.
211

Bn b nh ca QSM trong bng sau:
S/U
S/U
S/U
S/U
S/U
$YFFC18
$YFFC1A
$YFFC1C
$YFFC1E
$YFFC20
$YFFCFF
$YFFD00
$YFFD1F
$YFFD20
$YFFD3F
$YFFD40
$YFFD4F
TI
S/U
RECEIVE RAM (RR[0:F])
TRANSMIT RAM (TR[0:F])
COMMAND RAM (CR[0:F])
.P
S/U
S/U
$YFFC06
$YFFC08
$YFFC0A
$YFFC0C
$YFFC0E
$YFFC10
$YFFC12
$YFFC14
$YFFC16
8 7
0
QSM MODULE CONFIGURATION (QSMCR)
QSM TEST (QTEST)
QSM INTERRUPT LEVEL QSM INTERRUPT VECTOR
(QILR)
(QIVR)
NOT USED
SCI CONTROL 0 (SCCR0)
SCI CONTROL 1 (SCCR1)
SCI STATUS (SCSR)
SCI DATA (SCDR)
NOT USED
NOT USED
NOT USED
PQS DATA (PORTQS)
PQS PIN ASSIGNMENT
PQS DATA DIRECTION
(PQSPAR)
(DDRQS)
SPI CONTROL 0 (SPCR0)
SPI STATUS (SPSR)
NOT USED
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S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
15
ED
Address
$YFFC00
$YFFC02
$YFFC04
T.
Access
S
S
S
PE
Y = M111, where M is the logic state of the MM bit in the SIMCR.
Cc thanh ghi c gi tr ct truy cp l S chng s ch truy cp c mc gim st

(supervisor), l S/U th c th truy cp c c mc s dng (User). Mc spervisor hay User s
c chn tu thuc vo bit SUPV trong thanh ghi QSMCR.
8.6. TPURAM
TPURAM c dung lng 2 KB SRAM tc truy xut nhanh vi hai chu k BUS (two bus
cycle), n c th s dng lm ngn xp hoc khai bo cc bin. Ngoi ra TPURAM cn c th
s dng lm b nh chy m phng ngi s dng thc hin cc gii thut thi gian mi.
TPURAM c th chim 4KB trong bn b nh, nhng khi cc thanh ghi iu khin TPU s
khng th truy xut c. D liu c ghi trong vng nh ny c th theo byte, t hoc 2 t.
212

TPURAM c th s dng cho c vng nh chng trnh v vng nh d liu. Trong ch gim
ngun (power down) cc d liu trong TPURAM c th duy tr bng ngun PIN d phng. Cc
bit RASP trong thanh ghi TRAMCR c s dng iu khin vic truy cp TPURAM. iu
ny cho php thc hin cc chng trnh trong TPURAM, v cho php ch a ch tng i
theo b m chng trnh truy xut cc lnh trong b nh TPURAM. Bn b nh ca
TPURAM c cung cp trong bng sau, tt c cc thanh ghi iu khin TPURAM ch c th
truy cp c trong ch gim st.
$YFFB02
$YFFB04
$YFFB06
$YFFB3F
$YFFB00
15
TPURAM MODULE CONFIGURATION REGISTER

(TRAMMCR)
TPURAM TEST REGISTER (TRAMTST)
TPURAM BASE ADDRESS REGISTER (TRAMBAR)
NOT USED
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S
S
a ch
ED
Kiu
truy cp
S
Y = M111, where M is the logic state of the MM bit in the SIMCR.
T.
8.6.1. Khi thanh ghi ca TPURAM
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C 03 thanh ghi iu khin trong TPURAM l: thanh ghi nh cu hnh RAM (TRAMMCR),
thanh ghi kim tra RAM (TRAMTST) v thanh ghi a ch c s RAM (TRAMBAR)
C mt khi thanh ghi vi kch thc nh nht l 8 byte khng c a ch ho, khi c lun
c gi tr 0 v khi ghi khng tc ng.
Thanh ghi nh cu hnh khi TPURAM 16 bit c cu to nh sau:
PE
Bit STOP (Stop Control) = 0: RAM hot ng bnh thng, nu = 1: RAM chuyn qua ch
ngun thp (khng hot ng). Sau khi RESET trang thi bit ny s bng 0, trong ch stop
RAM s vn lu tr c cc gi tr ghi trong n nhung CPU s khng c ghi c.
RASP (RAM Array Space Field) = 0 th TPURAM s l vng truy cp khng gii hn, khi bit
ny bng 1, TPURAM s nm trong khng gian nh ch truy cp trong ch gim st.
Thanh ghi TRAMTST (TPURAM Test Register) c s dng cho vic kim tra khi
TPURAM ca nh sn xut.
Thanh ghi TRAMBAR (TPURAM Base Address and Status Register) 16 bit nh sau:
Cc bit ADDR[23:11] (RAM Array Base Address) l cc a ch c s ADDR[23:11] ca

RAM khi n c cho php hot ng.
Bit RAMDS (RAM Array Disable) khi bng 0 th RAM c cho php. RAM lun khng
c cho php sau khi RESET (RAMDS = 1), vic ghi gi tr ti cc bit ADDR s t ng xo bit
213

RAMDS cho php RAM hot ng.
8.6.2. Hot ng ca TPURAM

TPURAM c 6 ch hot ng nh sau:
1. TPURAM hot ng trong ch bnh thng khi c cp ngun VBDD khi n c th
truy xut d liu theo byte, t hoc t kp, cc byte hoc t cao lun nm a ch chn truy xut
ch trong mt chu k bus (bng 2 chu k clock) ca h thng. Mt t kp cn truy xut trong hai
chu k Bus.
2. Ch ch (Standby) nhn gi nguyn cc gi tr trong TPURAM khi mt ngun VDD. Cc
gi tr lu tr trong RAM s c gi nguyn vi ngun VSTBY. Mch in iu khin trong
TPURAM s t ng chuyn mch qua ngun VSTBY khng lm mt d liu. Trong ch ny
T.
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cc gi tr truy xut t RAM s khng ng.

3. Ch Reset cho php CPU thc hin hon tt chu k bus hin hnh trc khi h thng b
Reset. Khi mt tn hiu reset ng b c cp ti TPU trong khi d liu ca TPURAM ang truy
xut th qu trnh truy cp s c thc hin hon tt. Khi truy xut t kp, nu reset xy ra khi
ang truy cp t u tin, th ch c vic truy cp t ny c hon thnh. D liu c ghi t
RAM c th b mt khi Reset khng ng b.
4. Ch kim tra: ch ny RAM s c ni ti khi SIM s dng nh sn xut kim
tra MCU.
5. Khi bit STOP ca thanh ghi TRAMMCR c ghi vo gi tr 1, TPURAM s chuyn qua
ch stop, TPURAM s khng c php hot ng nhng tt c cc d liu trong n vn c
duy tr. Nu ngun VDD b mt trong ch stop, mch bn trong TPU s t ng chuyn qua
ngun VSTBY ging nh trong ch Standby.
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TI
6. TPURAM c th s dng chy cc vi lnh trong ROM ca TPU, chc nng ny cho
php pht trin cc on m lnh ca ngi s dng. Trong ch chy m phng, nh thi truy
cp TPURAM s ph hp vi cc vi lnh trong ROM m bo qu trnh chy m phng c
chnh xc.
8.7. LP TRNH ASSEMBLY CHO VI IU KHIN MC68332
PE
8.7.1. Cc ch a ch trong chng trnh hp ng MC68332

Cc ch a ch khi lp trnh cho MC68332 bao gm:
- Trc tip thanh ghi d liu: cc ton hng s nm trong cc thanh ghi d liu. V d
MOVE D3,D4.
- Trc tip thanh ghi a ch: cc ton hng nm trong cc thanh ghi a ch.
- Gin tip thanh ghi a ch: thanh ghi a ch gi a ch ca ton hng. V d MOVE.B
(A0),D7.
- Gin tip thanh ghi a ch tng sau: tng t ch gin tip thanh ghi a ch, tuy nhin
khi d thc hin xong gi tr thanh ghi a ch s c tng. V d MOVE.W (A5)+,D2
sau khi chuyn xong d liu A5 c tng ln 2.
- Gin tip thanh ghi a ch gim trc: tng t ch trn nhng thanh ghi a ch s
c gim trc sau mi thc hin lnh. V d MOVE.B (A1),D4.
- Gin tip thanh ghi a ch c di: a ch ton hng s bng gi tr trong thanh ghi a
ch cng vi s di. V d: MOVE.W 100H(A0),D0.
- Gin tip thanh ghi a ch vi ch s: a ch ca ton hng s bng tng ca gi tr trong
214
mt thanh ghi a ch cng vi mt ch s (l gi tr trong mt thanh ghi a ch hoc d

liu) v mt s di 8 bit. V d MOVE 2(A0,D4.W),D3.
Tuyt i ngn: s dng a ch ch th bng mt s 16 bit. V d MOVE 3C00H,D1.
Tuyt i di: s dng a ch bng s 24 bit. V d MOVE 123456H,D0.
Thanh ghi b m chng trnh vi di: a ch ton hng bng tng thanh ghi PC v
s di 16 bit c du. MOVE.B DATA(PC),D4.
Thanh ghi b m chng trnh vi ch s: a ch ton hng bng tng gi tr trong thanh
ghi PC cng ch s trong thanh ghi a ch hoc d liu cng s di 8 bit c du.
Tc thi: ton hng l mt gi tr c th. V d MOVE.W #9E00,D5.
Hiu ngm: ton hng c mc nh sn trong lnh.
PE
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8.7.2. Tp lnh ca MC68332

Tp lnh ca MC68332 c th chia thnh 8 nhm nh sau:
1. Nhm lnh truyn d liu.
2. Cc lnh s hc.
3. Cc lnh logic.
4. Cc lnh quay v dch.
5. Cc lnh x l bit.
6. Cc php tnh BCD.
7. Cc lnh iu khin chng trnh.
8. Cc lnh iu khin h thng.
Nhm lnh truyn d liu bao gm cc lnh truyn d liu gia b nh v thanh ghi, thanh
ghi v thanh ghi. di d liu truyn c th 8, 16 hoc 32 bit. Cc thanh ghi a ch v d liu
c th s dng trong lnh, cc thanh ghi h thng nh: thanh ghi m iu kin (CCR), thanh ghi
con tr ngn xp ngi s dng (USP), thanh ghi trng thi (SR) cng c th s dng cho cc
lnh di chuyn d liu.
Cc lnh s hc trc ht bao gm cc lnh cng tr cc gi tr 8, 16 hoc 32 bit, cc lnh
nhn c du v khng du cc gi tr 16 bit, cc lnh chia c du v khng du cc s 16 hoc 32
bit cho cc s 8 hoc 16 bit, cc lnh xo, so snh, kim tra v ly b 2 cc gi tr 32 bit. Nhm
lnh ny cn c cc lnh thc hin vi du m rng (sign extension). Cc ton hng s dng trong
nhm lnh ny l tt c cc thanh ghi a ch, d liu v cc nh v b nh.
Cc lnh logic bao gm cc lnh AND, OR, EOR (XOR) v NOT thc hin vi cc gi tr 8,
16 hoc 32 bit trong cc thanh ghi d liu, trong b nh hoc trong cc thanh ghi CCR hoc SR.
Cc lnh quay dch thc hin vi cc ton hng 8, 16, 32 bit trong cc thanh ghi d liu hoc
trong b nh.
Cc lnh x l bit ch thc hin vi cc ton hng 8 v 32 bit nm trong thanh ghi d liu
hoc b nh. Tng bit ring trong ton hng c th c kim tra, lp, xo hoc ly b.
Cc lnh BCD bao gm cc lnh cng, tr v ly m (b 10) cc gi tr d liu 8 bit (2 s
BCD). Cc ton hng c th nm trong cc thanh ghi d liu hoc trong b nh.
Nhm lnh iu khin chng trnh bao gm cc lnh r nhnh (nhy c iu kin), cc lnh
nhy khng iu kin, cc lnh lp byte, cc lnh gi v quay v t chng trnh con.
Nhm lnh cui cng l nhm lnh iu khin h thng, bao gm cc lnh phn mc c
quyn ca h thng, hiu chnh gi tr trong cc thanh ghi h thng nh SR v USP, cc lnh
ngng va reset b vi x l v quay v t mt ngoi l. Mt s lnh khc nh thc hin cc php
AND, OR, EOR x l gi tr ca thanh ghi CCR, cc lnh by (TRAP).
215
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8.7.2.1. Nhm lnh truyn d liu

Lnh chuyn i d liu gia cc thanh ghi EXG (Exchange): lnh ny chuyn i d liu
gia hai thanh ghi. Cc thanh ghi s dng c th l cc thanh ghi d liu a nng hoc cc thanh
ghi a ch. Lnh ny lun lun truyn d liu 32 bit v khng c m iu kin no b thay i.
V d: EXG D3,D5
Lnh np a ch tc ng LEA (Load Effective Address): lnh ny np a ch 24 bit vo
thanh ghi a ch. Trong mt ch a ch bt k cn tnh ton ra a ch ca ton hng, th kt
qu s c gi l a ch tc ng (Effective Address). Thng thng a ch tc ng c s
dng bn trong b vi x l v sau n khng c gi li. Lnh LEA cho php gia li a ch
tc ng s dng trong mt lnh. Khng c m iu kin no bit thay i.
V d: LEA 8500H,A1 ; A1 = FFFF8500H
LEA 10H(PC), A1; A1 = PC +10H
Lnh lin kt v nh v tr LINK: lnh ny nh v tr cho vng nh ngn xp v thc hin
danh sch lin kt. Cc ton hng trong lnh LINK s thc hin nh sau: thanh ghi a ch trong
lnh s c ct vo ngn xp, thanh ghi con tr ngn xp c ct vo thanh ghi a ch, sau
s di trong lnh s c cng vo thanh ghi con tr ngn xp. Khng c m iu kin no b
thay i.
V d: cc thanh ghi A0 = 00006200H v A7 = 0000FFC4H sau khi thc hin lnh:
LINK A0,#0FFF0H
Trc ht do c gi tr np vo ngn xp, thanh ghi con tr ngn xp s gim, do mt thanh
ghi a ch np vo ngn xp nn thanh ghi con tr ngn xp s gim i 4, nh vy A7 =
0000FFC0H, sau A0 s c ghi vo b nh bt u ti a ch 0000FFC0H ti a ch
0000FFC3H. Tip theo A0 c np gi tr hin hnh ca con tr ngn xp l 0000FFC0H. Sau
s di (FFF0) ch th trong lnh c cng vo con tr ngn xp, lc ny A7 s c gi tr l
0000FFFBH (ch b x l ly A7 mc nh l con tr ngn xp).
Lnh di chuyn d liu MOVE: Lnh ny s dng di chuyn d liu theo byte, t hoc t
di (Long word) gia cc thanh ghi d liu, cc thanh ghi a ch v cc nh.
V d: MOVE.B #29H,D3
MOVE.W D3,D6
MOVE.L (A0)+,D0
Lnh h tr mi ch a ch cho ton hng ngun, ch c ton hng tc thi khng s dng
lm ton hng ch v khng c hai ton hng b nh trong cng mt lnh.
Lnh MOVE tc ng ti cc bit trng thi (cc m iu kin). V d sau lnh:
MOVE.B #86H,D2
Bit MSB ca ton hng tc thi #86H bng 1, d liu l mt s m v th bit N=1, c Z bng
0 v kt qu khc 0, c V v C c xo v c X (extend flag).
Lnh di chuyn d liu vo thanh ghi a ch MOVEA (Move Address): Trong lnh ny
ton hng ch lun lun mt thanh ghi a ch, lnh c th s dng ton hng mt t hoc mt t
di. Khi ton hng l mt t, ton hng ngun s c lu du m rng thnh 32 bit trc khi
chuyn vo thanh ghi a ch. V d lnh MOVEA.W #9F00H,A2 s chuyn gi tr FFFF9F00H
vo thanh ghi A2. Khng c m iu kin no tc ng sau lnh MOVEA.
Lnh chuyn d liu nhiu thanh ghi MOVEM (Move Multiple Registers): lnh ny c
th s dng truyn d liu t b nh vo cc ton hng l cc thanh ghi d liu, cc thanh ghi a
ch. Ch c ton hng t hoc t kp c s dng trong lnh, khi ton hng mt t c c t
b nh, n s c chnh du m rng trc khi trc khi np vo thanh ghi. V d nu 3500H
c c t b nh th thanh ghi s c gi tr l 00003500H, cn nu gi tri AF10H c c t
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b nh th thanh ghi s c gi tr l FFFFAF10H.

Ch c 03 ch a ch c s dng trong lnh ny l: ch tng trc, ch gim trc
v ch iu khin. Ch iu khin c th s dng cho tt c cc trng hp. Ch a ch
tng trc ch s dng cho vic truyn d liu t b nh ti thanh ghi. Ch a ch gim trc
ch s dng truyn d liu t thanh ghi ti b nh. Lnh MOVEM vi hai ch a ch ny c
th s dng thc hin mt ngn xp theo nguyn tc vo trc ra sau.
Trong lnh ny ngi s dng cn ch th tp thanh ghi c ct vo b nh (hoc c np
gi tr t b nh), cc thanh ghi c th ch th ring r trong lnh v ngn cch vi nhau bng du
/. V d cc thanh ghi D0, D2, D3, D5, A4 v A6 c th ch th trong lnh l D0/D2/D3/D5/A4,
cng c th chi th theo trnh t khc A6/D5/D0/A4/D3/D2 kt qu thc hin s khng thay i.
Khi thc hin CPU lun theo trnh t ghi t A7 A0, D7 D0 v c theo trnh t ngc li. Vi
mt chui cc thanh ghi lin tip c th vit D0-D4/A2-A5. Khng c m iu kin no thay i
sau lnh.
V d: D0=55556666H, D1=77778888H, D2=9999AAAAH, D3=BBBBCCCCH v TAB1
nm ti vng nh 0030B8. Sau lnh MOVEM.W D0-D3,TAB1 v d liu c ghi theo t nn
CPU s s dng 2 nh ghi gi tr cho mt thanh ghi, v ch c na thp ca cc thanh ghi
c lu vo b nh. (0039B8) = 66, (0030B9) = 66; (0030BA) = 88; (0030BB) = 88 .
Lnh chuyn d liu ti thit b MOVEP (move peripheral data): Lnh ny s dng rt
hu dng vi cc h thng thit k vi cc thit b vo ra ch s dng BUS d liu. Lnh
MOVEP s truy cp mt nhm hai a ch ti mt thi im, nu trong lnh ch th mt a ch
chn, th ch c cc vi tr chn c truy cp. Lnh ch s dng cc ton hng t hoc t di,
khng c m iu kin no thay i sau khi thc hin lnh, v ch c ch a ch gin tip
thanh ghi vi a ch di c s dng trong lnh.
V d: D2=12345678H; A1=00045000H sau khi thc hin lnh MOVEP.W D2,0(A0) do lnh
ch th truy cp theo t (word) nn hai nh s c truy cp vi a ch c ch th bng A1+0
= 00045000H. D liu s c ghi ti a ch 56H cha trong cc bit 8 15 ca D2. V tr th hai
trong b nh c c l 00045002H v ghi ti a ch 78H. Nu thc hin lnh MOVEP.W
0(A1),D2 th d liu th d liu t cc a ch 00045000H v 00045002H s c chuyn vo cc
bit 8-15 v 0 7 ca thanh ghi D2.
Lnh chuyn d liu nhanh MOVEQ (move quick): Lnh ny ch s dng chuyn 8 bit
ti mt thanh ghi d liu, trc khi d liu c truyn, ton hng tc thi s c thc hin du
m rng thnh 32 bit, lnh MOVEQ c s byte m my t hn lnh MOVE. Khng c m iu
kin no b thya i sau lnh.
V d: lnh MOVEQ #0B7H,D4 s chuyn gi tr FFFFFFB7H vo thanh ghi D4.
Lnh ct a ch tc ng vo ngn xp PEA (Push effective address): trong lnh ny a
ch tc ng s c chuyn thnh gi tr 32 bit trc khi np vo ngn x ca h thng. Khng
c m iu kin no b thay i sau lnh.
V d; A5=00003060H sau lnh PEA 40H(A5) b vi x l trc ht cng 40H vi
00003060H = 000030A0H sau ct gi tr ny vo ngn xp.
Lnh chuyn i v tr d liu trong na thanh ghi SWAP (swap register halves): lnh
ny thc hin chuyn i v tr ca t cao v t thp ca d liu trong mt thanh ghi. Khng c
m iu kin no thay i sau lnh.
V d: D5 = 3CFF9100H th sau lnh SWAP D5 s c D5 = 91003CFFH, v bit 31 l mc
cao nn N=1; Z=0, C=0 v X khng thay i.
Lnh lin kt ngc UNLIK (Unlink): l lnh ngc li ca LINK, gi tr cha trong thanh
ghi a ch s c np cho con tr ngn xp. Mt long word nm nh ngn xp mi s c
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np vo thanh ghi a ch, khng c m iu kin no b nh hng.
V d: thanh ghi A2=0009FFB4H sau khi thc hin lnh UNLK A2 th con tr ngn xp s
c np gi tr bng 0009FFB4H v d liu nm ti cc a ch t 0009FFB4H ti 0009FFB7H
s c chuyn vo thanh ghi A2 v cui cng con tr ngn xp s c gi tr l 0009FFB8H.
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8.7.2.2. Nhm lnh s hc

Lnh cng nh phn ADD (add binary): s dng cng cc gi tr 8, 16 hoc 32 bit. Trong
hai ton hng phi c mt thanh ghi d liu. Tt c cc m iu kin s b tc ng theo kt qu.
V d: D2=12345678H, D3=5F02C332H th sau lnh ADD.B D2,D3 th D3=5F02C3AAH,
ch c 8 bit thp ca D3 thay i, D2 khng thay i. Cc m iu kin N=1; Z=0; V=1; C=0 v
X=0. Ch c N=1 v bit cao nht ca 8 bit thp trong thanh ghi D3 bng 1.
Lnh cng a ch ADDA (Add address): Lnh ny s dng cng mt d liu ti thanh
ghi a ch. Tt c cc ch a ch c th s dng trong lnh, nhng ch c d liu word hoc
long word s dng c. Tt c cc m iu kin khng thay i sau lnh.
V d: A0=CE001A2BH v A3=00140300H th sau lnh ADDA.W A0,A3 s c
A3=00141D2BH, ch c t thp ca A3 thay i, A0 khng thay i.
Lnh cng gi tr tc thi ADDI (add immediate): lnh ny thc hin cng ton hng tc
thi c di 8, 16 hoc 32 bit vo ton hng ch. Ch a ch tng i PC khng c s
dng, tt c cc m iu kin b thay i theo kt qu
V d: D2=250C30F7H tha sau lnh ADDI.W #10H,D2 s c D2=250C3107H (CF=1).
Lnh cng nhanh ADDQ (add quick): lnh ny tng t lnh ADDI, khc ch ton hng
tc thi phi c gi tr t 1 ti 8. Khi cng gi tr tc thi vo mt thanh ghi a ch th c 32 bit
ca thanh ghi a ch s b thay i.
Lnh cng m rng ADDX (add extended): ch c hai ch a ch l: thanh ghi d liu
cng vi thanh ghi d liu v ton hng trong b nh cng vi ton hng b nh s dng ch
gin tip gim trc s dng trong lnh ny. Ni dng c X s bao gm trong php cng. Tt c
03 loi kch thc d liu c th s dng v tt c cc m iu kin s b nh hng theo kt qu
lnh.
V d: lnh ADDX.B D2,D3 s cng D2, D3 v c X kt qu ghi trong D3
Lnh ADDX -(A0), -(A1) trc ht gim gi tr trong cc thanh ghi A0 v A1 i 2,
sau d liu trong b nh tr bi A0 v A1 v c X s c cng vi nhau, cui cng kt qu s
c ct vo b nh tr bi thanh ghi A1.
Lnh xo CLR (clear an operand): lnh ny ghi 0 ti ton hng, tt c 03 kch thc d liu
u s dng c v tc ng ti cc m iu kin.
V d: CLR.B D0
;xo 8 bit thp ca D0
CLR.W A4
;xo 16 bit thp ca A4
CLR.L ARRAY;
Xo 4 byte trong b nh bt u ti a ch tr bi ARRAY.
Lnh so snh CMP (compare): Lnh ny s dng so snh mt d liu vi gi tr trong mt
thanh ghi d liu v tc ng ti cc c trng thi. Php so snh tng ng vi php tr ton hng
ngun cho ton hng ch nhng khng thay i gi tr ca ton hng ch.
V d: D6 = 485C29AFH th sau lnh CMP.W #29AFH,D6 th ZF=1.
Lnh so snh a ch CMPA (Compare address): lnh ny tng t nh lnh CMP nhng
ch so snh d liu vi mt thanh ghi a ch. Cc ton hng word v long word c th s dng
trong lnh, khi s dng ton hng word, gi tr ca n s c ly du m rng trc khi so snh.
Lnh so snh vi ton hng tc thi CMPI (compare immediate): Lnh ny so snh mt
d liu tc thi vi ton hng ch, lnh ny s khng s dng ton hng ch l mt thanh ghi a
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ch, tt c cc kch thc d liu u c th s dng.

V d: A3=00015030H th sau lnh CMPI.W #5,(A3) th t d liu nm ti 00015030H v
00015031H s so snh vi 5 v thit lp cc m iu kin tng ng.
Lnh so snh b nh CMPM (compare memory): lnh ny cng ging nh cc lnh so
snh khc ngoi tr ton hng ch l mt nh ch th bng ch a ch gin tip thanh ghi
tng trc. Tt c cc kch thc d liu c th s dng.
Vi d so snh hai d liu 10 byte trong b nh c a ch tr bi cc thanh ghi A1 v A2
chng ta c th thc hin lnh CMPM.B (A1)+, (A2)+ mi ln, nu khng thy ZF=0 th hai s
10 byte s bng nhau.
Lnh chia c du DIVS (sign divide): Lnh ny thc hin php chia s c du 32 bit trong
ton hng ch cho s 16 bit c du trong ton hng ngun. Sau khi chia, thng s s cha trong
16 bit thp ca ton hng ch, s d cha trong 16 bit cao ca ton hng ch. Du ca s d s
lun cng du vi s chia tr khi s d bng 0. Khi chia cho 0 s xy ra ngoi l, tt c cc m
iu kin s b nh hng sau lnh.
V d: D2=FFFFFC18H (-1000) v D3=000186A0H (100000) th sau lnh DIVS D2,D3 s
c D3=0000FF9CH c 16 bit cao bng 0 v php chia khng d v 16 bit thp l FF9CH=-100
thp phn.
Lnh chia khng du DIVU (unsign divide): lnh ny tng t lnh DIVS nhng thc hin
vi cc s nh phn khng du, cc m iu kin cng b nh hng ging nh lnh DIVS.
Lnh thc hin du m rng EXT (sign extend): lnh ny thc hin vic m rng bit du
ca mt thanh ghi d liu vo cc bit cao cn li ca n. Cc ton hng word hoc long word
c php s dng trong lnh. Khi m rng du cho mt byte, cc bit 8 15 s chp trng thi
ca bit 7. Khi m rng du cho ton hng 1 t cc bt 16 31 s mang trng thi ca bit D15. Tt
c cc m iu kin u b nh hng.
Vi d: D3=000000C6H sau lnh EXT.W D6 th D6=0000FFC6H, v sau lnh EXT.L D6 th
D6=000000C6H.
Lnh nhn c du MULS (signed multiply): Lnh ny thc hin nhn hai s c du 16 bit,
ton hng ch phi l mt thanh ghi d liu. Tt c cc m iu kin s b tc ng.
V d: D4=0000FFF0H (-16) v D5=0000FFF6H (-10) sau lnh MULS D4,D6 s c
D5=000000A0H (160).
Lnh nhn khng du MULU (unsigned multiply): Lnh ny tng t MULS nhng thc
hin vi cc s nh phn khng du.
Lnh ly m NEG (negate): lnh ny thc hin ly b 2 ca ton hng ch. Tt c cc loi
d liu u s dng c. Tt c cc m iu kin s b tc ng.
V d: D2=052055C6H sau lnh NEG.B D2 th D2=0520553AH do b 2 ca C6 bng 3AH.
Lnh ly b vi du m rng NEGX (negate with extend): Lnh ny ly 0 tr i ton hng
ch sau tr i c X. V c X c th b tc ng bi lnh NEGX trc nn lnh ny c th
s dng cho vic ly b 2 ca mt s ln. Tt c cc kch thc d liu u s dng c, cc m
iu kin u b tc ng.
Lnh tr nh phn SUB (subtract binary): lnh thc hin php tr nh phn trong ton hng
ch l mt thanh ghi d liu cho ton hng ngun. C th s dng tt c cc loi d liu, tt c
cc m iu kin s b tc ng.
V d: D0=0000E384H v D1=CC3EF385H sau lnh SUB D0,D1 s c D1=CC3E1001H.
Lnh tr a ch SUBA (subtract address): Lnh ny s dng ton hng ch l mt thanh
ghi a ch. Ch c cc d liu word hoc long word s dng c. Khi s dng ton hng word,
n s c ly du m rng thnh 32 bit trc khi tr. Cc m iu kin khng b tc ng.
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V d: Mt bng d liu c mi phn t chim 7 byte, gi s A3 ang tr ti byte u tin ca

mt phn t th lnh SUBA.B #7,A3 s lm A3 tr ti phn t trc ca bng.
Tr s tc thi SUBI (Subtract immediate): Lnh ny s tr ton hng ch i mt gi tr
tc thi. Tt c cc loi d liu u s dng c v tt c cc m iu kin u b tc ng.
V d: D2=03059A2EH sau lnh SUBI.B #2CH,D2 s c D2=03059A02H.
Lnh tr nhanh SUBQ (subtract quick): Lnh ny c s dng khi tr i mt gi tr tc
thi t 1 ti 8. Tt c cc kiu d liu u c th s dng. Tt c cc m iu kin u b tc ng.
Lnh tr vi du m rng SUBX (subtract with extend): trong lnh ny ton hng ch s
tr i ton hng ngun v du m rng trong X. Ch c hai ch a ch l thanh ghi d liu v
nh v b nh tr bi ch gin tip thanh ghi gim trc. Tt c cc kch thc d liu u s
dng c. Tt c cc m iu kin u b tc ng.
Lnh kim tra v lp ton hng TAS (test and set an operation): Trong lnh ny 8 bit thp
ca ton hng s c kim tra v hiu chnh cc m iu kin, sau bit 7 ca ton hng ch s
c lp ln 1. Lnh ny ch s dng cho cc ton hng byte.
V d: D5=2CC3E500H sau lnh TAS D5 do byte thp ca D5 = 00 nn ZF=1 v NF=0 sau
bit 7 ca D5 c lp v D5=2CC3E580H.
Lnh kim tra ton hng TES (test an operand): Trong lnh ny ton hng ch s c so
snh vi 0 v tc ng cc m iu kin. Sau lnh ton hng ch s khng thay i. Tt c cc
kch thc d liu u c th s dng trong lnh.
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8.7.2.3. Nhm lnh logic

Lnh logic AND: Lnh ny thc hin logic AND gia hai ton hng, tt c cc kch thc d
liu u c th s dng. Mt ton hng phi l thanh ghi d liu, ton hng kia c th l mt thanh
ghi a ch. Tt c cc m iu kin s b tc ng.
V d D0=3795AC5FH, D1=B6D34B9DH sau lnh AND.W D0,D1 th D1=B6D3081DH do
AC5F And 4B9D = 081DH.
Lnh ANDI (and immediate): Lnh ny tng t lnh AND, nhng ton hng ngun l mt
s tc thi. Tt c cc kch thc d liu u s dng c, tt c cc c u b tc ng.
Lnh OR: Lnh ny ging lnh AND, nhng thc hin logic OR gi hai ton hng.
Lnh ORI: Thc hin OR ton hng ch vi ton hng tc thi.
Lnh EOR: Thc hin logic XOR hai ton hng.
Lnh EORI: Thc hin EOR vi ton hng tc thi.
Lnh NOT: Thc hin logic NOT hay ly b 1 ton hng ch, tt c cc kch thc d liu
u s dng c, tt c cc c u b tc ng.
8.7.2.4. Nhm lnh quay dch
Tt c cc lnh trong nhm ny u c th s dng cho d liu 8, 16 hoc 32 bit. Qu trnh
quay v dch d liu c th thc hin theo hai hng. Ch c cc thanh ghi a ch hoc ton hng
b nh s dng c. Khi quay dch mt thanh ghi d liu, cn ch th s bit s quay dch trong
lnh. Khi ton hng l mt nh th ch c 1 bit c dch, d liu ch gii hn trong mt t.
S bit dch trong lnh c th ch th bng hai cch, khi dch t 1 ti 8 bit c th s dng ton
hng tc thi v d cc lnh sau thuc dng ny:
ASL.B #4,D2
;dch tri s hc 4 bit.
LSR.W #6,D1
;dch phi logic 6 bit.
ROL.L #3,D5
;quay tri 3 bit
ROXR.B #5,D4 ;quay phi vi c X 5 bit.
Khi cn quay dch s bit ln hn 8, s m ln dch phi nm trong mt thanh ghi d liu. V
220

d ASL.L D2,D3 s dch tri D3 vi D2 bit.
Ton hng l mt nh ch c th dch 1 bit, ROR.W (A0) s quay d liu 1 word trong b
nh c a ch gi trong A0.
C N = 1 nu kt qu c bit cao nht bng 1, nu kt qu bng 0 th ZF=1, c V lun lun
bng 0 tr khi thc hin cc lnh ASL v ASR, lc ny VF=1 nu du thay i trong qu trnh
dch. Hnh 8.10 m t hot ng ca cc lnh quay dch d liu:
ASL-Arithmetic Shift Left: Dch tri s hc
0
LSL-Logic Shift Left: Dch tri logic
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ASR- Arithmetic Shift Right: Dch phis hc
operand
X/C
operand
X/C
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LSR-Logic Shift Right: Dch phi logic
operand
X/C
TI
ROL- Rotate Left: Quay tri
X/C
operand
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X/C
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ROR- Rotate Right: Quay phi
operand
X/C
ROXL- Rotate with extend Left: Quay tri vi c X

C
operand
ROXR- Rotate with extend Right: Quay phi vi c X

X
operand
Hnh 8.10: Hot ng ca cc lnh quay dch d liu.
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8.7.2.5. Nhm lnh x l bit

Lnh kim tra mt bit v thay i gi tr BCHG (test a bit and change): Mt bit trong
ton hng ch s c kim tra v hiu chnh c Z, nu bit bng 0 th ZF=1 v ngc li. Nh
vy Z chnh l b ca bit c kim tra. Sau khi kim tra bit s c thay th bng b 1 ca n.
Lnh ny ch s dng cc ton hng byte v long word, khi bit kim tra nm trong byte thp,
bit cn kim tra c th ch th bng mt s t 0 ti 7 trong lnh. V d BCHG #3,D1 s kim tra
bit 3 ca D1. Khi bit cn kim tra t 8 31 th v tr ca n cn ch th bng mt thanh ghi d liu.
V d D5=2C3459A7H sau lnh BCHG #6,D5 do D5 c bit 6 l 0 nn ZF=1 v bit 6 ca D5
s c ly b v D5=2C3459E7.
Lnh kim tra v xo bit BCLR (test a bit and clear): Lnh ny tng t lnh BCHG,
nhng sau khi kim tra bit test s c xo v 0. Ch c c Z b nh hng ging nh lnh
BCHG.
Lnh kim tra v lp bit BSET (test a bit and set): Lnh ny tng t hai lnh trn nhng
sau khi kim tra bit s c lp ln 1.
Lnh kim tra bit BTST (test a bit): Trong lnh ny bit kim tra vn gi nguyn gi tr.
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8.7.2.6. Nhm lnh vi cc s BCD

Lnh cng thp phn vi du m rng ABCD (add decimal with extend): Lnh ny s
dng cng hai s BCD vi nhau. S dng c X thc hin cc php cng vi chnh xc
cao hn. Lnh ny ch thc hin vi cc ton hng byte v ch c hai ch a ch l trc tip
thanh ghi (s dng thanh ghi a ch) v gin tip thanh ghi gim trc. Tt c cc m iu kin
u b nh hng.
V d D0=00000034H v D1=00000068H sau lnh ABCD D0,D1 s c D1=00000002H do
34+68=102 nhng D1 khng cha ht c kt qu trong byte thp ca n. ZF=0 v X=C=1.
Lnh ly m ca mt s c m rng NBCD (negative decimal with extend): Vi s nh
phn mun c s m c th ly b 2 ca s . Trong s BCD mun c s m s ly b 10 ca s
, hay ly 0 tr thp phn i s . V X c trong php tr nn s ly c b 10 nu X=0 v b
9 nu X=1. Lnh ny ch thc hin vi ton hng byte, tt c cc m iu kin s b nh hng.
V d D3=00000034H nu c X=0 th sau lnh NBCD D3 s c D3=00000066H. Cn nu
trc lnh X=1 th s c D5=00000065H.
Lnh tr thp phn c du m rng SBCD (subtract decimal with extend): Ging nh
ABCD ch c hai ch a ch thanh ghi d liu v gin tip thanh ghi gim trc c s dng.
Ton hng ch s tr i ton hng ngun v c X, tt c cc c u b tc ng.
8.7.2.7. Nhm lnh iu khin chng trnh

C 16 m iu kin thc hin trong cc lnh bao gm:
CC: Carry Clear C C xo.
LS: Low or the same Nh hn hoc bng
CS: Carry Set - C C lp
LT: Less than Nh hn
EQ: Equal Bng
MI: Minus m
F: Never true (faul) Sai
NE: Not equal khng bng
GE: Greater than or Equal-ln hn hoc bng.
PL: Plus dng
GT: Greater than Ln hn
T: always true ng
HI: high Cao
VC: overflow clear VF =0
LE: Less or equal nh hn hoc bng
VS: overfloaw set VF=1
Nhng lnh s dng cc m iu kin ny c gi l lnh iu kin, v n c th thc hin
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hoc khng thc hin tu thuc vo trng thi ca m iu kin.

Lnh r nhnh theo iu kin Bcc (branch condition): BCC l lnh r nhnh nu c C=1.
tt c cc m iu kin u c th s dng trong lnh ny ngoi tr T v F. Lnh ny thc hin
vic chuyn iu khin ti mt v tr mi trong chng trnh khi iu kin ng. Nu iu kin sai
lnh k tip s c thc hin. Lnh ny c th thc hin vi s di 8 bit hoc 16 bit c du.
Cc m iu kin s khng b thay i sau lnh.
V d c on chng trnh: AGAIN
MULU
D2,D3
SUBQ
#1,D2
BNE
AGAIN
Lnh BNE chuyn iu khin v nhn AGAIN khi Z=0 v nh vu kt thc vng lp D3 s
bng giai tha s trong D2. Tc l nu D2=5 th D3=5*4*3*2*1=5!.
Lnh kim tra iu kin, gim v r nhnh DBcc (test condition, decrement, and
branch): Lnh ny thc hin chc nng lp v kt thc theo 2 cch: theo iu kin v theo s
m. Khng c m iu kin no b tc ng sau lnh.
V d lnh DBCS D5,NEXT s khng chuyn iu khin ti nhn NEXT nu CF=1, nu
CF=0 n s gim D5, nu D5=-1 th lnh cng khng chuyn iu khin.
Lnh lp theo iu kin Scc (set according to condition): Lnh ny trc ht kim tra iu
kin, nu iu kin ng byte ton hng ch s c lp ln 1, iu kin sai ton hng ch s
c xo v 0. Khng c c no thay i sau lnh.
V d nu Z=1 th lnh SEQ D3 s lm byte thp ca D3=1111 1111B.
Lnh r nhnh BRA (branch always): Lnh ny chuyn iu khin ti nhn ch th trong
lnh m khng xt iu kin no. y l mt lnh s dng ch a ch tng i, khong cc
chuyn iu khin t -128 ti 127 byte nu s di 8 bit v t -32768 ti 32767 byte nu s
di 16 bit.
Lnh r nhnh ti chng trnh con BSR (branch to subroutine): Lnh ny tng t nh
BRA nhng a ch sau lnh s c ct vo nh ngn xp lm a ch quay v t chng trnh
con.
Lnh nhy JMP (jump): Lnh ny chuyn iu khin khng iu kin ti bt c v tr no
trong b nh. Ch c cc ch a ch: gin tip thanh ghi, gin tip thanh ghi c di, tuyt i,
ch s, tng i PC l c s dng trong lnh. Khng c c no b tc ng sau lnh.
V d nu A5=0001F400H th lnh JMP (A5) s chuyn iu khin ti 01F400H.
Lnh nhy ti chng trnh con JSR (jump to subroutine): Lnh ny ging lnh JMP
nhng a ch quay v t chng trnh con (a ch ca lnh k tip JSR) s c ct vo nh
ngn xp. Khng c c no b tc ng sau lnh.
Lnh quay v v phc hi cc m iu kin RTR (return and restore condition codes):
Lnh ny s phc hi thanh ghi m iu kin v thanh ghi PC t nh ngn xp.
Lnh quay v t chng trnh con RTS (return from subroutine): Lnh ny ch np thanh
ghi PC gi tr ca nh ngn xp, khng c m iu kin no b nh hng.
V d cc nh t 7F80H ti 7F83H cha cc gi tr 00, 04, 3E, 2C. Con tr ngn xp cha
gi tr 7F80H, sau lnh RTS gi tr 043E2C s np cho PC lm iu khin chng trnh chuyn v
a ch ny. Con tr ngn xp s c gim i 4.
8.7.2.8. Nhm lnh iu khin h thng
Cc lnh iu khin h thng thc hin cc cng vic nh: thit lp mc c quyn, reset hoc
dng CPU, thc hin x l mt s ngoi l v thay i cc m iu kin.
Lnh AND s tc thi vi thanh ghi trng thi ANDI SR (and immediate to status
223
PE
.P
TI
T.
ED
U
.V
register): Lnh ny cng ging nh cc lnh c quyn khc cn thc hin trong trng thi gim
st (supervisor) trnh xy ra ngoi l vi phm mc c quyn. Lnh ny s dng thay i
gi tr trong thanh ghi trng thi, khi AND vi cc bit 0 ca ton hng tc thi, cc bit ca thanh
ghi trng thi s b xo, AND vi cc bit 1 s khng thay i. Cc m iu kin tc ng c lp
vi ton hng tc thi s dng.
V d ANDI #0FFFBH,SR ton hng tc thi ch c bit 0 tng ng vi c Z nn c Z s b
xo.
Lnh EORI SR: Lnh ny cng tc ng ti thanh ghi trng thi ging lnh ANDI SR,
nhng s thc hin logic XOR
V d lnh EORI #10H,SR s ly b bit X (nm v tr 4 ca thanh ghi trng thi) v khng
nh hng ti cc bit khc.
Lnh ORI SR: Lnh ny cng tc ng ti thanh ghi trng thi ging lnh ANDI SR, nhng
s thc hin logic OR
V d thit lp ngt u tin mc 6 c th thc hin lnh ORI #600H,SR cc bit 8, 9 v
10 ca SR l 110.
Lnh chuyn d liu vo thanh ghi trng thi: MOVE to SR:Lnh ny chuyn mt gi tr
16 bit vo thanh ghi trng thi.
Gi s trong mt chng trnh con, cc m iu kin c cha trong b nh ti a ch
STWORD lnh MOVE STWORD,SR s np li cc m iu kin ca chng trnh con s
dng tip.
Lnh chp ni dng SR vo b nh: MOV SR,-(A2) s gim A2 i 2 v sau np SR vo
cc nh 0C9006H v 0C9007H nu trc A2=0C9008H.
Lnh chp d liu vo con tr ngn xp ngi s dng: MOVE A3,USP s chp gi tr A3
vo USP v lnh MOVE USP,A3 s chp ni dung USP vo A3. Cc lnh ny c s dng
khi ng v lu tr con tr ngn xp ngi s dng. Tt c cc ch a ch u c th s dng
v khng c c no b tc ng.
Lnh RESET thit bit bn ngoi RESET (reset external devices): Lnh ny lm cho
ng RESET ca MCU tc ng tch cc. Khi RESET c ni ti ng vo RESET ca cc
thit b ngoi lnh ny s cung cp tn hiu RESET thit b bng phn mm.
Lnh quay v t ngoi l RTE (return from exception): Lnh ny s dng kt thc
chng trnh x l ngoi l, n phc hi li thanh ghi trng thi v b m chng trnh ging
nh lc ngoi ln xy ra.
Lnh ngng STOP (load status register and stop): Mt d liu tc thi trong lnh c
np vo thanh ghi trng thi v CPU s treo. C 03 cch CPU s x l sau lnh: nu CPU ang
trng thi d tm trc khi STOP thc hin, ngoi l d tm s c khi ng. Khi yu cu mt
tn hiu RESET bn ngoi, CPU bt u x l ngoi l Reset v thot khi trng thi treo. Nu
mt ngt ngoi xy ra khi CPU ang STOP, n s b b qua tr khi mc u tin ca n cao hn
mc u tin hin hnh. Nu ngt c mc u tin cao hn, CPU s thot khi trng thi treo v
khi ng qu trnh x l ngoi l phc v ngt.
Lnh kim tra thanh ghi khng vt qu gii hn CHK (check register against bounds):
Lnh ny s khi ng ngoi l nu thanh ghi cha gi tr nh hn 0 hoc ln hn gii hn trn.
Gii hn trn l mt s b 2, ch c ton hng word c s dng v khng c c no b tc ng.
V d D4=3E552000H, D5=400C15A9H sau lnh CHK D4,D5 s khng c ngoi l no xy
ra v 15A9H nh hn gii hn trn l 2000H v ln hn 0.
Lnh chuyn ti ngoi l TRAP (exception): Lnh ny s khi ng ngoi l c ch nh
(t 0 ti 15). Khi thc hin lnh n s ly a ch chng trnh x l ngoi ln trong bng vecter
224
U
.V
a ch ngoi l nm ti cc a ch t 000000 ti 0003FFH. a ch ca mt trong 16 vecter

TRAP nm cc a ch t 000080H ti 0000BFH. V d lnh TRAP #0 s ly gi tr a ch ti
cc nh 000080H ti 000083H v bt u thc hin chng trnh ti a ch ny.
Lnh TRAPV: l lnh TRAP c iu kin, n s khi ng ngoi l ch khi V=1.
Ba lnh ANDI CCR, ORI CCR v EORI CCR: cc lnh ny ch tc ng ti byte m
iu kin ca thanh ghi trng thi. Cc lnh ny s thay i gi tr ca cc c trng thi tu thuc
vo ton hng tc thi c s dng.
V d: ANDI #0CH,CCR s xo c X, V, C v khng nh hng ti c N v Z
Lnh chuyn d liu vo CCR: lnh ny s dng chuyn mt gi tr tc thi vo thanh
ghi m iu kin CCR.
V d MOVE (A2),CCR s chuyn byte d liu trong nh m A2 gi a ch vo thanh ghi
CCR.
Lnh lu CCR: lnh ny ct d liu trong thanh ghi CCR, v d MOVE CCR,D2 s ct ni
dung ca CCR vo byte thp ca D2.
Lnh NOP: lnh ny khng thc hin cng vic no, n c tc dng to ra mt thi gian tr.
Khun dng chng trnh ngun

Trong chng trnh ngun trc ht cn khi ng cc tham s cn thit cho b vi x l nh:
np gi tr cho con tr ngn xp, np gi tr cho b m chng trnh chuyn iu khin ti v
tr cha m lnh trong ROM, khi ng gi tr cho cc thanh ghi vector c s, cho bng vector x
l ngoi l v cho thanh ghi trng thi ca CPU.
Khi ng ngoi l.
Mt ngoi l l mt iu kin c bit nh reset, ngt hoc mt li thng c CPU x l
khi xy ra. Khi c mt ngoi l, CPU s chuyn iu khin ti mt a ch c bit v bt u thc
hin chng trnh ti a ch ny cho n khi gp lnh quay v t ngoi l RTE. Sau n s quay
v thc hin tip chng trnh trc . Cc vector trong bng vector ngoi l s dng CPU
xc nh a ch bt u ca mi chng trnh con x l ngoi l. Thanh ghi vector c s (VBR)
s xc nh v tr ca bng vector ngoi l trong b nh.
Thanh ghi VBR sau khi reset c gi tr bng $000000, nhng sau nu np gi tr khc cho
VBR s chuyn v tr bng vector i ch khc, tuy nhin s khng lm thay i cc gi tr cha
trong bng vector ny.
Bng vector ngoi l ca MC68332 c 256 gi tr, mi vector s c 4 byte, v vy bng vector
ngoi l s c dung lng l 1024 byte (hay 1 KB) bt u ti a ch cha trong thanh ghi VBR,
4 byte ny chnh l a ch ca chng trnh x l ngoi l tng ng.
Bn byte u tin trong bng vector ngoi l l cc gi tr khi ng cho thanh ghi con tr
ngn xp, v thanh ghi b m chng trnh. Chng cn c gi l vector reset v CPU s np
cc gi tr ny cho SP v PC ngay sau khi Reset. Khng ging nh cc vector khc, vector reset
lun nm trong vng nh chng trnh gim st. Do VBR = $000000 sau khi reset nn vector
reset lun nm ti a ch $000000.
Bng vector ngoi l lun nm trong vng nh d liu gim st, tt c cc vector trong bng
cn c khi ng gi tr. Do vector reset lun c ly t ROM ngoi, nn cc gi tr khi
ng cho SP v PC cn ghi vo cc a ch t $000000 ti $000006 h thng bt u thc hin
chng trnh ti ni mong mun.
Khi xy ra mt ngt, thit b yu cu ngt cn cung cp s hiu ngt cho CPU vo bus d liu,
CPU s ly s hiu ngt ny nhn vi 4 v cng vi gi tr trong VBR xc nh ti v tr cha
vector ngt trong bng vector ngoi l.
PE
.P
TI
T.
ED
8.7.3.
225
S hiu (Decimal)
ED
U
.V
0
1
2 - 15
16 - 23
24
25
26
27
28
29
30
31
32 - 47
48 - 63
64 - 255
Bng vector ngoi l

a ch ca vector
Tn vector
(Hexadecimal)
0
Reset: khi ng SP
4
Reset: khi ng PC
8 - 3C
Cc li v ngoi l khc
40 - 5C
D phng
60
Ngt gi
64
Vector ngt t ng mc 1
68
6C
70
74
78
7C
80 - BC
By lnh
C0 - FC
D phng
100 - 3FC
Ngi s dng nh ngha
Vector for Reset

Reset Vector
Byte cao ca SP
Byte thp ca SP
Byte cao ca PC
Byte thp ca PC
.P
TI
a ch
$0000
$0002
$0004
$0006
T.
Ngay sau khi reset CPU ly cc gi tr ti cc a ch t 0 ti 6 np cho SP v PC nh sau:
PE
on chng trnh sau s dng khi ng vector reset, cn ch khng ngn xp nm

trong vng nh chng trnh v SP s gim khi np d liu vo ngn xp.
org
DW
DW
DW
DW
$0000 ;bt u ti a ch $000000 trong b nh

$0000 ;Khi ng SP = $4000
$4000
$0000 ;khi ng PC = $400
$0400
on chng trnh sau c th s dng khi ng gi tr cho cc vector ngt khc. Trong
mt chng trnh thc t mi vector ngt c th tr ti mt nhn khc nhau, nhng trong v d tt
c cc vector ngt u tr ti mt nhn INT. Ti nhn INT trong chng trnh cn phi vit cc
lnh tng ng x l ngt khi n xy ra. Trong v d gi s a ch ca nhn INT nm trong
vng nh t 0 ti $10000, hay n cch khc n c t cao ca a ch l $0000.
226

;t on lnh sau nm sau vector reset
;a ch ca nhn INT nm ti a ch $0008,
;l vector bo li bus
;a ch li nm ti $000C
;lnh khng cho php nm ti $0010
;chia cho 0 nm ti $0014
;Lnh CHK, CHK2 ti $0018
$0008
$0000
INT
$0000
INT
$0000
INT
$0000
INT
$0000
INT
$0000
INT
;Ngt ngi s dng nh ngha nm ti $03FC
ED
Chng trnh x l ngt c khun dng nh sau:

INT
U
.V
org
DW
DW
DW
DW
DW
DW
DW
DW
DW
DW
DW
DW
{Cc lnh x l ngt}
PE
.P
TI
T.
RTE ;quay v t chng trnh ngt.

Khi ng thanh ghi trng thi
Thanh ghi trng thi ca CPU cha mt s thng tin quan trng nh:
Cho php theo vt - Trace Enable [15:14] Nu c cho php CPU s to ra ngoi l trace
sau khi thc hin xong mi lnh, cho php mt chng trnh gim st chy th mt chng trnh.
Sau khi reset qu trnh trace b cm.
Trng thi gim st/s dng - Supervisor/User State [13] MCU c hai mc c quyn:
supervisor v user. Hu ht cc chng trnh ng dng u hot ng mc user v sau
chuyn qua mc supervisor khi xy ra ngoi l. Sau khi reset bit ny c lp, MCU hot ng
ch supervisor.
Mc u tin ngt - Interrupt Priority Level[10:8] Mc u tin ngt xc nh cc ngt c
c thc hin hoc b che. Ngt mc 7 lun c cho php, cho php cc ngt khc cn phi
np gi tr nh hn mc u tin tng ng. V d mun ngt mc 6 c cho php cn phi np
gi tr nh hn hoc bng %101. Sau khi khi ng cc bit ny c gi tr l %111, c ngha l ch
c ngt mc 7 c cho php.
Thanh ghi m iu kin - Condition Code Register [4:0] y l cc c trng thi (cc m
iu kin) E (extend), N (negative), Z (zero), O (overflow) v C (carry), chng c tc ng theo
kt qu ca cc lnh va thc hin s dng lm cc iu kin r nhnh chng trnh. Cc bit
ny c th khng cn khi ng.
8.7.4.
Lp trnh khi ng SIM

Do SIM xc nh cc c tnh hot ng quan trng ca MCU nn n cn c lp trnh khi
ng ngay sau khi khi ng CPU. Sau y l mt s thanh ghi cn phi c khi ng trong
SIM: Thanh ghi cu hnh SIM - System Integration Module Configuration Register (SIMCR).
Thanh ghi iu khin to clock - Clock Synthesizer Control Register (SYNCR). Thanh ghi iu
khin bo v h thng - System Protection Control Register (SYPCR). Thanh ghi nh thi ngt
227
;gm reset vector

;bao gm khi ng cc vector ngoi l khc
;bt u chng trnh ti $400, ngay sau bng
ngoi l
.P
* INCLUDE 'org00000.asm
* INCLUDE 'org00008.asm'
ORG $400
$FFFA48
$FFFA4C
$FFFA50
$FFFA54
$FFFA4A
$FFFA4E
$FFFA52
$FFFA56
$FFFA44
$FFFA22
$FFFA24
$FFFA04
$FFFA21
$FFFA00
U
.V
T.
ED
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
TI
CSBARBT
CSBAR0
CSBAR1
CSBAR2
CSORBT
CSOR0
CSOR1
CSOR2
CSPAR0
PICR
PITR
SYNCR
SYPCR
SIMCR
theo chu k - Periodic Interrupt Timer Register (PITR). Thanh ghi iu khin ngt theo chu k Periodic Interrupt Control Register (PICR). Cc thanh ghi chn chn mch - Chip-Select Pin
Assignment Registers (CSPAR0 and CSPAR1). Cc thanh ghi a ch c s chn mch - ChipSelect Base Address Registers (CSBARBT, CSBAR[0:10]). Cc thanh ghi tu chn chn CS Chip-Select Option Registers (CSORBT and CSOR[0:10]). Cc cng vo ra a dng - GeneralPurpose I/O Ports.
Sau y l on chng trnh v d v khi ng SIM: Trong v d ny gi s c hai tp tin
org00000.asm v org00008.asm. Tp tin org000000.asm khi ng con tr ngn xp v b m
chng trnh, v tp tin org00008.asm khi ng cc vector ngt nh trnh by trong phn trn.
on chng trnh sau s dng cho trnh bin dch IASM32.
PE
INITSYS:
CLR.L D0
MOVEC D0,VBR
; m bo cho VBR=0, n bng 0 sau khi reset.
; chn clock h thng l 16.78 MHz
MOVE.B #$7F,(SYNCR).L
; khng cho php watchdog bng phn mm
CLR.B (SYPCR).L
;Phn ny khi 3 ng s dng hai vi mch RAM 32Kx8 bng tn hiu Chip select.
;b nh bt u ti a ch $30000 v c th c ghi theo byte hoc theo t, trong
chng trnh ny gi s RAM c thi gian truy cp l 85ns v khng yu cu trng
thi ch. Cc bit DSACK c thanh ghi CSOR c th s dng iu chnh cho cc
b nh c tc truy cp nhanh hn hoc chm hn.
MOVE.W #$0003,(CSBARBT).L ;a ch c s l $00000 kch thc khi l
64K
MOVE.W #$7870,(CSORBT).L
;c th c ghi, c mt trng thi ch, nu on
m ny np vo ROM th gi tr khi ng l
$6B30.
; Khi ng chip select vi a ch c s l $30000 mi khi 64K
INITCS:
228
T.
ITSELF
CLKINT
ED
U
.V
INITPIT:
MOVE.W #$0303,(CSBAR0).L
;CS0 cho a ch $30000, 64K
;CS1 cho a ch $30000, 64K
;CS2 cho a ch $30000
MOVE.W #$5030,(CSOR0).L
;CS0 c byte cao ch ghi
;CS1 c byte thp ch ghi
;CS2 c c hai byte cao ch c
MOVE.W #$3FFF,(CSPAR0).L
;CS 0, 1, 2 ti cc cng 16 bit
; Phn chng trnh ny khi ng nh thi ngt theo chu k sau mi thi gian 1
giy.
MOVE.L #CLKINT,($0100).l
;a ch bt u cha chng trnh ngt l $100
($40x4). Gi s rng VBR = 0.
MOVE.W #$0640,(PICR).l
;Ngt mc 6 c vector l $40
MOVE.W #$0110,(PITR).l
;Chu k time out l 1 giy
ANDI.W #$F0FF,SR
;che tt c cc ngt di mc 6
ORI.W #$0500,SR
ANDI.W #$FFF0,(SIMCR).l
;thit lp cc bit phn x ngt c mt gi tr
ORI.W #$0005,(SIMCR).l
; duy nht
BRA ITSELF
; chng trnh thc hin y ch ngt.
; chng trnh ngt cho PIT
ADDI.L #$01,D0
;lnh cho chng trnh ngt ti y
RTE
Lp trnh nh cu hnh RAM ni

RAM ni c th bn ho ti v t bt k trong bn b nh, nhng n khng c trng
vi cc thanh ghi iu khin. Sau khi reset mc nh RAM khng c cho php, khi ng
RAM cn ghi a ch c s thch hp vo thanh ghi a ch c s v trng thi RAM (y l mt
thanh ghi ch ghi) v xo bit RAMDS cho php RAM hot ng. Np gi tr cho cc bit RASP
[1:0] trong thanh ghi nh cu hnh RAM chn mc c quyn truy cp.
Nu khng s dng ngun backup cho RAM, ni chn VSTBY xung GND. Nu s dng
ngun backup cn xc nh gi tr t ni gia chn VSTBY v GND.
Lp trnh cho QSM

QSM c hai khi nh SCI v QSPI, khi s dng khi no cn lp trnh khi ng cho khi .
PE
8.7.6.
.P
TI
8.7.5.
8.7.5.1 Lp trnh cho khi SCI.

Chng trnh khi ng SCI c th thc hin nh sau:
SCI INITIALIZATION:
Hai lnh di np a ch tc ng ca k t cui cng ca on d liu truyn vo thanh ghi
a ch A1.
MOVE.L A0,A1
ADDA.L #$5,A1
Ba lnh tip theo kim tra thanh ghi d liu truyn c trng hay khng bng cch xt bit
TDRE trong thanh ghi trng thi SCI (SCSR). Nu TDRE=0 th TDR hin khng khng gi d
liu ti b dch truyn. Nu TDRE=1 th vic truyn d liu ang thc hin, c th ghi mt gi tr
229

mi ti TDR, v vy on chng trnh kim tra s c lp li cho n khi TDRE=1.
EQU
EQU
EQU
EQU
EQU
EQU
ORG
$FFFC08
$FFFC0A
$FFFC0C
$FFFC0E
$FFFA04
$FFFA21
$400
;bt u chng trnh ti $400 ngay sau bng

; vector ngoi l.
SCCR0
SCCR1
SCSR
SCDR
SYNCR
SYPCR
INIT_SIM
;tng tc clock
;khng cho php watchdog phn mm
MOVE.W #$0037,(SCCR0).L
MOVE.W #$000C,(SCCR1).L
;tc truyn ca SCI l 9600

;cho php b truyn v b nhn
U
.V
CLR.B (SYPCR).L
PRINT
;np a ch tc ng ca (message) vo A0
;chuyn k t hin hnh ca message vo D0

;sau tng A0 tr ti k t k tip
;chuyn gi tr hin hnh ti SCDR
;kim tra kt thc message cha
;nu khng th in k t tip theo
;ch ti y
;in ra cc k t 12345
T.
LEA (MESSAGE).L,A0
LOOP MOVE.W (SCSR).L,D0
ANDI.W #$0100,D0
BEQ LOOP
MOVE.B (A0)+,D0
ED
INIT_SCI
TI
.P
FINISH
MESSAGE
MOVE.W D0,(SCDR).L
CMPA.L A1,A0
BNE LOOP
BRA FINISH
FCB 12345
PE
8.7.5.2 Lp trnh khi ng QSPI

QSPI ca QSM l bus truyn ni tip ng b vi cc thit b ngoi vi bn ngoi v cc MCU
khc. Module ny c mt hng i, con tr hng i c th lp trnh c cho php truyn 16 k
t d liu mt cch t ng, v trong ch wap-around s cho php truyn lin tc ti hoc t
hng i m khng cn s iu khin ca CPU. Hng i rt hu dng trong nhiu ng dng nh
bin i AD. Mt s im sau cn ch khi s dng QSPI:
- Lp bit SPE cho php QSPI cn thc hin cui cng ca qu trnh khi ng.
- Cn khi ng cc thanh ghi nh hng truyn d liu DDRQS v thanh ghi d liu ca
cng PORTQS, ngay c khi chn tn hiu c gn cho chc nng QSPI bng thanh
ghi gn chn tn hiu PQSPAR.
- Tn hiu chn ngoi vi s tc ng khi thc hin mt lnh trong RAM lnh, tu nhin tc
ng mc cao hay mc thp cn tu thuc vo bit tng ng trong PORTQS.
on chng trnh sau khi ng cng QSPI trong ch wrap-around, truyn 8 bit v chn
chn ngoi vi tc ng mc thp. Vic hiu chnh cm ch wrap-around thc hin kh n
gin c gii thch trong phn ch gii lnh. Lnh k tip c v xo cc c trong SPSR, cc c
ny l c kt thc QSPI (SPIF), c bo li ch (MODF) v c chp nhn n (HALTA). Bit
230
ORG $400
U
.V
TI
INIT_SIM
ED
EQU $FFFC1A
EQU $FFFC15
EQU $FFFC16
EQU $FFFC17
EQU $FFFC1F
EQU $FFFC18
EQU $FFFC1C
EQU $FFFC1E
EQU $FFFA04
EQU $FFFA21
EQU $FFFD20
EQU $FFFD40
T.
SPCR1
PORTQS
PQSPAR
DDRQS
SPSR
SPCR0
SPCR2
SPCR3
SYNCR
SYPCR
TXDRAM
CMDRAM
SPIF l bit c s dng nhiu nht, n c lp khi QSPI hon tt mt chu k truyn khi a ch
tr ti cui hng i ENDQP. Nu cho php ch wrap-around bit ny s c lp khi truyn
xong mt vng hng i. Khi cho php ngt, bit SPIF tc ng s to ra yu cu ngt.
ANDI.B#$00,(SPSR).L
Lnh tip theo khi ng cho tn hiu chn mch trong PORTQS (thng gi l QPDR). Tn hiu
chn mch c th tc ng mc cao hoc mc thp. Trng thi khi ng sau khi reset trong
PORTQS l trng thi khng tch cc. Trng thi tch cc l chn trong RAM lnh. Trong v d
ny khi ng trng thi ca tn hiu chn l mc coa v SCK l mc thp. Tc l tn hiu chn
mch tc ng mc thp v SCK tc ng mc cao. Tn hiu TxD khng b tc ng.
INIT_QSPI
.P
CLR.B (SYPCR).L
ANDI.W #$7F,(SPCR1).L
MOVE.B #$7B,(PORTQS).L
MOVE.B #$7B,(PQSPAR).L
PE
MOVE.B #$7E,(DDRQS).L
MOVE.W #$8002,(SPCR0).L
;chng trnh bt u ti $400, ngay sau bng

ngoi l
;tng tc clock
;cm software watchdog
;xo bit SPE bit trong SPCR1 cm QSPI
;Gn tt c cc chn QSPI, cc chn c th gn
; lm chn vo ra a dng hoc cho QSPI.
;Chn hng truyn l ng ra tr MISO
;Cu hnh cho QSPI l master khng tch cc,
trng thi SCK l thp, ly d liu ti ccnh
ln ca SCK, tc l 4.129MHz, trng
BITS khng cn quan tm v chng c xo
v cho php truyn 8 bit d liu.
Lnh k tip thit lp cc tham s iu khin, khng cho php cc ngt, cho php ngt khi bit
SPIF tc ng, lp SPCR2 [15]. xo mt ngt, c v sau xo bit SPIF. Cho php ch
wrap-around. Xo NEWQP v ENDQP=$F QSPI truyn d liu lin tc t a ch $0 ti i
ch $F ca hng i. Cm ch wrap-around, v th QSPI truyn mt ln hng i xo bit
WREN v 0.
MOVE.W $4F00,(SPCR2).L
231

Lnh k tip lp y RAM lnh c mt byte thng tin iu khin cho mi lnh QSPI thc hin
trong hng i. y d liu c truyn 8 bit v bn tn hiu chn mch tc ng mc thp.
T.
ED
U
.V
MOVE.B #$00,(SPCR3).L ;cm ch lp, cc ngt HALTA v MODF v

HALT
MOVEA.L #DATA,A0 ;con tr A0 lm a ch d liu truyn
MOVEA.L #TXDRAM,A1 ;Con tr A1 ch RAM d liu truyn
MOVEA.L #CMDRAM,A2 ;Con tr A2 ch RAM lnh
MOVE.W #$10,D0 ;Khi ng b m bng 16 ($10), v hng i 16 v
tr
CLR.L D1 ;Xo D1 n s c s dng lp y RAM truyn
LOOP MOVE.B (A0)+,D1
;Bt u vng lp lp y RAM truyn
MOVE.W D1,(A1)+
;Lu d liu v chnh phi
MOVE.B #$00,(A2)+
SUBI.W #$01,D0
;Tr b m i 1
BNE LOOP
;Np v tr k tip cho hng i
MOVE.W #$8000,(SPCR1).L
;Lp bit SPE bt u truyn d liu
FINISH BRA FINISH
;C th bt u mt nhim v khc
DATA DB 16
PE
.P
TI
8.7.5.3 Khi ng ngt QSM

cho php ngt ca QSM cn no gi tr cho 5 trng sau:
- ILQSPI v ILSCI trong thanh ghi QILR xc nh mc u tin ca ngt QSPI v SCI. Nu
trng ny c lp gi tr ging nhau th ngt QSPI c u tin cao hn.
- INTV[7:0] trong thanh ghi QIVR xc nh s vector ngt. Vi QSPI bit thp nht s ch
c bng 1, vi SCI bit thp nht ch c bng 0.
- IARB trong thanh ghi QSMCR xc nh ngt no s lp tc c thc hin khi QSM v
mt module khc c cng mc u tin cng yu cu ngt. Gi tr ny phi khc khng v duy nht
khi ngt c cho php.
- IPL trong thanh ghi trng thi ca CPU xc nh mc u tin trong cc ngt ng k.
ng k cc ngt QSM, trng ny cn np gi tr thp hn mc u tin ngt ch th trong QILR.
- Vector ngt cn c np gi tr tr ti v tr t chng trnh ngt.
8.7.7. Lp trnh cho TPU

lp trnh cho TPU chng ta cn lp trnh cc gi tr cho cc thanh ghi iu khin ca TPU
nh: thanh ghi nh cu hnh TPU (TPUMCR), cc thanh ghi chn chc nng knh CFSR[1:3],
cc thanh ghi th t host HSRR0 v HSRR1, cc thanh ghi yu cu phc v host, cc thanh ghi
u tin knh, cc thanh ghi tham s RAM, cc thanh ghi iu khin knh CCR, v nu s dng
ngt TPU cn khi ng cc thanh ghi ngt v cc vector ngt.
SYNCR
SYPCR
CFSR3
EQU
EQU
EQU
$FFFA04
$FFFA21
$FFFE12
232

TPUMCR
HSQR1
HSSR1
CPR1
EQU
EQU
EQU
EQU
ORG
$FFFE00
$FFFE16
$FFFE1A
$FFFE1E
$400
;bt u chng trnh ti $400
MOVE.B
CLR.B
#$7F,(SYNCR).L
(SYPCR).L
;lp clock h thng bng 16.78 MHz

;cm software watchdog
INITSYS:
#$0009,(CFSR3).L
MOVE.W
#$00C0,(TPUMCR).L
MOVE.W
#$0000,(HSQR1).L
#$0092,($FFFF00).L
MOVE.W
MOVE.W
#$2000,($FFFF04).L
#$4000,($FFFF06).L
#$0002,(HSSR1).L
#$0003,(CPR1).L
DONE
;khi ng yu cu phc v host

;Cho knh c mc u tin cao
TI
MOVE.W
MOVE.W
DONE BRA
T.
MOVE.W
START:
;Thanh ghi iu khin knh: sau khi

khi ng chn tn hiu mc thp s
dng cho TCR1.
;B m cao TCR1 = $2000 TCR1
;B m chu k TCR1 = $4000
ED
PRAM:
;chn chc nng knh. Ch s chc

nng ny tu theo ng dng c th
;lp TCR1 ti SYSCLK/4. ti 16.778
MHz, c ngha l TCR1 count=238ns
;cc bit HSQ = 0 cho chc nng
PWM
U
.V
MOVE.W
CNTLREG:
.P
V d sau khi ng s dng ngt trn knh 4:
MOVE.W #$0680,(TICR).l
MOVE.L #INT,($0210).l
;khi ng VBR =0
;cho IARB = $5
;Cho php ngt knh 4
PE
NDI.W #$F5FF,SR
CLR.L D0
MOVEC D0,VBR
ORI.W #$0005,(TMCR).l
ORI.W #$0010,(CIER).l
;mc ngt = 6, vector c s = $80

;bt u chng trnh ngt ti nhn INT
;gi s VBR =0
;cho php cc ngt t mc 6 tr ln
*** chng trnh con phc v ngt ***

INT
ANDI.W #$FFEF,(CISR).l
;c v xo cho php ngt
**** cc lnh chng trnh con phc v ngt ****

RTE
;quay v t ngt
233
PE
Khi ng CPU bao gm vic khi ng ngoi l reset thit lp cc gi tr ban u cho
SP v PC. Khi ng v tr t bng vector ngoi l, v gi tr cho cc vector ngoi l
trong bng. Cui cng cn khi ng cc bit mc c quyn, cc bit u tin ngt v cc
bit cho php ch tm kim g ri chng trnh.
Khi ng SIM cn khi ng gi tr cho cc thanh ghi ca n nh: SIMCR, SYNCR,
SYPCR, PITR, PICR, CSPAR0, CSPAR1, CSBARBT, CSBAR[0:10], CSORBT,
CSOR[0:10] v cc cng a dng.
khi ng RAM ni trc ht phi np gi tr a ch c s vo thanh ghi a ch c s
RAM v thanh ghi trng thi RAM. Sau xo bit RAMDS cho php RAM hot ng.
Ch khng nh cu hnh RAM trng vo a ch ca cc thanh ghi.
Lp trnh khi ng cng ni tip bao gm vic khi ng cho hai module SCI v QSPI.
.P
TI
T.
ED
U
.V
Tm tt ni dung chng:
Cc khi chc nng ca MCU 68332 bao gm: module tch hp h thng SIM cung cp
cc tnh nng giao tip vi bn ngoi v cc tnh nng h tr h thng khc nh: nh thi
bt vi iu khin (watchdog timer), cp xung nhp cho h thng. CPU 32 bit thc hin cc
lnh ca cc chng trnh yu cu. Khi x l thi gian (TPU) vi rt nhiu tnh nng h
tr iu khin nh: cc chc nng vo ra nh thi so snh, cc chc nng iu rng xung,
cc chc nng o tn s, chu k xung, cc chc nng pht xung, cc chc nng iu khin
ng c bc, ng c AC, cc chc nng o tc , xc nh v tr. Khi giao tip ni
tip hng i h tr hai chun giao tip SPI v UART. Khi b nh RAM ni bao gm
cc nh a dng, cc thanh ghi v cc vng nh c th s dng cho vic thc hin cc vi
lnh. Cc khi chc nng uc kt ni vi nhau bng h thng BUS gi l IMB.
Tp lnh ca MC68332 bao gm cc nhm lnh sau:
o Nhm di chuyn d liu: EXG, LEA, LINK, MOVE, MOVEA, MOVEM,
MOVEP, MOVEQ, PEA, SWAP, UNLK.
o Nhm lnh s hc: ADD, ADDA, ADDI, ADDQ, ADDX, CLR, CMP, CMPA,
CMPI, CMPM, DIVS, DIVU, MULS, MULU, NEG, NEGX, SUB, SUBA, SUBI,
SUBQ, SUBX, TAS, TST.
o Nhm lnh logic: AND, ANDI, OR, ORI, EOR, EORI, NOT.
o Nhm lnh quay dch: ASL, ASR, LSL, LSR, ROL, ROR, ROXL, ROXR.
o Nhm lnh x l bit: BCHG, BCLR, BSET, BTST.
o Nhm lnh vi s BCD: ABCD, NBCD, SBCD.
o Nhm lnh iu khin chng trnh: BCC, DBCC, SCC, BRA, JMP, JSR, RTR.
o Nhm iu khin h thng: ANDI SR, EORI SR, RESET, RTE, STOP, CHK,
TRAP, TRAPV, ILLEGAL, ANDI CCR, ORI CCR, EORI CCR, MOVE to CCR,
NOP.
BI TP
Bi 1: Cho bit cc ch a ch s dng trong cc lnh sau:
a)
b)
EXG D0,A2
MOVE.B #5,D1
234

c)
d)
e)
f)
g)
MOVE.W
MOVE.W
MOVE.W
JMP
ADD.L
D6,(A0)
D6,(A0)+
D6,-(A0)
(PC)
A0,10H(A1,D1.W)
Bi 2: Hai lnh sau s thc hin cc cng vic g?
Bi 3: Cho bit lnh sau thc hin cng vic g:

MOVE.B -(A3),(A3)+
U
.V
EXG D0,A0
EXG D0,A1
MOVE.B
MOVE.B
MOVE.W
MOVE.W
MOVE.W
(A0),D2
-(A0),D2
(A0),D2
(A0)+,D2
-(A0),D2
T.
a)
b)
c)
d)
e)
ED
Bi 4: Cc nh c a ch t 000490 ti 000495 ln lt cha cc gi tr: 0A, 9C, B2, 78, 4F v

C3. Thanh ghi D2 s c gi tr bng bao nhiu sau mi lnh sau:
TI
Bit rng trc khi thc hin lnh A0=00000492 v D2=0.
PE
.P
Bi 5: A0 s cha gi tr bng bao nhiu sau mi lnh trong bi 4.

Bi 6: Bit A0=0028C504 cc lnh sau s thc hin cc cng vic g?
a)
b)
c)
d)
MOVE.L
MOVE.L
MOVE.L
MOVE.L
(A0)+,A1
A0,(A0)
(A0),A0
-(A0),A0
Bi 7: Gi s A0=00003800H v D0=00000200H. Cho bit a ch ca ton hng trong mi lnh

sau:
a)
MOVE.B 10H(A0),D2
b)
MOVE.B 1400H(A0),D2
c)
MOVE.B 9F00H(A0),D2
d)
MOVE.B 10H(A0,D0.L),D2
e)
MOVE.B 84H(A0,D0.L),D2
Bi 8: Gi s cc nh c a ch t 004000 ti 004007 cha cc gi tr tng ng l: 11, 22, 33,
44, 99, AA, 55, 66. Cho bit kt qu sau khi thc hin cc lnh:
235

MOVE.W D3-D7,-(A2)
MOVE.W (A0)+,D3-D7
#2CH,D5
#3C45H,D5
#789ABCDEH,D5
D5
U
.V
ANDI.B
ORI.W
EORI.L
NOT.W
Bi 9: Cho bit kt qu ca lnh SWAP D0 vi D0 = 042959FD.

Bi 10: Cho bit s khc nhau sau khi thc hin hai lnh CLR.B D0 v SUB.B D0,D0.
Bi 11: Cho bit D2 = 55555555 cho bit gi tr ca D2 sau khi thc hin lnh NEG.W D2.
Bi 12: Gi s D2 = 3B25AC89 cho bit gi tr ca D2 sau khi thc hin chui lnh sau:
ED
Bi 13: Gi s D4=C9AE23A5 cho bit kt qu cha trong thanh ghi D4 sau khi thc hin xong
hai lnh:
ASR.L #3,D4
ROL.W #5,D4
Bi 14: Cho bit D3=56789ABC v D4=00000013. Xc nh trng thi ca c Z v ni dung ca
thanh ghi D3 sau khi thc hin cc lnh:
#4,D3
D4,D3
#1,D3
D4,D3
TI
T.
BTST
BTST
BSET
BCHG
PE
.P
Bi 15: Vit chng trnh cng mt bng d liu bao gm 128 phn t d liu c di 2 byte,
sau tnh gi tr trung bnh ca n.
Bi 16: Cho mt chui d liu mt byte kt thc bng gi tr FF, vi A6 gi a ch bt u ca
chui trong b nh. Vit on chng trnh xc nh a ch ca s trong chui c gi tr
bng D6.
Bi 17: Vit cc lnh di chuyn 16K word bt u t a ch tr bi thanh ghi A3 ti v tr b nh
c a ch tr bi thanh ghi A4.
Bi 18: Vit on chng trnh khai bo 6 chng trnh con v cc lnh chuyn ti chng trnh
con tng ng vi s cha trong thanh ghi D4.
236
HNG DN V P S BI TP
CHNG 1:
ED
U
.V
Bi 1: A03FFH
Bi 2: Ghp hai b nh 256Kx4bit to thnh mt b nh 256B x 8 bng cch ni chung cc
ng a ch, cc ng iu khin v ring cc ng d liu. Sau ghp cc khi
256K x 8 to thnh b nh 1M x 8.
Bi 3: b) Gii m 2 ra 4 v s dng cng AND hai ng ra Y0 v ca b gii m cho php CS
ca b nh 512KB s 1.
Bi 4: S dng cng ci cc ng vo ni ti data bus ng ra ni ti cc LED, b ci c cho
php bng mt cng NAND vi cc ng vo l cc ng a ch cung cp thng hoc o
cho ng vi a ch F000H.
Bi 5: S dng cng m 1 chiu 8 bit vi ng vo ni ti cc phm nhn, ng ra ni ti data bus
ca h thng. Cng m cho php bng cng NAND vi cc ng vo l cc ng a ch.
Bi 6: C th s dng b gii m 2 4 vi ng vo l A1 v A0 v mi ng ra s cho php mt
cng vo ra.
T.
CHNG 2:
PE
.P
TI
Bi 1: a) Offset = vt l 10h x segment

b) Segment = (Vt l offset)/10H
Bi 2: a) Vt l = segment x 10H + offset
Bi 3: a ch vt l nh ngn xp = SS x 10H + SP.
Bi 4: Nu khong cch gia hai a ch ln hn 64K c th cn phi thay i c CS v IP, nu
khng c th ch cn thay i IP.
Bi 5: Chuyn iu khin chng trnh c th bng lnh hoc bng ngt phn cng. Chuyn iu
khin theo lnh c hai c ch chnh l nhy v gi chng trnh con. Nhy chia thnh hai
loi: nhy c iu kin v khng c iu kin.
Bi 6: S khng phi ch th v tr cha mt ton hng v kt qu cui cng ca cc php tnh m
ALU thc hin.
Bi 7: Khi c b gii m lnh, cc lnh m my ngoi b nh s ch cn c kch thc ngn, b
gii m s gii m chn ra mt trong nhiu hm hoc vng m d liu thc hin lnh.
Bi 8: Ni cha a ch chng trnh phc v trong bng vector ngt s bng s hiu ngt nhn
vi 4.
Bi 9: Khi cng trn khi b nh hoc khi tr s nh cho s ln hn c nh s bng 1.
Bi 10: C ZF bng 1 bt c khi no kt qu trong thanh ghi cha kt qu bng 0.
Bi 11: C chn l bng 1 khi kt qu cc php tnh c s bit 1 l mt s chn.
Bi 12: C ph (AF) bng 1 khi c s trn bit 1 t nibble thp quan nibble cao.
Bi 13: C trn bng 1 khi c s trn bit 1 t bit MSB 1 qua bit MAS.
Bi 14: C du bng 1 khi bit MSM ca kt qu bng 1.
Bi 15: Khi truy cp mt nh nhiu ln s dng cc thanh ghi a ch s c li hn, v di
lnh ngn hn do ch cn ch th thanh ghi gi a ch m khng cn phi ch th bng s
trong m lnh.
237
Bi 16: Khi truy cp mt chui d liu lin tip trong b nh s c li do truy cp ti mt phn t
ca chui ch cn ch th s di trong m lnh.
Bi 17: Quay v t ngt cn phc hi thm gi tr ca cc c trng thi.
Bi 18: Khi nhn 16 bit kt qu c th ln ti 32 bit nh vy AX s gi khng cn thm thanh
ghi DX. Khi thc hin php chia 16 bit, s d c th 16 bit v vy cn thanh ghi DX gi
n.
CHNG 3:
PE
.P
TI
T.
ED
U
.V
Bi 1: trong lnh a ch vt l truy cp s bng DSx10H+3897H

Bi 2: MOV [4B2CH],DL
Bi 3: a) AX l trc tip thanh ghi v [BX] l gin tip thanh ghi.
b) CX trc tip thanh ghi, [1234H] trc tip.
c) trc tip thanh ghi.
d) trc tip thanh ghi.
e), f), g), h) trc tip thanh ghi.
i) trc tip thanh ghi v tc thi.
k) trc tip thanh ghi v tng i c s ch s.
l), m) trc tip thanh ghi.
n) hiu ngm l AL v [BX+AL].
o) trc tip thanh ghi.
p) trc tip thanh ghi v tc thi.
q) r) trc tip thanh ghi v hiu ngm trong lnh.
s) hiu ngm trong lnh.
t), u) tng i.
Bi 4:
a) MOV BP,3654H
b) MOV SP,BP
c) MOV [9876h],AX
d) INC CX
e) ADD DL,07
f) OR AX,1000000000000000B
g) OR AX,0000000000000001B
h) AND CL,0FH
i) MOV AL,8
MUL AH
j) XOR DX,0000 0000 0000 1111B
k) MOV AX,0
SUB AX,BP
Bi 5: Do trnh t PUSH v POP ging nhau nn sau cc lnh POP s c AX = gi tr c ca
DX, BX bng gi tr c ca CX, CX bng gi tr c ca BX v DX bng gi tr c ca AX.
Bi 6: 2650
Bi 7: a) cc c trng thi s khng b nh hng.
b) f): tu theo kt qu php tnh m s c cc c trng thi khc nhau.
Bi 8: Tc thi MOV AH,12H
238
PE
.P
TI
T.
ED
U
.V
Trc tip
ADD AL,[1234H]
Trc tip thanh ghi
SUB AH,BH
Gin tip thanh ghi
AND AL,[BX]
Tng i ch s
XCHG AL,[DI+01]
Tng i c s
CMP BL,[BP+08]
Tng i ch s c s SHL [BX+SI+09]
Bi 9: Ch trc tip, gin tip thanh ghi, tng i ngn -128 n 127, tng i t -216 ti 2161, tuyt i.
Bi 10: Nhp k t dng hm 01 ngt 21H, hin th ln dng tip theo dng hm 02 ngt 21H.
Bi 11: Nhp dng hm 01 ngt 21H, hin th 25 ln theo ct dc cn dng vng lp 25 ln hin
th v xung hng v u hng.
Bi 12: Lp li hm 01 ngt 21H cho n khi gp k t ESC m ASCII bng 27.
Bi 13: Nhp mt chui cn khai bo b m lu tr n. Tip theo x l chui bng cc so
snh hai s k tip nhau nu s no nh hn th i ch n ln pha trc. Lp li cho n
khi khng c s i ch no na th chui c sp xp xong.
Bi 14: i t ch thng thnh ch in hoa c th tr m ASCII ca n i 20H.
Bi 15: Trc ht nhp chui th nht ct vo b m, khi nhp mt k t ca chui th 2 s em
so snh vi ton b chui th nht, nu ging th ct vo b m hin th.
Bi 16: Trc ht nhn chui ct vo b m, sau vi tng k t c m ASCII l xyH cn i
thnh 0xH v 0yH, tip theo xt 0xH v 0yH nu ln hn 9 th cng vi 37H thnh k t
t A ti F, nu khng cng vi 30H thnh cc k t t 0 n 9 c m ASCII l 30H ti
39H.
Bi 17: Khai bo hai bin hng n v v hng chc, lp li vic tng hng n v, nu hng n
v bng 10 th xo n v 0 v tng hng chc, sau hin th hng chc v hng n v, lp
li cho n khi gp s bng 99.
Bi 18: i s HEX ra thp phn c th chia cho 10 ly s d s l hng n v, thng s cn li
tip tc chia cho 10 ly s d l hng chc v tip tc cho hng trm v hng ngn.
Bi 19: Nhp a, b, c sau tnh x = (c-b)/a
Bi 20: Khai bo bng d liu bao gm cc lnh v m lnh tng ng, khi nhp lnh vo s ly
chui k t nhp so snh tun t trong bng d liu c ly m lnh.
Bi 21: Nhp chui k t hin th ln m hnh ch mt khong thi gian mt cm nhn c,
tip theo cn o chui k t nhp, k t sau ln th ch ca k t trc n trong b nh
sau di chuyn con tr v u chui hin th v hin th chui mi.
Bi 22: Lp li php cng mt trm ln, mi ln tng s cng ln 1.
Bi 23: Khai bo bng d liu bao gm cc du * v khong trng sp thnh k t. T k t nhp
t bn phm s tra vo bng d liu khai bo ly cc d liu cn hin th.
Bi 24: Mun tnh USCLN ca hai s c th lp li vic ly s ln tr i s nh sau ly hiu v
s tr so snh tip tc tr tip cho n khi kt qu bng 0 th hai s trc khi tr chnh l
USCLN ca n.
Bi 25: ch ri cn di chuyn con tr ti v tr mi v hin ch trong thi gian ngn.
Bi 26: hin k t theo ng cho c th s dng cch hin th lin tip cc khong trong
dch con tr.
Bi 27: xt mt s c phi l s nguyn t c th ly s tun t chia cho cc s l t 3 ti s
chia 2.
Bi 28: hin th bng cu chng s tun t hin th s b nhn du x s nhn du = v tch ca 2
s di dng thp phn. S nhn tng dn sau tng s b nhn.
239
Bi 29: Nhp t bn phm s nh phn s thu c kt qu l 30H hoc 31H mun c 8 bit cn
xo (khi 30H) v lp (khi 31H) c C v quay tri vo mt thanh ghi no 8 ln. hin
th gi tr HEX c th tch gi tr thu c trong bc trn thnh hai s v i thnh s
HEX tng ng bng cch cng vi 30H nu l s v cng vi 37H nu l ch.
Bi 30: Khai bo 3 bin cha cc s hng n v, chc v trm. Khi nhn T th tng bin n v,
bin n v bng 10 th xo v 0 v tng bin chc, bin chc bng 10 th xo v 0 tng bin
trm, bin trm bng 10 th xo v 0. Ngc li khi nhn G s gim, bng 0 gim tip s
cho v 9 v gim hng k tip i 1.
Bi 31: Khai bo bng m LED7 trong b nh, sau s dng lnh XLAT vi AL l gi tr thp
phn ca k t nhp t bn phm.
U
.V
CHNG 4:
PE
.P
TI
T.
ED
Bi 1: Trc ht 80286 cn c kt ni vi cc mch ph tr nh: b iu khin BUS 80288

cung cp ra cc tn hiu IO/M, IORC, IOWC, MRDC, MWRC, DEN, DT/R . Cc cng ci
cho bus a ch, cc cng m 3 trng thi cho bus d liu. Sau kt ni bus d liu v cc
ng MRDC v MWRC ti tt c cc chip nh trong bn . Kt ni a ch cao ti gii
m a ch v a ch thp ti mi b nh, ng ra b gii m a ch s s dng cho php cc
b nh.
Bi 2: Nhn phm nhn s dng lnh IN, mun kim tra phm no c nhn c th s dng lnh
AND gi li bit tng ng vi phm, cc bit khc xo v 0. cc LED sng cc kiu
khc nhau s dng lnh OUT vi d liu khc nhau.
Bi 3: Mi ca s cung cp mt bit vo v cc bit ny s c kim tra ging nh cc phm nhn,
c mt bit tc ng th cp mt bit ra bng 1 ng cho ci bo ng.
Bi 4: Gii thut phn mm bao gm cc cng vic: Kim tra cc bit vo, ng ng ra khi c bit
vo tc ng v tt bo ng khi ng vo yu cu tt tc ng.
Bi 5: Chng trnh c thc hin theo gii thut trong bi 4.
Bi 6: mch tnh cc bao gm cc mch: pht hin nhc my bng cch pht hin st mc DC
trn ng dy hoc c dng chy qua my in thoi vi tng tr t 600 1500 ohm.
Mch c s quay dng IC 8870. Pht hin thng thoi v gc my bng cch pht hin o
cc tnh trn hai ng dy in thoi. Nh vy nu nhn c s gi, bit thi im bt
u thng thoi v thi im gc my, c th tnh c thi gian cuc gi. V vi bng gi
quy nh trc s tnh c cc ph cuc gi.
Bi 7, 8, 9: Trc ht cn ng m cc n thng qua cc Relay, cun dy relay s c ng
ngt t h thng vi x l v t cng tc tay, tip im ph relay s s dng lm phn hi
bo thit b ang ng hay m. Mun tt cn a tn hiu ng ra o trng thi ca tn
hiu ng ralay.
Bi 10: iu khin c tc ng c cn mt b DAC kt ni vi h thng vi x l, ng ra
s cp tn hiu tng t ti ng Vin ca mch iu khin tc ng c. Nh vy tng
ng vi mt gi tr s a ti DAC, ng c s quay vi mt tc nht nh. ng c
dng vi ng ra bng 7FH, t 7F gim v 0 ng c s quay nhanh dn theo mt chiu, v
t 7FH tng ln ti FFH ng c s quay nhanh dn theo chiu ngc li.
Bi 11: C th iu khin nhit bng cch ng m phn t nhit, nu nhit tng qu gi tr
mong mun tt phn t nhit v ngc li. xc nh nhit l cn s dng cm bin
nhit (v d LM35) i t nhit thnh in p, sau in p s i thnh gi tr s
bng ADC c vo vi x l.
240
Bi 12: o in p AC 0 220V trc ht cn gim in p bng bin p, sau cn chnh lu

cho ra gi tr DC tng ng v dng ADC i thnh s c vo vi x l. Gi tr c
vo s c tnh ton ra gi tr thp phn tng ng hin th ln LED 7 on.
Bi 13: Giao tip ng c bc vi h thng vi x l cn s dng mch khuch i cng sut, d
liu xut theo trnh t trong bng ng c quay theo chiu thun, s bc xut s tng
ng vi gc quay yu cu.
Bi 14: hin th k t ln LED ma trn trc ht cn c m k t nh ngha trc trong b
nh. Sau s hin th tng m trn tng ct ca ma trn. ch tri cn o v tr ca cc
m trong b nh.
U
.V
CHNG 5:
PE
.P
TI
T.
ED
Bi 1: c phm nhn cn thc hin theo phng php qut, cn tun t a mc 0 ra cc c v

tun t c vo t cc hng. T m cung cp ra ct v t m nhn vo t cc hng c th
xc nh c phm nhn. Hin th ln cc LED cng cn qut bng cc chn ln lt
tng n v cung cp m hin th cho n .
Bi 2: Ln lt dng t iu khin lp xo bit cng C vi thi gian tr khc nhau s c cc
sng vung vi tn s khc nhau.
Bi 3: 1100 01000B
Bi 4: Kt ni cc cng A v B ca hai h thng vi nhau, ch cc tn hiu bt tay OBF ni vi
STB v IBF ni vi ACK. Khi ng cc t iu khin tng ng v vit cc chng trnh
kim tra ng INTR truyn nhn d liu.
Bi 5: Kt ni cng A ca hai 8255 trn hai h thng km theo cc tn hiu iu khin cho chng,
vit cc chng trnh kim tra trng thi cc chn INTR truyn nhn d liu.
Bi 6: Mt cng cp d liu cho cc hng v mt cng cp d liu cho cc ct, mun hin ln mt
k t cn chn 1 trong cc ct bng 0 sau cung cp d liu sng cc led tng ng
trn ct , sau tip tc chn ct k tip.
Bi 7: Mt cng 8255 s ni ti cc ng ra d liu ca ADC, cng khc s iu khin tn hiu bt
u qu trnh chuyn i (Start) v cn gim st tn hiu kt thc chuyn i EOC nhn
c d liu ng.
Bi 8: 01000100B
Bi 9: 10001000B
Bi 10, 11: kt ni TxD ca 8251 h thng ny ti RxD ca 8251 h thng kia v ngc li, c
th s dng cc tn hiu bt tay DSR ni vi DTR v RTS ni ti CTS. Sau vit cc on
chng trnh khi ng cc ch lm vic tng ng. Chng trnh truyn nhn cn kim
tra tnh trng sn sng ca thit b trc khi truyn nhn d liu.
Bi 12: kt ni 8251 vi h thng 80286 nh m t trong bi hc, thc hin chng trnh khi
ng v truyn nhn d liu trn 80286. Trn my tnh tham kho th vin MSCOMM ca
MSDN.
CHNG 6:
Bi 1: Lnh OR bit cn c mt ton hng trong c C, nn cn lnh MOV bit.
Bi 2: bit 53H
Bi 3: MOV DPTR,9A00H
MOV A,#0ABH
241
PE
.P
TI
T.
ED
U
.V
MOVX @DPTR,A
Bi 4: 3MHz
Bi 5: PSEN
Bi 6: OR A,#01
Bi 7: MOV DPTR,#100H
MOVX @DPTR,R7
Bi 8: a ch 08H v 09H
Bi 9: lnh ghi bit tng ng trong thanh ghi PCON.
Bi 10: MOV R1,#50H
MOV A,@R1
Bi 11: 1EH
Bi 12: 8FH
Bi 13: A0H
Bi 14: A1H
Bi 15: Cn s dng timer to ra khong thi gian tr bng chu k xung vung, sau lt trng
thi ng ra P1.7 sau mi ln gi tr.
Bi 16: Cn to ra hai chng trnh tr 4 sec v 200 sec c lt trng thi P1.7 ln 1 sau 4 sec
li xo v 0 200 sec.
Bi 17: Thc hin cc lnh OR v NOT cho hnh a v NAND ri NOT cho hnh b.
Bi 18: A=29H
Bi 19: MOV C,PSW.5
MOV P1.5,C
Bi 20: c vo t cng P3, xo 4 bit cao v 0 sau tra bng i thnh m LED 7 on v
cp ra cng P1.
Bi 21: Timer 1 c cho php chy.
Bi 22: Timer 1 lm b m counter ch 0 cho php chy t bn ngoi, Timer 0 lm b m
ch 1 cho php chy t bn trong.
Bi 23: S dng timer 0 ch nh thi cho php t bn trong to ra thi gian tr bng chu k
xung vung 12KHz, lt trng thi P1.2 sau mi ln gi chng trnh tr.
Bi 24: Cn khi ng cng ni tip v timer1 xc nh tc truyn nhn, cc chng trnh
truyn cn kim tra TI trc khi cp d liu ti SBUF. Cc chng trnh nhn cn kim tra
RI trc khi c SBUF.
Bi 25: Chn ch thanh ghi dch cho cng ni tip, phn cng chn TxD v RxD ni ti thanh
ghi dch nh trong bi ging.
Bi 26: Dng lnh dch phi v kim tra c C xc nh khi no c bit 1.
CHNG 7:
Bi 1: Khi ng timer 1 ch counter cho php chy t bn trong, mi xung ng vo cp t

ca quay s lm b m timer tng ln 1. Gim st TH1 khi no bng gi tr cn thit th bt
n sng.
Bi 2: Trc ht mch cn giao tip vi 6 LED 7 on hin th gi pht giy. S dng
timer to ra thi gian tr 250 sec to ra mt ngt CPU, chng trnh ngt s tng mt s
m N1. Chng trnh chnh kim tra N1, nu N1=40 th xo v 0 khi s c 10000
sec hay 0.1 sec. Tng s m N2 (0.1sec) nu N2 = 10 th xo v 0 tng s m giy, s
m giy bng 60 th xo v 0 v tng s m pht, pht bng 60 th xo v 0 v tng s
242
ED
U
.V
m gi, gi bng 24 th xo v 0. Tip theo s hin th s m gi pht giy ln LED 7

on.
Bi 3: Qut bn phm ma trn bng cc cp mc 0 ra ct v c hng ri i ra m LED 7 on.
Khi ng timer tr 20 msec gy ngt CPU, chng trnh ngt qut gi tr ln 8 LED 7
on.
Bi 4: Tn hiu quay s trn my in thoi c th gii m bng IC gii m DTMF MT8870, mt
phm nhn s c m ho thnh tn hiu DTMF v c MT8870 i ra m nh phn 4 bit
tng ng. c c gi tr ng cn kim tra tn hiu INT ca 8870 trc khi c gi
tr m phm.
Bi 5: giao tip vi cc n cng sut ln cn c giao tip cng sut bng Relay hoc SSR.
Gii thut iu khin kh n gin: cho n xanh ng t bn ny + n bn kia cng
sng. Sau tt hai n ny sng ng thi hai n vng v cui cng s cho sng hai
n cn li. Mi ln sng s theo mt khong thi gian nh trc.
Bi 6: H thng m sn phm trc ht cn mt b cm bin quang mi sn phm i ngang
qua s to ra mt xung. Xung ny s c a ti ng vo ca mt timer, timer c khi
ng ch counter cho php chy t bn trong. Gi tr m c s trong b m timer
s c i ra thp phn v i thnh m hin th thch hp cung cp ti b hin th.
Bi 7: Cm bin tc s cung cp xung ti ng vo mt timer, b m timer s tng ln sau mi
xung v t s xung m c trong mt thi gian nh trc s tnh ra c tc quay
ca ng c.
T.
CHNG 8:
PE
.P
TI
Bi 1: a) Trc tip thanh ghi a ch (A2) v trc tip thanh ghi d liu (D0).
b) Tc thi #5.
c) Gin tip thanh ghi a ch (A0).
d) Gin tip thanh ghi a ch tng sau (A0)+
e) Gin tip thanh ghi a ch tr trc (A0)
f) Tng i thanh ghi PC
g) Gin tip thanh ghi a ch vi ch s.
Bi 2: A0 = D0 c; A1 = A0 c v D0 = A1 c.
Bi 3: Lnh khng thc hin c cng vic no c.
Bi 4: a) Ly gi tr nh 492 vo thanh ghi D0, D0 = B2H
b) D2=9CH
c) B278H
d) B278H
e) 0A9CH
Bi 5: a) A0=492
b) A0=491
c) A0=492
d) A0=494
e) A0=490
Bi 6: a) A1 s c np 4 byte bt u ti a ch 0028C504
b) gi tr 0028C504 s c ghi vo cc a ch t 0028C504 ti 0028C507
c) T di ti a ch 0028C504 s c chp vo A0
d) T di ti a ch 0028C500 s chp vo A1, A0 =0028C500
243
PE
128
0
0
256
VALUE,A2
D0
SUM
(A2)+,D2
D2,SUM
#1,D0
COUNT,D0
ADDLOOP
SUM,D2
D2
COUNT,D1
D1
D1,D2
D2,AVERAGE
ED
.P
TI
ADDLOOP
BYTE
WORD
WORD
BLOCK
LEA
CLR.B
CLR.W
MOV.W
ADD.W
ADDQ.B
CMP.B
BNE
MOVE.W
EXT.L
MOVE.B
EXT.W
DIVS
MOVE.W
T.
COUNT
SUM
AVERAGE
VALUES
FINAVE
U
.V
Bi 7: a) 00003810
b) 00004C00
c) FFFFD700
d) 00003A10
e) 00003984
Bi 9: 59FD0429
Bi 10: Lnh CLR.B D0 xo mt byte thp ca D0 nhng khng tc ng ti cc c ging nh
lnh SUB.B D0,D0.
Bi 11: 5555AAAB
Bi 12: 43BFFF6C
Bi 13: C9AE 048E
Bi 15: Chng trnh c th thc hin nh sau:
Bi 16: chng trnh c th thc hin nh sau

(A6)+,D5
D5,D6
FOUND
SEARCH
#0FBH,CCR
FOUND
MOVE.B
CMP.B
BEQ
CMP.B
ANDI
RTS
BLOCKMOVE
MOVEDATA
MOVE.W
MOVE.W
#16383,D0
(A3)+,(A4)+
SEARCH
Bi 17:
244
DBF
D0,MOVEDATA
SUBTAB
LONG
LONG
LONG
LONG
LONG
LONG
SUB0
SUB1
SUB2
SUB3
SUB4
SUB5
DISPAT
CMP.B
BCC
MOVEQ
MULU
LEA
MOVEA.L
JSR
BRA
#6,D4
ERROR
#4,D3
D3,D4
SUBTAB,A0
0(A0,D4.W),A1
(A1)
DISPAT
PE
.P
TI
T.
ED
U
.V
Bi 18:
245
CC CH VIT TT S DNG TRONG BI GING.
ED
U
.V
AAA: Ascii adjust for add lnh chnh ASCII cho lnh cng
AAD: Ascii adjust for divide lnh chnh ASCII cho lnh chia
AAM: Ascii adjust for multiply lnh chnh ASCII cho lnh nhn
AAS: Ascii adjust for subtract lnh chnh ASCII cho lnh tr
ADD add: lnh cng.
ADC add with carry; lnh cng c nh
AF: auxiliary flag c ph.
ALE: Address latch Enable Tn hiu cho php ci a ch: s dng ci tn hiu a ch
qua b ci cung cp cho b nh v vo ra.
ALU: Arithmetic logic unit n vi s hc vo logic
AU: Address Unit Khi to a ch; s dng to ra a ch vt l cung cp cho b nh v
vo ra.
AX: accumulator thanh ghi tch lu.
TI
T.
BP: base pointer thanh ghi con tr c s

BU: Bus Unit Khi giao tip BUS; l khi mch tc ng mi tn hiu giao tip vi th
gii bn ngoi ca b vi x l
BX: base thanh ghi a nng c s.
PE
.P
CE: Chip Enable Tn hiu iu khin chn vi mch hot ng (vi mch nh hoc vi mch
vo ra).
CF: Carry flag C nh
CJNE: compare and jump if not equal lnh so snh v nha nu khng bng
CLD- clear direction flag lnh xo c nh hng
CLI: clear interupt flag lnh xo c ngt.
CLK: clock ng vo nhn tn hiu xung nhp ca cc vi mch s.
CMP: compare lnh so snh.
CPU: Central Procesing Unit: n vi x l trung tn hay cn gi l b vi x l.
CS: Chip Select Tng t CE l tn hiu chn vi mch hot ng.
CS: Code Segment thanh ghi on lnh
CX: Count thanh ghi a nng m s ln lp.
C/D: control data tn hiu ng vo phn bit d liu iu khin v d liu truyn nhn ca
8251.
DAA: decimal adjust for add Lnh chnh thp phn sau lnh cng
DAS: decimal adjust for subtract Lnh chnh thp phn sau lnh tr.
DB: define byte Ch th hp ng khai bo bin byte trong b nh.
244
ED
U
.V
DD: define double word ch th khai bo bin 32 bit trong b nh.

DDRE: port E Data direction register thanh ghi nh hng truyn d liu cng E
DEC: decrement lnh gim
DEN: data enable ng ra cho php b m d liu hai chiu ca 80288..
DF: direction flag c nh hng.
DI: destination index thanh ghi ch s ch.
DIO; discrete input/output vo ra ri rc
DRAM: dynamic RAM b nh RAM ng.
DS: Data Segment thanh ghi on d liu
DT/R: data transmite revceive ng ra cho php chiu truyn d liu qua b m hai chiu
ca 80288.
DT: define ten byte ch th hp ng khai bo bin 10 byte trong b nh.
DIV: divide lnh chia
DW: define word ch th hp ng khai bo bin 16 bit trong b nh.
DX: data thanh ghi a nng cha d liu cho cc lnh nhn chia 16 bit.
TI
T.
EBI: External bus interface giao tip bus ngoi.

EEROM: electrical erasable ROM b nh ROM c th xo bng in.
EM: emulate processor extension bt cho php b ng x l ton hc trong thanh ghi t
trng thi my ca 80286.
EPROM: electrical programmmable ROM b nh ROM c th lp trnh bng in.
ES: Extra Segment thanh ghi on m rng
EU: Execution Unit Khi thc hin lnh trong vi x l
.P
FQM: frequency measurement o tn s
PE
IC: integrated circuit vi mch tch hp.

IDIV: integer divide lnh chia nguyn.
IF: Interrupt flag c ngt.
IMB: Inter module bus bus kt ni cc module.
IMUL: integer multiply lnh nhn nguyn.
IN: input lnh nhp d liu t cng.
INC: increment lnh tng.
INT: interupt l tn hiu ng vo nhn yu cu ngt ca vi x l.
I/O: input/output vo ra
IORC: input/output read control tn hiu c vo ra cp t CPU
IOPL: IO privilede level c ch th mc c quyn vo ra.
IOWC: input/output write control tn hiu ghi vo ra cp t CPU
IP:instruction pointer thanh ghi con tr lnh.
ITC: input capture/input transition counter b m ng vo bt v chuyn i.
IU: Instruction Unit Khi gii m lnh trong vi x l.
245
JA: jump if above Nhy khi ln hn

JB: jump if below Nhy khi nh hn.
JC: jump if carry nhy khi c nh bng 1
JE: jump if equal nhy khi bng.
JNC; jump if not caryy nhy khi c nh bng 0.
U
.V
JMP: jump lnh nhy
ED
LDS: load effective address and segment into DS lnh np a ch tc ng v np a ch

segment vo DS.
LEA: load effective address lnh np a ch tc ng (offset) vo mt thanh ghi.
LES: load effective address and segment into DS lnh np a ch tc ng v np a ch
segment vo ES.
LSI: large scale integration mch tch hp mt cao
.P
TI
T.
MCU: Micro Controller Unit b vi iu khin

M/IO: memory/input output ng ra xc nh 80286 truyn d liu vi b nh hoc vo ra.
MOV: move lnh chuyn d liu
MRDC; memory read control tn hiu c nh cp t CPU
MP: monitor coprocessor extension bit cho bit c ng x l ton hc ang hot ng.
MSI:midium scale integration: mch tch hp mt va.
MUL: multiply lnh nhn
MWTC: memory write control tn hiu ghi b nh cp t CPU.
NEG: negative lnh ly m

NT: nested task c nhim v lng nhau
PE
OC: output control ng vo iu khin cho php ra.

OC: output compare ng ra so snh
OE: output Enable tn hiu nhn yu cu c ca b nh
OF: overflows flag c trn
OUT: output lnh xut d liu ra mt cng.
PE: protect mode enable bit cho php ch bo v

PF: parity flag c chn l.
PEPAR: port E pin assignment register thanh ghi gn chn port E
PUSH lnh np d liu vo ngn xp
POP lnh ly d liu ra khi ngn xp.
PWM: pulse width modulation iu ch rng xung
246
QOM: queued output match ng ra so snh hng i

QSM: queue serial module m un ni tip hng i
QSPI: queue serial peripheral interface giao tip ngoi vi ni tip hng i
U
.V
RAM: random access memory b nh truy cp ngu nhin

RCL: rote carry left lnh quay tri qua c nh
RCL: rote carry right lnh quay phi qua c nh
RD: read tn hiu c thng l ng vo ca b nh hoc vo ra nhn yu cu c t CPU.
ROL: rote leff lnh quay tri.
ROM: read only memory b nh ch c.
ROR: rote right lnh quay phi
RPL: requested Privelege level Cc bit t mc c quyn yu cu trong con tr a ch o.
PE
.P
TI
T.
ED
SBB: subtract with borrow lnh tr c mn.

SF: sign flag c du.
SHL: shift left lnh dch tri
SHR: shift right lnh dch phi
SAL: shift arithmetic left lnh dch tri s hc
SAR: shift arithmetic right lnh dch phi s hc
SI: source index thanh ghi ch s ngun
SIM : system integrated module m un tch hp h thng ca MCU68332.
SIMCR: SIM configue register thanh ghi cu hnh SIM.
SIMTR: SIM test register thanh ghi kim tra SIM
SRAM : stactic RAM b nh RAM tnh.
SP: Stack pointer thanh ghi con tr ngn xp
SCI: Serial Communication Interface giao tip thng tin ni tip.
SPWM: synchronized PWM PWM ng b.
SR: status register thanh ghi trng thi
SS: Stack Segment thanh ghi on ngn xp
SSI: small scale integration vi mch tch hp mch thp.
SUB: subtract lnh tr.
SYNCR: Clock synthesizer control register thanh ghi iu khin tng hp clock.
TI: table indicator b ch th bng s dng phn bit khng gian nh.
TF: trap flag c by.
TPU: time processor unit m x l thi gian.
TS: task set bit chuyn nhim v trong thanh ghi trang thi my
TSM: table step motor bng iu khin ng c bc
UART: universal asynchronous receicer transmitter B truyn nhn cn ng b tch hp.
247
VLSI: very large scale integration mch tch hp mch rt cao

VBR: Vector Base Register thanh ghi vector c s ca MC68332.
PE
.P
TI
T.
ED
ZF: zero flag c Zero.
U
.V
XCHG: exchange lnh chuyn i d liu

XLAT lnh np gi tr t bng d liu vo thanh ghi AL.
WE: write enable tn hiu nhn yu cu ghi ca b nh.

WR: write tn hiu ghi thng l ng vo ca b nh v vo ra nhn tn hiu yu cu ghi t
CPU.
248

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LI NI U

Cc b vi x l ra i em li bc ngot trong khoa hc k thut, cc thit b tr nn

Chng 1 : Kin trc ca h vi x l (2 tit)

1.1 T chc chung ca h vi x l

Chng 2 : Nguyn tc lm vic ca b vi x l h 80X86 Intel (6 tit)

Chng 3 : Lp trnh Assembly cho h vi x l Intel (6 tit)

3.1 Cu trc ca hp ng.

3.2.2 Nhm lnh x l d liu.

Chng 4 : Thit k h vi x l chuyn dng (6 tit)

Chng 5 : Cc chip IC h tr cho h vi x l (4 tit)

5.1 Chip vo / ra lp trnh 8255

6.1 Cu trc v chc nng ca vi iu khin 8051.

6.4 B iu khin truyn tin ni tip UART ca 8051.

7.1 Thit k h o thng s tn hiu xung

Chng 8 : Vi iu khin 32 bit MC68332 (9 tit)

8.1 Cu trc v chc nng thnh phn ca on chip 32 bit MC68332

Chong 7 : Thit k h thng chuyn dng trn on chip 80C51 (4 tit)

TI LIU THAM KHO

Chng 1: Kin trc ca h thng vi x l

CHNG 1: KIN TRC CA H THNG VI X L

T CHC CHUNG CA H THNG VI X L

1.1.1. Cng ngh LSI v s ra i ca cc b vi x l

Chng 1: Kin trc ca h thng vi x l

S bao gm khi cc hm s c bn v cc b m c kt ni vi nhau thng qua

Hnh 1.1: S khi cu to c bn ca vi x l.

Nh vy vi x l l mt IC s c tt c cc hm s c bn, thc hin mt chc nng s

1.1.2. Phn cng v phn mm ca h thng vi x l

Hnh 1.2: S khi m t hot ng ca h thng vi x l.

Chng 1: Kin trc ca h thng vi x l

1.1.3. Tng qut v phn cng h thng vi x l

Hnh 1.3: S khi h thng vi x l

Chng 1: Kin trc ca h thng vi x l

Chng trnh ngn

1.1.4. Tng qut v phn mm v s pht trin ca cc ngn ng phn mm

Hnh 1.4: S pht trin ca ngn ng phn mm.

Trong h thng mch in t phn cng ca h thng vi x l m t trn hnh 1.3, b nh

Chng 1: Kin trc ca h thng vi x l

Trong cc h thng vi x l, b nh ROM c s dng ghi cc chng trnh v d

1.2.1. Cu trc v nguyn tc lm vic ca b nh ROM

Mi loi b nh ROM s c cch kt ni cc im ca ma trn nh khc nhau nh trn

Chng 1: Kin trc ca h thng vi x l

Hnh 1.7: Ni cc im ma trn nh ca cc loi ROM.

Hnh 1.8: Cc tn hiu EPROM 2764.

Chng 1: Kin trc ca h thng vi x l

1.2.2. Cu trc v nguyn tc lm vic ca b nh RAM

Hnh 1.9: Cu to mt bit nh SRAM.

Hnh 1.9 m t cu to ca mt bit nh SRAM, trong s khi cp ngun mt trong hai

Hnh 1.10: Cu to bit nh DRAM.

Chng 1: Kin trc ca h thng vi x l

Hnh 1.11: T chc lu tr cc bit trong b nh.

Vi cu trc trn vi dung lng nh ln, ma trn nh s mt i xng (nhiu hng, t

Hnh 1.12: T chc cc khi chc nng trong b nh.

Chng 1: Kin trc ca h thng vi x l

Hnh 1.13: Gii m kt ni 4 b nh trong h thng vi x l.

Chng 1: Kin trc ca h thng vi x l

1.3.1. Cu trc v nguyn tc lm vic ca cng vo ra

1.3.2. Mch ba trng thi v mch ci

Hnh 1.14: Cc cng vo ra s c bn

Chng 1: Kin trc ca h thng vi x l

1.3.3. Cc cng vo ra n gin

Hnh 1.15: Cc cng vo ra mt chiu c bn.

Vi x l l mt vi mch s c th thc hin c tt c cc chc nng ca cc vi mch s khc

Mt lnh ca b vi x l l chui cc bit 0, 1 cung cp vi x l thc hin c mt chc