Circuit simulation using SPICE

Neuromorphic Engineering II
Institute of Neuroinformatics
University | ETH Zurich

Spring Semester 2013

Outline

What is SPICE?

How does SPICE work?

Tanner Tools TSPICE

S-Edit

SPICE Origins
SPICE is a computer program designed to simulate analog electronic
circuits.
It original intent was for the development of integrated circuits, from
which it derived its name: Simulation Program with Integrated Circuit
Emphasis.
1967 Prof. Ronald Rohrer of U.C. Berkeley develop Computer
Analysis of Nonlinear Circuits, Excluding Radiation
(CANCER)
1972 CANCER was re-written and re-named to SPICE
(Version 1) and released to the public domain.
1975 Version 2 of SPICE was released (Version 2g6)
1985 Version 3 of SPICE was rewritten in C (rather than
FORTRAN) and released to the public domain.

SPICE Origins
SPICE is a computer program designed to simulate analog electronic
circuits.
It original intent was for the development of integrated circuits, from
which it derived its name: Simulation Program with Integrated Circuit
Emphasis.
1967 Prof. Ronald Rohrer of U.C. Berkeley develop Computer
Analysis of Nonlinear Circuits, Excluding Radiation
(CANCER)
1972 CANCER was re-written and re-named to SPICE
(Version 1) and released to the public domain.
1975 Version 2 of SPICE was released (Version 2g6)
1985 Version 3 of SPICE was rewritten in C (rather than
FORTRAN) and released to the public domain.

SPICE Origins
SPICE is a computer program designed to simulate analog electronic
circuits.
It original intent was for the development of integrated circuits, from
which it derived its name: Simulation Program with Integrated Circuit
Emphasis.
1967 Prof. Ronald Rohrer of U.C. Berkeley develop Computer
Analysis of Nonlinear Circuits, Excluding Radiation
(CANCER)
1972 CANCER was re-written and re-named to SPICE
(Version 1) and released to the public domain.
1975 Version 2 of SPICE was released (Version 2g6)
1985 Version 3 of SPICE was rewritten in C (rather than
FORTRAN) and released to the public domain.

SPICE Origins
SPICE is a computer program designed to simulate analog electronic
circuits.
It original intent was for the development of integrated circuits, from
which it derived its name: Simulation Program with Integrated Circuit
Emphasis.
1967 Prof. Ronald Rohrer of U.C. Berkeley develop Computer
Analysis of Nonlinear Circuits, Excluding Radiation
(CANCER)
1972 CANCER was re-written and re-named to SPICE
(Version 1) and released to the public domain.
1975 Version 2 of SPICE was released (Version 2g6)
1985 Version 3 of SPICE was rewritten in C (rather than
FORTRAN) and released to the public domain.

SPICE Avaliable Packages

The SPICE home page:

http:
//bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/
Public Domain
I

Original Berkeley SPICE3f4 code:

ftp://ic.eecs.berkeley.edu/pub/Spice3/
I

NGSpice

http://sourceforge.net/projects/ngspice
Commercial
I

HSPICE (Synopsis)

PSCPICE (OrCAD)

SYMETRIX

TSpice (Tanner Tools)

SPICE Avaliable Packages

The SPICE home page:

http:
//bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/
Public Domain
I

Original Berkeley SPICE3f4 code:

ftp://ic.eecs.berkeley.edu/pub/Spice3/
I

NGSpice

http://sourceforge.net/projects/ngspice
Commercial
I

HSPICE (Synopsis)

PSCPICE (OrCAD)

SYMETRIX

TSpice (Tanner Tools)

SPICE Avaliable Packages

The SPICE home page:

http:
//bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/
Public Domain
I

Original Berkeley SPICE3f4 code:

ftp://ic.eecs.berkeley.edu/pub/Spice3/
I

NGSpice

http://sourceforge.net/projects/ngspice
Commercial
I

HSPICE (Synopsis)

PSCPICE (OrCAD)

SYMETRIX

TSpice (Tanner Tools)

SPICE Avaliable Packages

The SPICE home page:

http:
//bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/
Public Domain
I

Original Berkeley SPICE3f4 code:

ftp://ic.eecs.berkeley.edu/pub/Spice3/
I

NGSpice

http://sourceforge.net/projects/ngspice
Commercial
I

HSPICE (Synopsis)

PSCPICE (OrCAD)

SYMETRIX

TSpice (Tanner Tools)

SPICE Avaliable Packages

The SPICE home page:

http:
//bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/
Public Domain
I

Original Berkeley SPICE3f4 code:

ftp://ic.eecs.berkeley.edu/pub/Spice3/
I

NGSpice

http://sourceforge.net/projects/ngspice
Commercial
I

HSPICE (Synopsis)

PSCPICE (OrCAD)

SYMETRIX

TSpice (Tanner Tools)

SPICE Avaliable Packages

The SPICE home page:

http:
//bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/
Public Domain
I

Original Berkeley SPICE3f4 code:

ftp://ic.eecs.berkeley.edu/pub/Spice3/
I

NGSpice

http://sourceforge.net/projects/ngspice
Commercial
I

HSPICE (Synopsis)

PSCPICE (OrCAD)

SYMETRIX

TSpice (Tanner Tools)

SPICE Programming
SPICE is an interpreted language: In order for a computer to
understand the SPICE instructions you type, it must have the SPICE
program (interpreter) installed. SPICE source files are commonly
referred to as netlists (or "decks") with each line in the file being called
a "card."
Writing a SPICE deck is like writing a good program
Plan: sketch schematic on paper or in editor.
Modify existing decks whenever possible.
Code: strive for clarity.
Start with name, email, date, purpose.
Generously comment.
Test: Predict what results should be.
Compare with actual.
Garbage In, Garbage Out!

Solving differential equations

SPICE uses numerical techniques to solve nodal analysis of circuit.

The nature of SPICEs iterative process allows it to simulate many
types of systems that can be modelled through standard equations
and differential equations.
I

Hodgkin and Huxley model of a neurons spike generating

mechanism.

Chaotic and Dynamical Systems

Diffusion equations

Solving differential equations

SPICE uses numerical techniques to solve nodal analysis of circuit.

The nature of SPICEs iterative process allows it to simulate many
types of systems that can be modelled through standard equations
and differential equations.
I

Hodgkin and Huxley model of a neurons spike generating

mechanism.

Chaotic and Dynamical Systems

Diffusion equations

Solving differential equations

SPICE uses numerical techniques to solve nodal analysis of circuit.

The nature of SPICEs iterative process allows it to simulate many
types of systems that can be modelled through standard equations
and differential equations.
I

Hodgkin and Huxley model of a neurons spike generating

mechanism.

Chaotic and Dynamical Systems

Diffusion equations

Spice components and analysis types

You can use SPICE to specify these circuit components:

I

Resistors, Capacitors, Inductors

Independent sources (V, I), Dependent sources (V, I)

Transmission lines

Active devices (diodes, BJTs, JFETS, MOSFETS)

You can use SPICE to perform the following types circuit analysis:
I

Non-linear d.c.

Non-linear transient

Linear a.c.

Noise and temperature

SPICE common elemenets

Letter
R
C
L
V
I
M
D
Q
X
E
G
H
F

Element
Resistor
Capacitor
Inductor
Independent Voltage Source
Independent Current Source
MOSFET
Diode
Bipolar transistor
Subcircuitr
Voltage controlled Voltage Source
Voltage controlled Current Source
Current controlled Voltage Source
Current controlled Current Source

Active components: the MOSFET device models

All Mosfet devices in SPICE reference a model by its instance name.

Each Mosfet model in SPICE has a keyword NMOS or PMOS, as well
as a Level parameter.
MOSFET TRANSISTOR MODELS:
General form: .model [modelname] [nmos or pmos] [parmtr1=x] . . .
I

.model mod1 pmos

.model mod2 nmos level=2 phi=0.65 rd=1.5

MOSFET device model levels

Levels 1,2,3 (Berkeley SPICE 2g6): basic transistor equations.

Not very accurate, but fast.

Level 4 (BSIM1): accurate, based on the Berkeley short-channel

IGFET model.

Level 5 (Tanner, Maher-Mead): accurate physically based model,

continuous over all regions of operation, including subthreshold.

Levels 13, 28, 39, and 47: Based on Berkeley IGFET models
(BSIM, BSIM2, and BSIM3 models).

Levels 49 and 53 (BSIM3 Revision 3): most accurate models.

Supported by most foundries and SPICE simulation engines.

MOSFET device model levels

Levels 1,2,3 (Berkeley SPICE 2g6): basic transistor equations.

Not very accurate, but fast.

Level 4 (BSIM1): accurate, based on the Berkeley short-channel

IGFET model.

Level 5 (Tanner, Maher-Mead): accurate physically based model,

continuous over all regions of operation, including subthreshold.

Levels 13, 28, 39, and 47: Based on Berkeley IGFET models
(BSIM, BSIM2, and BSIM3 models).

Levels 49 and 53 (BSIM3 Revision 3): most accurate models.

Supported by most foundries and SPICE simulation engines.

MOSFET device model levels

Levels 1,2,3 (Berkeley SPICE 2g6): basic transistor equations.

Not very accurate, but fast.

Level 4 (BSIM1): accurate, based on the Berkeley short-channel

IGFET model.

Level 5 (Tanner, Maher-Mead): accurate physically based model,

continuous over all regions of operation, including subthreshold.

Levels 13, 28, 39, and 47: Based on Berkeley IGFET models
(BSIM, BSIM2, and BSIM3 models).

Levels 49 and 53 (BSIM3 Revision 3): most accurate models.

Supported by most foundries and SPICE simulation engines.

MOSFET device model levels

Levels 1,2,3 (Berkeley SPICE 2g6): basic transistor equations.

Not very accurate, but fast.

Level 4 (BSIM1): accurate, based on the Berkeley short-channel

IGFET model.

Level 5 (Tanner, Maher-Mead): accurate physically based model,

continuous over all regions of operation, including subthreshold.

Levels 13, 28, 39, and 47: Based on Berkeley IGFET models
(BSIM, BSIM2, and BSIM3 models).

Levels 49 and 53 (BSIM3 Revision 3): most accurate models.

Supported by most foundries and SPICE simulation engines.

MOSFET device model levels

Levels 1,2,3 (Berkeley SPICE 2g6): basic transistor equations.

Not very accurate, but fast.

Level 4 (BSIM1): accurate, based on the Berkeley short-channel

IGFET model.

Level 5 (Tanner, Maher-Mead): accurate physically based model,

continuous over all regions of operation, including subthreshold.

Levels 13, 28, 39, and 47: Based on Berkeley IGFET models
(BSIM, BSIM2, and BSIM3 models).

Levels 49 and 53 (BSIM3 Revision 3): most accurate models.

Supported by most foundries and SPICE simulation engines.

SPICE Analysis Types

DC Operating Point Analysis .op: Computes circuits DC operating
point values.
DC Transfer Analysis .dc: Sweeps signals and computes operating
point values for all range of swept signals.
Transient Analysis .tran: Provides information on how circuit elements
vary with time.
Transient Powerup Analysis .tran/powerup: Sets the entire circuit to
zero for t = 0s. As the simulation proceeds, the voltage
sources are allowed to ramp up to their specified values.
Useful to define the initial state of a circuit which has no
definite DC steady-state condition.
AC Analysis .ac: Characterizes the circuits behavior dependence on
small-signal input frequency.

SPICE Analysis Types

DC Operating Point Analysis .op: Computes circuits DC operating
point values.
DC Transfer Analysis .dc: Sweeps signals and computes operating
point values for all range of swept signals.
Transient Analysis .tran: Provides information on how circuit elements
vary with time.
Transient Powerup Analysis .tran/powerup: Sets the entire circuit to
zero for t = 0s. As the simulation proceeds, the voltage
sources are allowed to ramp up to their specified values.
Useful to define the initial state of a circuit which has no
definite DC steady-state condition.
AC Analysis .ac: Characterizes the circuits behavior dependence on
small-signal input frequency.

SPICE Analysis Types

DC Operating Point Analysis .op: Computes circuits DC operating
point values.
DC Transfer Analysis .dc: Sweeps signals and computes operating
point values for all range of swept signals.
Transient Analysis .tran: Provides information on how circuit elements
vary with time.
Transient Powerup Analysis .tran/powerup: Sets the entire circuit to
zero for t = 0s. As the simulation proceeds, the voltage
sources are allowed to ramp up to their specified values.
Useful to define the initial state of a circuit which has no
definite DC steady-state condition.
AC Analysis .ac: Characterizes the circuits behavior dependence on
small-signal input frequency.

SPICE Analysis Types

DC Operating Point Analysis .op: Computes circuits DC operating
point values.
DC Transfer Analysis .dc: Sweeps signals and computes operating
point values for all range of swept signals.
Transient Analysis .tran: Provides information on how circuit elements
vary with time.
Transient Powerup Analysis .tran/powerup: Sets the entire circuit to
zero for t = 0s. As the simulation proceeds, the voltage
sources are allowed to ramp up to their specified values.
Useful to define the initial state of a circuit which has no
definite DC steady-state condition.
AC Analysis .ac: Characterizes the circuits behavior dependence on
small-signal input frequency.

SPICE Analysis Types

DC Operating Point Analysis .op: Computes circuits DC operating
point values.
DC Transfer Analysis .dc: Sweeps signals and computes operating
point values for all range of swept signals.
Transient Analysis .tran: Provides information on how circuit elements
vary with time.
Transient Powerup Analysis .tran/powerup: Sets the entire circuit to
zero for t = 0s. As the simulation proceeds, the voltage
sources are allowed to ramp up to their specified values.
Useful to define the initial state of a circuit which has no
definite DC steady-state condition.
AC Analysis .ac: Characterizes the circuits behavior dependence on
small-signal input frequency.

Why Tanner-Tools TSPICE

Integrated with L-Edit and S-Edit

Affordable (<2K, low maintenance fees)

Optimized for subthreshold circuits simulations

Table-based mode

Why Tanner-Tools TSPICE

Integrated with L-Edit and S-Edit

Affordable (<2K, low maintenance fees)

Optimized for subthreshold circuits simulations

Table-based mode

Why Tanner-Tools TSPICE

Integrated with L-Edit and S-Edit

Affordable (<2K, low maintenance fees)

Optimized for subthreshold circuits simulations

Table-based mode

Why Tanner-Tools TSPICE

Integrated with L-Edit and S-Edit

Affordable (<2K, low maintenance fees)

Optimized for subthreshold circuits simulations

Table-based mode

TSPICE netlist example

Vdd

Vin

Vout

Inverter netlist (inverter.sp)

.include mosis.md *(Include device models)

MP1
MN1

Vout
Vout

Vin
Vin

Vdd
Gnd

Vdd
Gnd

pmos
nmos

L=10
L=10

W=10
W=10

TSPICE netlist example

Vdd

Vin

Vout

Inverter netlist (inverter.sp)

.include mosis.md *(Include device models)

MP1
MN1
Mosfet

Vout
Vout
D

Vin
Vin
G

Vdd
Gnd
S

Vdd
Gnd
B

pmos
nmos
model

L=10
L=10
L

W=10
W=10
W

TSPICE netlist example

Simulation commands (inverter_c.sp)

Vdd

Vin

Vout

.options scale=0.8u deftables=0

.options maxmsg=1 modelmode=direct
.options abstol=1e-17 reltol=1e-7 chargetol=1e-19
.options absdv=0.01 accurate=1
.options js=1e-5
.include "inverter.sp"
vdd Vdd gnd 5
vin in gnd pwl( 0 0 5u 5 10u 0)
.tran/powerup 1u 10u
.print tran in out

TSPICE netlist example

Simulation commands (inverter_c.sp)

Vdd

Vin

Vout

options
.options scale=0.8u deftables=0
.options maxmsg=1 modelmode=direct
.options abstol=1e-17 reltol=1e-7 chargetol=1e-19
.options absdv=0.01 accurate=1
.options js=1e-5
.include "inverter.sp"
vdd Vdd gnd 5
vin in gnd pwl( 0 0 5u 5 10u 0)
.tran/powerup 1u 10u
.print tran in out

TSPICE netlist example

Simulation commands (inverter_c.sp)

Vdd

Vin

Vout

.options scale=0.8u deftables=0

.options maxmsg=1 modelmode=direct
.options abstol=1e-17 reltol=1e-7 chargetol=1e-19
.options absdv=0.01 accurate=1
circuit
.options js=1e-5
.include "inverter.sp"
vdd Vdd gnd 5
vin in gnd pwl( 0 0 5u 5 10u 0)
.tran/powerup 1u 10u
.print tran in out

TSPICE netlist example

Simulation commands (inverter_c.sp)

Vdd

Vin

Vout

.options scale=0.8u deftables=0

.options maxmsg=1 modelmode=direct
.options abstol=1e-17 reltol=1e-7 chargetol=1e-19
.options absdv=0.01 accurate=1
.options js=1e-5
elements
.include "inverter.sp"
vdd Vdd gnd 5
vin in gnd pwl( 0 0 5u 5 10u 0)
.tran/powerup 1u 10u
.print tran in out

TSPICE netlist example

Simulation commands (inverter_c.sp)

Vdd

Vin

Vout

.options scale=0.8u deftables=0

.options maxmsg=1 modelmode=direct
.options abstol=1e-17 reltol=1e-7 chargetol=1e-19
.options absdv=0.01 accurate=1
.options js=1e-5
.include "inverter.sp"
vdd Vdd gnd 5
commands
vin in gnd pwl( 0 0 5u 5 10u 0)
.tran/powerup 1u 10u
.print tran in out

How does (T)SPICE work?

Not very well! Dont ever believe it completely models reality.

Problems:
I

Very computer intensive.

Doesnt model transistor mismatch.

Doesnt model Early effects well.

Doesnt model distributed characteristics like resistance and

capacitance.

Makes you lazy about thinking.

How does (T)SPICE work?

Not very well! Dont ever believe it completely models reality.

Problems:
I

Very computer intensive.

Doesnt model transistor mismatch.

Doesnt model Early effects well.

Doesnt model distributed characteristics like resistance and

capacitance.

Makes you lazy about thinking.

How does (T)SPICE work?

Not very well! Dont ever believe it completely models reality.

Problems:
I

Very computer intensive.

Doesnt model transistor mismatch.

Doesnt model Early effects well.

Doesnt model distributed characteristics like resistance and

capacitance.

Makes you lazy about thinking.

How does (T)SPICE work?

Not very well! Dont ever believe it completely models reality.

Problems:
I

Very computer intensive.

Doesnt model transistor mismatch.

Doesnt model Early effects well.

Doesnt model distributed characteristics like resistance and

capacitance.

Makes you lazy about thinking.

How does (T)SPICE work?

Not very well! Dont ever believe it completely models reality.

Problems:
I

Very computer intensive.

Doesnt model transistor mismatch.

Doesnt model Early effects well.

Doesnt model distributed characteristics like resistance and

capacitance.

Makes you lazy about thinking.

T-SPICE and S-Edit

T-SPICE and S-Edit

T-SPICE and S-Edit