Presentation 21.

Testing of Parameters of Sampled Values using a CMC 256 Relay

Testing Set
Huang Xin / Ren Yanming / Tang Xi / Jin Yangjun / Zhang Wei / Li Zheng,
Beijing Sifang Automation, China

Introduction
With the development of NCIT (Non Conventional
Instrument Transformer), the interface of analog
values between instrument transformers and
protection relays has changed from hard-wired
cables to digital communication over optical fibers.
The current and voltage are sampled by NCIT. The
MU (Merging Unit) of NCIT publishes the analog
values over process bus. The protection relay
subscribes the data. Compared to the conventional
instrument transformers, the analog values are
sampled in distributed mode. The scheme of
differential relay requires the synchronization of
sampled values. To avoid the impact of
synchronization system failure on relay, the relay
should resample the digital sampled value. In this
situation, the transmission time delay of SV frame
from MU to the relay should be fixed. The relay has
some parameters to compensate the time delay.
These parameters are very vital for the relay. It is
necessary to test the time delay accurately.
CMC 256 of OMICRON can be used to test the
parameters of SV conveniently. CMC 256 has a
synchronized module which can be used to test the
time delay parameters of SV publisher and
subscriber.

The Time Delay of SV

Before discussing the testing method of
time
delay of SV, we should know what the resample
scheme is concerned about and the composition of
the time delay. As shown below, the time delay
used in resample scheme is composed of three
parts as Figure 1 shown, the static time delay of
MU(T1), the transmitting time delay of SV
frame(T2), process waiting time delay(T3). To
avoid the phase shift of analog from different MU,
the SV frame receivers should know SV time delay
of all analog relative to the resample time. The time
delay starts from the holding time of the analog
being sampled, including the phase delay of the
transformer. The time delay ends at the time when
the SV frames are re-sampled. When the
synchronization system works well, all MU sample
at the same time, but when the synchronization
system fails to work, analog signals will be
sampled at a different time, and the corresponding
SV frames will arrive the receiver at different time.
The receiver processes the SV frame according to
its local clock, so all the SV frames have to wait
until the SV receiver re-sample them.

The process waiting time delay T3 will be used in

resample scheme.
Although T3 is useful for resample scheme, it is an
internal time delay of SV receivers, and it can be
got by the SV receivers themselves. T3 is not the
key factor in resample scheme. The external time
delay plays an important role, which is equal to the
sum of T1 and T2. The transmitting time delay of
SV frame T2 is depend on the SV frame length.
When the SV frame is transmitted, if there is no
conflict, T2 can be calculated. So only the T1 has
to be measured, we will discuss the measuring
method of T1 in this paper.

Fig. 1 The composition of time delay of SV

The synchronized module of CMC 256 can

generate analog output whose phase is controlled
by a digital input (DI 10). The phase of the analog
output can be set by the users; it can also be
sampled according to the digital input. The
synchronized module can be used to test the time
delay parameters of SV.

Testing Method of SV Time Delay

in MU
As shown in Figure 2, a current generator is used
when performing testing. The output current of the
current generator is measured by a standard
instrument transformer and an instrument
transformer under test. The output signal of the
instrument transformer under test is connected
with a MU, which performs the A/D converter
function and sends out SV frame over Ethernet.
After passing an Ethernet switch, the SV frame of
MU is received by the net interface card of
computer, in which the SV frame will be processed.
The output waveform of standard instrument
transformer is turn into square wave to get its
primary current phase. The square waveform is
used as input to control the CMC 256 testing set by

OMICRON electronics GmbH 2011 International Protection Testing Symposium

Presentation 21.2

connecting it to the DI 10. The CMC 256 can

generate a waveform whose phase is controlled by
DI 10. The generated waveform can be sample
and sent out by the testing set. The SV frame of
CMC 256 will also pass the Ethernet switch. The
net interface card will receive the SV frame of
CMC 256 in the same way as that of the MU.

a short period of time until the other SV frame is

transmitted. It brings an indefinite transmitting
time delay and the test precision will be affected.
The conflict can be found by observing the arriving
time of SV frames. If two SV frames from different
source have a close arriving time, the conflict may
happen. To solve this problem, we can adjust the
arriving time of one SV frame to avoid the conflict.
For example, we can let the SV frame of CMC 256
pass an extra switch before it enters the switch
connected with the net interface card. The extra
switch
will take some time to transmit the SV
frame, thus the conflict in the later switch can be
avoid. Of curse, the extra time took in the extra
switch will be taken account when calculating T1 of
MU.

Fig. 2 the configuration of testing for MU

Test Method of Time Delay

Parameters in Relay

In this test circumstance, the phase of the same

primary current will be turned into digital signal and
sent into computer in two different ways. The NIC
(network interface card) can record the arriving
time of each SV frame, no matter it is sent by MU
or CMC 256. The computer can calculate the
phase difference of the digital current signal i1 and
i2, this phase difference is affected by some
factors. If the switch uses a static time to transmit
the SV frame of MU and CMC 256, the phase
difference of i1 and i2 will be decided by the sum of
T1 and T2 of the two different ways. If the
CMC 256 and the MU under test use the same SV
frame format, the T2 of the two different ways will
be same. In this case, if we got the phase
difference of i1 and i2, we can calculate the T1
difference of the two different ways. The T1 of the
CMC 256 is known to us, we can get the T1 of the
MU under test.
The digital current signal i1 and i2 will be
calculated by the computer to get its phase
difference. With a long calculating window, we can
get the phase difference precisely. There are two
part time parameters in the T1 of the CMC 256,
one is the phase delay of the standard instrument
transformer, and the other is the process time
delay of CMC 256. These two time parameters are
accessible in the datasheet of the equipment.
In the test above, we can set the CMC 256 output
signal phase relative to the DI 10 to 0. We can also
adjust the output signal phase of CMC 256 to turn
the phase difference in the computer into 0, thus
the output phase of CMC 256 signal will be used to
calculate T1.
In the reasoning process above, we assume that
the switch uses a static time to transmit the SV
frame of MU and CMC 256. However, it is not
always true. When two SV frames enter the switch
at the same time, there will be a conflict when they
come out from the same port of the switch. When
the conflict occurs, at least one SV frame will wait

The time delay parameters used in protection relay

can be tested in the same way as above. We only
need to use the SV receiving IED to take the place
of the net interface card and the computer as figure
3 shown. At first, we set the time delay parameters
of IED to 0 and record the calculating result of IED,
e.g. record the differential current of the protection
relay. Then we set the time delay parameters of
IED, adjusting the output signal phase of CMC 256
to acquire the same calculating result of IED, e.g.
let the differential current be the same as before.
Thus the output phase of CMC 256 signal is equal
to the time delay parameters of IED.

Fig. 3 the configuration of testing for protection relay

Conclusion
From the test methods we discuss above,
CMC 256 can used to test the parameters of SV. In
the testing CMC 256 is used as a digital phase
shifter, which acts as a MU. We can get the time
delay parameters by comparing CMC 256 with the
set under test. If DI 10 can act as a PPS input of
MU, the CMC 256 will work in the same way as
MU, more parameters can be tested conveniently.

OMICRON electronics GmbH 2011 International Protection Testing Symposium

Presentation 21.3

Literature
[1]

Test Universe
OMICRON

User

Manuals.

V2.21;

[2]

BUSINESS DATA COMMUNICATIONS. 3rd

Ed. 1998; Prentice Hall, Inc.

About the Author

Huang Xin (3 April 1979) is a
Chinese software engineer who
mainly works on the SAS. He
has a lot of experience on the
application of SV and GOOSE in
substation project. In these
projects he works as one of the
chief designers and solved a lot
of problem on the process layer
of the substation.

OMICRON electronics GmbH 2011 International Protection Testing Symposium