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    21 views2 pages

    Develop An Application Using OFF Delay PDF

    Uploaded by

    PhucChuVan

    Copyright:

    © All Rights Reserved
    Download as PDF or read online from Scribd
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    2rin0%6 Develop an application sing OFF Delay Timer (Theery) Programmable Logie Cenrllr : Electvieal Engineering: COE PUNE Virtual Lab Deve lop an application ‘using OFF Delay Timer @@ ez Qo = FF & Aim reTest_ Theory Post Test Simulator Review Questions Reference Feedback Theory Introduction: The timer concept and details of on delay timers wit is terminology is discussed in the previous experiment. Let us learn about OfF-Delay Timer (TOF). OFF-Delay Timer: Consider an example where the contents of a storage tank are to transfer fo further process. When the low level is detected by level switch the outlet valve is tobe closed. To allow entire contents to drain out, some time delay is needed 28 the lovel switch is installed slighty above the tank bottom lovel, This can be achioved by using off delay timer. Consider an example that, there is a Low level switch to a tank, and we have to clase the drain valve ofthe tank after 5 second delay when low levels reached, In this case this § seconds delay can be given using off delay timer as we have to close the drain valve after delay The figure below shows a symbolic representation of the off delay timer. 10 [irre Lee — i Faas The instruction mainly includes three status bils namely EN, TT, DN. Their significance is as follows: EN-Enable Bit: - The enable bit indicates the TOF instruction is enabled, TT-Timer-Timing Bit: - The timing bit indicates the timing op: ion isin process. DN: Done Bit: - The done bit changes state whenever the accumulated value reaches the preset value. ‘ACC- Accumulator Bit: - The accumulated value specifies the number of miliseconds that have elapsed since the TOF instruction was enabled. Pre-Preset Bit: - The preset value specifies the value (msec units) which the accumulated value must reach before the instruction clears the DN Bit. ‘The figure shows the timing diagram which ilustrates the functioning ofall the bts in sequence. The timing diagram illustrates the functioning ofall the bts in sequence. epdleoep slab coi Peub=298brch=97&sim=2958ent Te 2rin0%6 Develop an application sing OFF Delay Timer (Theery) Programmable Logie Cenrllr : Electvieal Engineering: COE PUNE Virtual Lab ‘inet sate bac Ly ‘mat ing CTD mer denebac0¥0 t If i TT im I Lon ae) ner dcteaeh PREVA The following example, wil ilustrate the function of each bit of Off Delay Timer after downloading the ladder and taking the PLC in run mode. ° = Tw orbs [

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