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Porchers 1
Porchers 1
Architecture, Programming
and
Development Tools
Lesson 1
ARM CPUs
Outline
ARM Processors
Features
of a RISC architecture
ARM Family and ARM many variant
architectures
Image processing,
Video games,
Robotics and
Adaptive control
Mobile Devices
ARM Applications in
Mobile Systems
PDA
Multimedia
Phone
Network
Walkman
Pocket
PC
Robot With
Distributed
Sensors
Vending
Machine
with Wireless
Support
Pocket
PC with
VOIP
family of general-purpose
32-bit microprocessors offers
high performance and very low
MIPS/watt power consumption
32-bit RISC architecture
Design
Outline..
ARM
Processors
Features of a RISC architecture
ARM Family and ARM many
variant architectures
RISC Features
Same
Length instructions
Single Cycle Execution
Hardwired implementation of
Instructions
Large Register Set(s)
Load and Store Architecture"Microcontrollers....", Raj Kamal,
from Pearson Education, 2005
10
Internal bus
Fetch
Decode
Execution
IR
ID
Hardwired
Circuits
Hardwired Implementation
"Microcontrollers....", Raj Kamal,
from Pearson Education, 2005
11
Outline
ARM
Processors
Features of a RISC architecture
ARM family and ARM many
variant architectures
12
13
14
v1 ARM 1
v3 full 32bit
addressing
v2 ARM 2, v2as for both data and code
-ARM 3, ARM250 ARM 6, ARM 7,
v3
ARM 8 and
ARM variants
Amulet 1
v3M - ARM 6, ARM 7
and ARM 8
v4 StrongARM,
v4
v5 - ARM10
ARM 9,
VFP1- ARM10 for high
floating-point performance
15
control signals
pipelining processing more than
one instruction at the fetching,
decoding and executing stages.
16
STAGE 2
STAGE 3
Instruction A
Execute
Instruction B Instruction C
Execute
Execute
Instruction B
Decode
Instruction C
Decode
Instruction D
Decode
Instruction C
Fetch
Instruction D
Fetch
Instruction E
Fetch
clock cycle n
Time
"Microcontrollers....", Raj Kamal,
from Pearson Education, 2005
17
Contd
Three
stage Pipelining in
superscalar processor facilitating
each instruction fetch is in single
cycle, decoding in single cycle and
execute in the single cycle: Three
times execution speed boost up
18
Cond
ARM
19
Memory Architecture
ARM 7
Address
ARM 9
Data and
Program,
constants,
stored tables
Common
Memory
Address
Address
Program,
constants and
stored tables
Memory
Data Memory
20
Performance
ARM
21
ARM 7 architecture
Uses
22
Cond
Processor
23
A 32bit word
Address
Little Endian
Big Endian
Byte0 (LSB)
byte1
byte2
Byte3 (MSB)
Byte3 (MSB)
byte2
byte1
Byte0 (LSB)
Address0
Address1
Address2
Address3
24
Cond
Fully
25
Cond
Optimized
26
Cond
32-bit
27
28
- Registers
R0 R1 R2 R3 R4 R5 R6 R7 Lo registers
29
30
Cond
32-bit
31
RALU
Temp 1
R0R15
CPSR
Temp 2
ALU
+, - ,
x
Multi-bit
shifter
Rotate
MAC
SPSR
"Microcontrollers....", Raj Kamal,
from Pearson Education, 2005
32
Cond
Coprocessor
interface to connect
coprocessors, like DSP processors
and Java Accelerators
33
Cond
System
control functions
implemented in standard lowpower logic
Cost-effective, compact chip
34
ARM 7 T Variants
35
36
Summary
ARM applications
Mobile Devices,
PocketPC, PDA,
Control Systems,
DSP based applications
Speech and Image processing
Robotics
THANK YOU
43